August 2016 - flashrom - mail.coreboot.org

Re: [flashrom] New SPI NOR Flash product Support
by Stefan Tauner Aug. 16, 2019

Aug. 16, 2019

On Mon, 9 May 2016 20:46:18 -0700 David Hendricks <dhendrix(a)google.com> wrote: > Hi Victor, > From Flashrom's software perspective all chips with the same ID are > indistinguishable. > > Part number often includes characteristics such as package and thermal > tolerance which do not affect software compatibility. However, we will add the new names to the in-program (and hence wiki) database so that this new information becomes public. Thanks for the heads up, Victor. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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80/100/132 column line width policy
by Carl-Daniel Hailfinger Dec. 15, 2018

Dec. 15, 2018

Hi, we're hitting the 80 column limit in our code in ways which actually reduce readability for the code. Examples are various multiline messages and complicated nested code where refactoring to a separate function doesn't make sense. Keeping the old 80 column limit is not really an option anymore. Standard terminal sizes have one of 80, 100 or 132 columns. Given the monitor resolutions many people have nowadays, I think it is safe to say that you can fit two xterms with 100 columns horizonally next to each other. 100 columns should also be sufficient for a msg_p* of roughly 80 columns of text. 132 columns provide more leeway, but IMHO that would be too wide for good readability (and my screen can't fit two xterms side-by-side anymore). Of course some files have sections where any column limit is not acceptable (board lists etc.), but the column limit violations should be limited to the affected file sections, not whole files. Comments? I'd like to get this decided today or tomorrow so we know where we need line breaks in Stefan Tauner's new struct flashchip patch. Regards, Carl-Daniel -- http://www.hailfinger.org/

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Spansion S25FL128P......X
by The Raven April 24, 2017

April 24, 2017

I have a spansion S25FL128P......X chip and can do some tests. The "problem" is that i don't know if its an 0 or an 1. On the chip i see only "FL128PIF" and one line lower i see "00299012 C". Probing works (id1 0x01, id2 0x2018): Calibrating delay loop... OK. serprog: Programmer name is "serprog-duino" Found Spansion flash chip "S25FL128P......0" (16384 kB, SPI) on serprog. Found Spansion flash chip "S25FL128P......1" (16384 kB, SPI) on serprog. Found Spansion flash chip "S25FL128S......0" (16384 kB, SPI) on serprog. Found Spansion flash chip "S25FL128S......1" (16384 kB, SPI) on serprog. Found Spansion flash chip "S25FL129P......0" (16384 kB, SPI) on serprog. Found Spansion flash chip "S25FL129P......1" (16384 kB, SPI) on serprog. Multiple flash chip definitions match the detected chip(s): "S25FL128P......0", "S25FL128P......1", "S25FL128S......0", "S25FL128S......1", "S25FL129P......0", "S25FL129P......1" Please specify which chip definition to use with the -c <chipname> option. BTW: Chip was fund on a Dell-Systemboard.

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FOSDEM 2017
by Carl-Daniel Hailfinger Dec. 10, 2016

Dec. 10, 2016

Hi, FOSDEM 2017 deadlines are soon. Do we want to have a full developer room, a talk or just a stand? Unfortunately I won't be able to attend, so someone else will have to be the formal contact for organizing our stand/devroom/talk. I will help with submitting proposals if this is desired by the person organizing our stand/devroom/... Who is willing to take care of our FOSDEM 2017 presence? https://fosdem.org/2017/news/2016-07-20-call-for-participation/ Deadlines: Developer Rooms: 9 September Main Track Talks: 10 October Stands: 31 October Lightning talks: 25 November Regards, Carl-Daniel

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[PATCH] internal: Dont define functions on yet unsupported architechtures
by Urja Rannikko Dec. 4, 2016

Dec. 4, 2016

This fixes a warning with newer (6.1) gcc on ARM, as tested by swiftgeek on irc. Signed-off-by: Urja Rannikko <urjaman(a)gmail.com> --- internal.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/internal.c b/internal.c index 4062b64..aa5f1d1 100644 --- a/internal.c +++ b/internal.c @@ -131,6 +131,8 @@ int register_superio(struct superio s) int is_laptop = 0; int laptop_ok = 0; +/* This matches with the #if for the registration of par_master_internal */ +#if IS_X86 || IS_MIPS static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); static void internal_chip_writew(const struct flashctx *flash, uint16_t val, @@ -155,6 +157,7 @@ static const struct par_master par_master_internal = { .chip_writel = internal_chip_writel, .chip_writen = fallback_chip_writen, }; +#endif enum chipbustype internal_buses_supported = BUS_NONE; @@ -358,6 +361,8 @@ int internal_init(void) } #endif +/* This matches with the #if for the registration of par_master_internal */ +#if IS_X86 || IS_MIPS static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) { @@ -400,3 +405,4 @@ static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, mmio_readn((void *)addr, buf, len); return; } +#endif -- 2.9.3

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Re: [flashrom] W25Q64 write protect range cleared on reboot (Acer C720): Feature or bug?
by David Hendricks Sept. 1, 2016

Sept. 1, 2016

Hi Brishchik, This is actually the management engine at play and is a known issue. You'll have to ask Intel about this logic to judge whether it's a feature or a bug... On Wed, Aug 31, 2016 at 7:49 AM, Brishchik Gupta <brishchik(a)mail.com> wrote: > Device: Acer C720-3605 Chromebook (Haswell) with Winbond W25Q64 8MB > firmware flash > > Description of issue --- The following behavior is observed: > > 1. If write protect is disabled (either in hardware i.e. screw removed, or > in software i.e. status.srp0 == 0 == status.srp1, or in both hardware and > software) AND there is a non-null write protect range (set by status > register bits BP0/BP1/BP2/TB/SEC), then upon power cycled reboot, the > status registers get completely cleared (to 0x0000). > > 2. If write protect is disabled in hardware but not in software and the > write protect range is null (so status registers == 0x0080), then a power > cycled reboot preserves the status registers (i.e. the value is still > 0x0080 after reboot). > > Is the above behavior a feature or a bug? > > I can post logs (e.g. outputs of "flashrom --wp-status") if necessary. > > Best regards, > > Brishchik Gupta > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > https://www.flashrom.org/mailman/listinfo/flashrom > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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W25Q64 write protect range cleared on reboot (Acer C720): Feature or bug?
by Brishchik Gupta Aug. 31, 2016

Aug. 31, 2016

Device: Acer C720-3605 Chromebook (Haswell) with Winbond W25Q64 8MB firmware flash Description of issue --- The following behavior is observed: 1. If write protect is disabled (either in hardware i.e. screw removed, or in software i.e. status.srp0 == 0 == status.srp1, or in both hardware and software) AND there is a non-null write protect range (set by status register bits BP0/BP1/BP2/TB/SEC), then upon power cycled reboot, the status registers get completely cleared (to 0x0000). 2. If write protect is disabled in hardware but not in software and the write protect range is null (so status registers == 0x0080), then a power cycled reboot preserves the status registers (i.e. the value is still 0x0080 after reboot). Is the above behavior a feature or a bug? I can post logs (e.g. outputs of "flashrom --wp-status") if necessary. Best regards, Brishchik Gupta

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W25Q64 write protect range cleared on reboot (Acer C720): Feature or bug?
by Brishchik Gupta Aug. 31, 2016

Aug. 31, 2016

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error flashrom output
by Wladimir Goruenow Aug. 30, 2016

Aug. 30, 2016

flashrom v0.9.6.1-r1563 on Linux 3.19.0-32-generic (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, GCC 4.7.1, little endian Command line (3 args): flashrom --programmer internal -V Calibrating delay loop... OS timer resolution is 1 usecs, 1273M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 999 us, 10000 myus = 10003 us, 4 myus = 10 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "LENOVO" DMI string system-product-name: "80LK" DMI string system-version: "Lenovo B51-30" DMI string baseboard-manufacturer: "LENOVO" DMI string baseboard-product-name: "Lenovo B51-30" DMI string baseboard-version: "SDK0J40679 WIN" DMI string chassis-type: "Notebook" Laptop detected via DMI. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: fc. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks.

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Impedance match of input wires: by resistors or capacitors
by Rudolf Dovičín Aug. 29, 2016

Aug. 29, 2016

Hello. I try to reprogram BIOS of ThinkPad X200 notebook "in situ" by OrangePi PC (its SPI bus). I cannot read it consistently even if on low frequency 32 kHz. I use 100 mm short wires. On the help page: https://Flashrom.org/Common_problems there is recommendation about matching the impedance of inputs & wires: "The impedances of the wires/traces do not match the impedances of the input pins (of either the circuit/chip on the mainboard or the external programmer). Try using shorter wires, adding small (<100 Ohm) series resistors or parallel capacitors (<20pF) as near as possible to the input pins (this includes also the MISO line which ends near the programmer) and/or ask someone who has experience with high frequency electronics." I know basic of electrical engineering & a bit about electronic, but I am very very far from expert. I try to search this mailing list archives for words "capacitor" or "capacitors", but with no demanded answer. I try google it, e. g. : (ROM|PROM|EPROM|EEPROM)(flashing|program|rewrite)("ISP"|"in situ"|"in system")(capacitor|impedance)"input" -crystal -oscillator but it found me only articles about https://en.Wikipedia.org/wiki/Decoupling_capacitor which I think that I quite understand, yet or documentation from Actel, Advanced Micro Devices, Altera, Atmel, CheckSum, CML Microcircuits, Cypress Semiconductor, Elnec, LAPIS Semiconductor, Lattice Semiconductor, Microchip Technology, Microsemi, Numonyx, Silicon Labs, STMicroelectronics, Texas Instruments, Xilinx etc. sometimes about In-System Programming, but never about these capacitors. What is better, resistor or capacitor (or combination)? How to connect them? (Resistor is clear - in series with the wire. But what about capacitor? Parallel with which?) P.S. On page (bottom "Notes about stability") there is recommendation about foiled twisted pair with link to image http://i.Imgur.com/qHGxKpj.jpg - should not be second wire of the pair respectively foil connected to the ground? -- Rudolf Dovičín Partizánska 1506/92-34 957 01 Bánovce nad Bebravou 1 SLOVENSKO mailto:Rudolf.Dovicin@Gmail.com xmpp:ruwolf@jabbim.sk (cellular: +421 940 872 846, short messages only)

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