February 2014 - flashrom - mail.coreboot.org

80/100/132 column line width policy
by Carl-Daniel Hailfinger Dec. 14, 2018

Dec. 14, 2018

Hi, we're hitting the 80 column limit in our code in ways which actually reduce readability for the code. Examples are various multiline messages and complicated nested code where refactoring to a separate function doesn't make sense. Keeping the old 80 column limit is not really an option anymore. Standard terminal sizes have one of 80, 100 or 132 columns. Given the monitor resolutions many people have nowadays, I think it is safe to say that you can fit two xterms with 100 columns horizonally next to each other. 100 columns should also be sufficient for a msg_p* of roughly 80 columns of text. 132 columns provide more leeway, but IMHO that would be too wide for good readability (and my screen can't fit two xterms side-by-side anymore). Of course some files have sections where any column limit is not acceptable (board lists etc.), but the column limit violations should be limited to the affected file sections, not whole files. Comments? I'd like to get this decided today or tomorrow so we know where we need line breaks in Stefan Tauner's new struct flashchip patch. Regards, Carl-Daniel -- http://www.hailfinger.org/

7 9

[PATCH] Support device lists for programmers without PCI/USB IDs
by Carl-Daniel Hailfinger Feb. 28, 2016

Feb. 28, 2016

Based on an idea by Kyösti Mälkki. Issues: print_wiki is broken right now. Don't compile it in. The internal programmer is listed twice in -L output. Some programmers have stupid indentation in -L output. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-noid_programmers_support_device_list/ogp_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/ogp_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/ogp_spi.c (Arbeitskopie) @@ -47,7 +47,7 @@ static uint32_t ogp_reg__ce; static uint32_t ogp_reg_sck; -const struct dev_entry ogp_spi[] = { +const struct id_dev_entry ogp_spi[] = { {PCI_VENDOR_ID_OGP, 0x0000, OK, "Open Graphics Project", "Development Board OGD1"}, {0}, Index: flashrom-noid_programmers_support_device_list/drkaiser.c =================================================================== --- flashrom-noid_programmers_support_device_list/drkaiser.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/drkaiser.c (Arbeitskopie) @@ -33,7 +33,7 @@ /* Mask to restrict flash accesses to the 128kB memory window. */ #define DRKAISER_MEMMAP_MASK ((1 << 17) - 1) -const struct dev_entry drkaiser_pcidev[] = { +const struct id_dev_entry drkaiser_pcidev[] = { {0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"}, {0}, Index: flashrom-noid_programmers_support_device_list/pcidev.c =================================================================== --- flashrom-noid_programmers_support_device_list/pcidev.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/pcidev.c (Arbeitskopie) @@ -184,7 +184,7 @@ * also matches the specified bus:device.function. * For convenience, this function also registers its own undo handlers. */ -struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar) +struct pci_dev *pcidev_init(const struct id_dev_entry *devs, int bar) { struct pci_dev *dev; struct pci_dev *found_dev = NULL; Index: flashrom-noid_programmers_support_device_list/gfxnvidia.c =================================================================== --- flashrom-noid_programmers_support_device_list/gfxnvidia.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/gfxnvidia.c (Arbeitskopie) @@ -34,7 +34,7 @@ uint8_t *nvidia_bar; -const struct dev_entry gfx_nvidia[] = { +const struct id_dev_entry gfx_nvidia[] = { {0x10de, 0x0010, NT, "NVIDIA", "Mutara V08 [NV2]" }, {0x10de, 0x0018, NT, "NVIDIA", "RIVA 128" }, {0x10de, 0x0020, NT, "NVIDIA", "RIVA TNT" }, Index: flashrom-noid_programmers_support_device_list/serprog.c =================================================================== --- flashrom-noid_programmers_support_device_list/serprog.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/serprog.c (Arbeitskopie) @@ -44,6 +44,11 @@ #define MSGHEADER "serprog: " +const struct noid_dev_entry serprog_devs[] = { + {"", OK, "All programmer devices speaking the serprog protocol"}, + {0}, +}; + /* * FIXME: This prototype was added to help reduce diffs for the shutdown * registration patch, which shifted many lines of code to place Index: flashrom-noid_programmers_support_device_list/nicrealtek.c =================================================================== --- flashrom-noid_programmers_support_device_list/nicrealtek.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/nicrealtek.c (Arbeitskopie) @@ -30,7 +30,7 @@ static int bios_rom_addr, bios_rom_data; -const struct dev_entry nics_realtek[] = { +const struct id_dev_entry nics_realtek[] = { {0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"}, {0x10ec, 0x8169, NT, "Realtek", "RTL8169"}, {0x1113, 0x1211, OK, "SMC", "1211TX"}, /* RTL8139 clone */ Index: flashrom-noid_programmers_support_device_list/satamv.c =================================================================== --- flashrom-noid_programmers_support_device_list/satamv.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/satamv.c (Arbeitskopie) @@ -29,7 +29,7 @@ uint8_t *mv_bar; uint16_t mv_iobar; -const struct dev_entry satas_mv[] = { +const struct id_dev_entry satas_mv[] = { /* 88SX6041 and 88SX6042 are the same according to the datasheet. */ {0x11ab, 0x7042, OK, "Marvell", "88SX7042 PCI-e 4-port SATA-II"}, Index: flashrom-noid_programmers_support_device_list/dummyflasher.c =================================================================== --- flashrom-noid_programmers_support_device_list/dummyflasher.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/dummyflasher.c (Arbeitskopie) @@ -39,6 +39,11 @@ #include <sys/stat.h> #endif +const struct noid_dev_entry dummy_devs[] = { + {"dummy", OK, "Dummy device, does nothing and logs all accesses"}, + {0}, +}; + #if EMULATE_CHIP static uint8_t *flashchip_contents = NULL; enum emu_chip { Index: flashrom-noid_programmers_support_device_list/internal.c =================================================================== --- flashrom-noid_programmers_support_device_list/internal.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/internal.c (Arbeitskopie) @@ -97,6 +97,11 @@ #endif #if CONFIG_INTERNAL == 1 +const struct noid_dev_entry internal_devs[] = { + {"", OK, "Insert witty remark here and/or reference the board/chipset list\n"}, + {0}, +}; + int force_boardenable = 0; int force_boardmismatch = 0; Index: flashrom-noid_programmers_support_device_list/print_wiki.c =================================================================== --- flashrom-noid_programmers_support_device_list/print_wiki.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/print_wiki.c (Arbeitskopie) @@ -301,7 +301,7 @@ /* Following functions are not needed when no PCI/USB programmers are compiled in, * but since print_wiki code has no size constraints we include it unconditionally. */ -static int count_supported_devs_wiki(const struct dev_entry *devs) +static int count_supported_devs_wiki(const struct id_dev_entry *devs) { unsigned int count = 0; unsigned int i = 0; @@ -309,12 +309,13 @@ count++; return count; } +#warning Handle noid_dev_entry devices static void print_supported_devs_wiki_helper(const struct programmer_entry prog) { int i = 0; static int c = 0; - const struct dev_entry *devs = prog.devs.dev; + const struct id_dev_entry *devs = prog.devs.dev; const unsigned int count = count_supported_devs_wiki(devs); /* Alternate colors if the vendor changes. */ Index: flashrom-noid_programmers_support_device_list/nicintel_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/nicintel_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/nicintel_spi.c (Arbeitskopie) @@ -67,7 +67,7 @@ uint8_t *nicintel_spibar; -const struct dev_entry nics_intel_spi[] = { +const struct id_dev_entry nics_intel_spi[] = { {PCI_VENDOR_ID_INTEL, 0x105e, OK, "Intel", "82571EB Gigabit Ethernet Controller"}, {PCI_VENDOR_ID_INTEL, 0x1076, OK, "Intel", "82541GI Gigabit Ethernet Controller"}, {PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"}, Index: flashrom-noid_programmers_support_device_list/usbblaster_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/usbblaster_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/usbblaster_spi.c (Arbeitskopie) @@ -49,7 +49,7 @@ #define ALTERA_VID 0x09fb #define ALTERA_USBBLASTER_PID 0x6001 -const struct dev_entry devs_usbblasterspi[] = { +const struct id_dev_entry devs_usbblasterspi[] = { {ALTERA_VID, ALTERA_USBBLASTER_PID, OK, "Altera", "USB-Blaster"}, {} Index: flashrom-noid_programmers_support_device_list/nicnatsemi.c =================================================================== --- flashrom-noid_programmers_support_device_list/nicnatsemi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/nicnatsemi.c (Arbeitskopie) @@ -30,7 +30,7 @@ #define BOOT_ROM_ADDR 0x50 #define BOOT_ROM_DATA 0x54 -const struct dev_entry nics_natsemi[] = { +const struct id_dev_entry nics_natsemi[] = { {0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"}, {0x100b, 0x0022, NT, "National Semiconductor", "DP83820"}, Index: flashrom-noid_programmers_support_device_list/rayer_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/rayer_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/rayer_spi.c (Arbeitskopie) @@ -37,6 +37,12 @@ #include "programmer.h" #include "hwaccess.h" +const struct noid_dev_entry rayer_spi_devs[] = { + {"rayer", OK, "RayeR parallel port programmer"}, + {"xilinx", OK, "Xilinx Parallel Cable III (DLC 5)"}, + {0}, +}; + enum rayer_type { TYPE_RAYER, TYPE_XILINX_DLC5, Index: flashrom-noid_programmers_support_device_list/dediprog.c =================================================================== --- flashrom-noid_programmers_support_device_list/dediprog.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/dediprog.c (Arbeitskopie) @@ -27,6 +27,11 @@ #include "programmer.h" #include "spi.h" +const struct noid_dev_entry dediprog_devs[] = { + {"", OK, "Dediprog SF100"}, + {0}, +}; + #define FIRMWARE_VERSION(x,y,z) ((x << 16) | (y << 8) | z) #define DEFAULT_TIMEOUT 3000 static usb_dev_handle *dediprog_handle; Index: flashrom-noid_programmers_support_device_list/buspirate_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/buspirate_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/buspirate_spi.c (Arbeitskopie) @@ -27,6 +27,11 @@ #include "programmer.h" #include "spi.h" +const struct noid_dev_entry buspirate_spi_devs[] = { + {"", OK, "Dangerous Prototypes Bus Pirate"}, + {0}, +}; + /* Change this to #define if you want to test without a serial implementation */ #undef FAKE_COMMUNICATION Index: flashrom-noid_programmers_support_device_list/linux_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/linux_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/linux_spi.c (Arbeitskopie) @@ -34,6 +34,11 @@ #include "programmer.h" #include "spi.h" +const struct noid_dev_entry linux_spi_devs[] = { + {"", OK, "Device files /dev/spidev*.*"}, + {0}, +}; + static int fd = -1; static int linux_spi_shutdown(void *data); Index: flashrom-noid_programmers_support_device_list/atahpt.c =================================================================== --- flashrom-noid_programmers_support_device_list/atahpt.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/atahpt.c (Arbeitskopie) @@ -33,7 +33,7 @@ #define PCI_VENDOR_ID_HPT 0x1103 -const struct dev_entry ata_hpt[] = { +const struct id_dev_entry ata_hpt[] = { {0x1103, 0x0004, NT, "Highpoint", "HPT366/368/370/370A/372/372N"}, {0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"}, {0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"}, Index: flashrom-noid_programmers_support_device_list/nic3com.c =================================================================== --- flashrom-noid_programmers_support_device_list/nic3com.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/nic3com.c (Arbeitskopie) @@ -36,7 +36,7 @@ static uint32_t internal_conf; static uint16_t id; -const struct dev_entry nics_3com[] = { +const struct id_dev_entry nics_3com[] = { /* 3C90xB */ {0x10b7, 0x9055, OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, {0x10b7, 0x9001, NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, Index: flashrom-noid_programmers_support_device_list/satasii.c =================================================================== --- flashrom-noid_programmers_support_device_list/satasii.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/satasii.c (Arbeitskopie) @@ -30,7 +30,7 @@ static uint8_t *sii_bar; static uint16_t id; -const struct dev_entry satas_sii[] = { +const struct id_dev_entry satas_sii[] = { {0x1095, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"}, {0x1095, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"}, {0x1095, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"}, Index: flashrom-noid_programmers_support_device_list/ft2232_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/ft2232_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/ft2232_spi.c (Arbeitskopie) @@ -57,7 +57,7 @@ #define OLIMEX_ARM_OCD_H_PID 0x002B #define OLIMEX_ARM_TINY_H_PID 0x002A -const struct dev_entry devs_ft2232spi[] = { +const struct id_dev_entry devs_ft2232spi[] = { {FTDI_VID, FTDI_FT2232H_PID, OK, "FTDI", "FT2232H"}, {FTDI_VID, FTDI_FT4232H_PID, OK, "FTDI", "FT4232H"}, {FTDI_VID, FTDI_FT232H_PID, OK, "FTDI", "FT232H"}, Index: flashrom-noid_programmers_support_device_list/pony_spi.c =================================================================== --- flashrom-noid_programmers_support_device_list/pony_spi.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/pony_spi.c (Arbeitskopie) @@ -47,6 +47,13 @@ #include "flash.h" #include "programmer.h" +const struct noid_dev_entry pony_spi_devs[] = { + {"serbang", OK, "Programmers compatible with serbang"}, + {"si_prog", OK, "Programmers compatible with SI-Prog"}, + {"ajawe", OK, "Programmers compatible with AJAWe"}, + {0}, +}; + enum pony_type { TYPE_SI_PROG, TYPE_SERBANG, Index: flashrom-noid_programmers_support_device_list/nicintel.c =================================================================== --- flashrom-noid_programmers_support_device_list/nicintel.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/nicintel.c (Arbeitskopie) @@ -27,7 +27,7 @@ uint8_t *nicintel_bar; uint8_t *nicintel_control_bar; -const struct dev_entry nics_intel[] = { +const struct id_dev_entry nics_intel[] = { {PCI_VENDOR_ID_INTEL, 0x1209, NT, "Intel", "8255xER/82551IT Fast Ethernet Controller"}, {PCI_VENDOR_ID_INTEL, 0x1229, OK, "Intel", "82557/8/9/0/1 Ethernet Pro 100"}, Index: flashrom-noid_programmers_support_device_list/flashrom.c =================================================================== --- flashrom-noid_programmers_support_device_list/flashrom.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/flashrom.c (Arbeitskopie) @@ -65,7 +65,7 @@ { .name = "internal", .type = OTHER, - .devs.note = NULL, + .devs.noid_dev = internal_devs, .init = internal_init, .map_flash_region = physmap, .unmap_flash_region = physunmap, @@ -77,8 +77,7 @@ { .name = "dummy", .type = OTHER, - /* FIXME */ - .devs.note = "Dummy device, does nothing and logs all accesses\n", + .devs.noid_dev = dummy_devs, .init = dummy_init, .map_flash_region = dummy_map, .unmap_flash_region = dummy_unmap, @@ -90,7 +89,7 @@ { .name = "nic3com", .type = PCI, - .devs.dev = nics_3com, + .devs.id_dev = nics_3com, .init = nic3com_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -103,7 +102,7 @@ /* This programmer works for Realtek RTL8139 and SMC 1211. */ .name = "nicrealtek", .type = PCI, - .devs.dev = nics_realtek, + .devs.id_dev = nics_realtek, .init = nicrealtek_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -115,7 +114,7 @@ { .name = "nicnatsemi", .type = PCI, - .devs.dev = nics_natsemi, + .devs.id_dev = nics_natsemi, .init = nicnatsemi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -127,7 +126,7 @@ { .name = "gfxnvidia", .type = PCI, - .devs.dev = gfx_nvidia, + .devs.id_dev = gfx_nvidia, .init = gfxnvidia_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -139,7 +138,7 @@ { .name = "drkaiser", .type = PCI, - .devs.dev = drkaiser_pcidev, + .devs.id_dev = drkaiser_pcidev, .init = drkaiser_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -151,7 +150,7 @@ { .name = "satasii", .type = PCI, - .devs.dev = satas_sii, + .devs.id_dev = satas_sii, .init = satasii_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -163,7 +162,7 @@ { .name = "atahpt", .type = PCI, - .devs.dev = ata_hpt, + .devs.id_dev = ata_hpt, .init = atahpt_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -175,7 +174,7 @@ { .name = "ft2232_spi", .type = USB, - .devs.dev = devs_ft2232spi, + .devs.id_dev = devs_ft2232spi, .init = ft2232_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -187,8 +186,7 @@ { .name = "serprog", .type = OTHER, - /* FIXME */ - .devs.note = "All programmer devices speaking the serprog protocol\n", + .devs.noid_dev = serprog_devs, .init = serprog_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -200,8 +198,7 @@ { .name = "buspirate_spi", .type = OTHER, - /* FIXME */ - .devs.note = "Dangerous Prototypes Bus Pirate\n", + .devs.noid_dev = buspirate_spi_devs, .init = buspirate_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -213,8 +210,7 @@ { .name = "dediprog", .type = OTHER, - /* FIXME */ - .devs.note = "Dediprog SF100\n", + .devs.noid_dev = dediprog_devs, .init = dediprog_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -226,8 +222,7 @@ { .name = "rayer_spi", .type = OTHER, - /* FIXME */ - .devs.note = "RayeR parallel port programmer\n", + .devs.noid_dev = rayer_spi_devs, .init = rayer_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -239,8 +234,7 @@ { .name = "pony_spi", .type = OTHER, - /* FIXME */ - .devs.note = "Programmers compatible with SI-Prog, serbang or AJAWe\n", + .devs.noid_dev = pony_spi_devs, .init = pony_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -252,7 +246,7 @@ { .name = "nicintel", .type = PCI, - .devs.dev = nics_intel, + .devs.id_dev = nics_intel, .init = nicintel_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -264,7 +258,7 @@ { .name = "nicintel_spi", .type = PCI, - .devs.dev = nics_intel_spi, + .devs.id_dev = nics_intel_spi, .init = nicintel_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -276,7 +270,7 @@ { .name = "ogp_spi", .type = PCI, - .devs.dev = ogp_spi, + .devs.id_dev = ogp_spi, .init = ogp_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -288,7 +282,7 @@ { .name = "satamv", .type = PCI, - .devs.dev = satas_mv, + .devs.id_dev = satas_mv, .init = satamv_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -300,7 +294,7 @@ { .name = "linux_spi", .type = OTHER, - .devs.note = "Device files /dev/spidev*.*\n", + .devs.noid_dev = linux_spi_devs, .init = linux_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -312,7 +306,7 @@ { .name = "usbblaster_spi", .type = USB, - .devs.dev = devs_usbblasterspi, + .devs.id_dev = devs_usbblasterspi, .init = usbblaster_spi_init, .map_flash_region = fallback_map, .unmap_flash_region = fallback_unmap, @@ -1675,10 +1669,9 @@ case USB: case PCI: case OTHER: - if (p.devs.note == NULL) { - if (strcmp("internal", p.name) == 0) - break; /* This one has its device list stored separately. */ - msg_gerr("Programmer %s has neither a device list nor a textual description!\n", + /* Either id_dev or noid_dev should be non-NULL. */ + if (p.devs.id_dev == NULL) { + msg_gerr("Programmer %s doesn't have a device list!\n", p.name); ret = 1; } Index: flashrom-noid_programmers_support_device_list/programmer.h =================================================================== --- flashrom-noid_programmers_support_device_list/programmer.h (Revision 1666) +++ flashrom-noid_programmers_support_device_list/programmer.h (Arbeitskopie) @@ -99,7 +99,13 @@ OTHER, }; -struct dev_entry { +struct noid_dev_entry { + const char *type; + const enum test_state status; + const char *description; +}; + +struct id_dev_entry { uint16_t vendor_id; uint16_t device_id; const enum test_state status; @@ -111,8 +117,8 @@ const char *name; const enum programmer_type type; union { - const struct dev_entry *const dev; - const char *const note; + const struct noid_dev_entry *const noid_dev; + const struct id_dev_entry *const id_dev; } devs; int (*init) (void); @@ -172,7 +178,7 @@ extern struct pci_access *pacc; int pci_init_common(void); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); -struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar); +struct pci_dev *pcidev_init(const struct id_dev_entry *devs, int bar); /* rpci_write_* are reversible writes. The original PCI config space register * contents will be restored on shutdown. */ @@ -320,6 +326,7 @@ int register_superio(struct superio s); extern enum chipbustype internal_buses_supported; int internal_init(void); +extern const struct noid_dev_entry internal_devs[]; #endif /* hwaccess.c */ @@ -360,94 +367,97 @@ int dummy_init(void); void *dummy_map(const char *descr, unsigned long phys_addr, size_t len); void dummy_unmap(void *virt_addr, size_t len); +extern const struct noid_dev_entry dummy_devs[]; #endif /* nic3com.c */ #if CONFIG_NIC3COM == 1 int nic3com_init(void); -extern const struct dev_entry nics_3com[]; +extern const struct id_dev_entry nics_3com[]; #endif /* gfxnvidia.c */ #if CONFIG_GFXNVIDIA == 1 int gfxnvidia_init(void); -extern const struct dev_entry gfx_nvidia[]; +extern const struct id_dev_entry gfx_nvidia[]; #endif /* drkaiser.c */ #if CONFIG_DRKAISER == 1 int drkaiser_init(void); -extern const struct dev_entry drkaiser_pcidev[]; +extern const struct id_dev_entry drkaiser_pcidev[]; #endif /* nicrealtek.c */ #if CONFIG_NICREALTEK == 1 int nicrealtek_init(void); -extern const struct dev_entry nics_realtek[]; +extern const struct id_dev_entry nics_realtek[]; #endif /* nicnatsemi.c */ #if CONFIG_NICNATSEMI == 1 int nicnatsemi_init(void); -extern const struct dev_entry nics_natsemi[]; +extern const struct id_dev_entry nics_natsemi[]; #endif /* nicintel.c */ #if CONFIG_NICINTEL == 1 int nicintel_init(void); -extern const struct dev_entry nics_intel[]; +extern const struct id_dev_entry nics_intel[]; #endif /* nicintel_spi.c */ #if CONFIG_NICINTEL_SPI == 1 int nicintel_spi_init(void); -extern const struct dev_entry nics_intel_spi[]; +extern const struct id_dev_entry nics_intel_spi[]; #endif /* ogp_spi.c */ #if CONFIG_OGP_SPI == 1 int ogp_spi_init(void); -extern const struct dev_entry ogp_spi[]; +extern const struct id_dev_entry ogp_spi[]; #endif /* satamv.c */ #if CONFIG_SATAMV == 1 int satamv_init(void); -extern const struct dev_entry satas_mv[]; +extern const struct id_dev_entry satas_mv[]; #endif /* satasii.c */ #if CONFIG_SATASII == 1 int satasii_init(void); -extern const struct dev_entry satas_sii[]; +extern const struct id_dev_entry satas_sii[]; #endif /* atahpt.c */ #if CONFIG_ATAHPT == 1 int atahpt_init(void); -extern const struct dev_entry ata_hpt[]; +extern const struct id_dev_entry ata_hpt[]; #endif /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 int ft2232_spi_init(void); -extern const struct dev_entry devs_ft2232spi[]; +extern const struct id_dev_entry devs_ft2232spi[]; #endif /* usbblaster_spi.c */ #if CONFIG_USBBLASTER_SPI == 1 int usbblaster_spi_init(void); -extern const struct dev_entry devs_usbblasterspi[]; +extern const struct id_dev_entry devs_usbblasterspi[]; #endif /* rayer_spi.c */ #if CONFIG_RAYER_SPI == 1 int rayer_spi_init(void); +extern const struct noid_dev_entry rayer_spi_devs[]; #endif /* pony_spi.c */ #if CONFIG_PONY_SPI == 1 int pony_spi_init(void); +extern const struct noid_dev_entry pony_spi_devs[]; #endif /* bitbang_spi.c */ @@ -456,16 +466,19 @@ /* buspirate_spi.c */ #if CONFIG_BUSPIRATE_SPI == 1 int buspirate_spi_init(void); +extern const struct noid_dev_entry buspirate_spi_devs[]; #endif /* linux_spi.c */ #if CONFIG_LINUX_SPI == 1 int linux_spi_init(void); +extern const struct noid_dev_entry linux_spi_devs[]; #endif /* dediprog.c */ #if CONFIG_DEDIPROG == 1 int dediprog_init(void); +extern const struct noid_dev_entry dediprog_devs[]; #endif /* flashrom.c */ @@ -642,6 +655,7 @@ #if CONFIG_SERPROG == 1 int serprog_init(void); void serprog_delay(int usecs); +extern const struct noid_dev_entry serprog_devs[]; #endif /* serial.c */ Index: flashrom-noid_programmers_support_device_list/print.c =================================================================== --- flashrom-noid_programmers_support_device_list/print.c (Revision 1666) +++ flashrom-noid_programmers_support_device_list/print.c (Arbeitskopie) @@ -433,11 +433,11 @@ } #endif -void print_supported_devs(const struct programmer_entry prog, const char *const type) +void print_supported_id_devs(const struct programmer_entry prog, const char *const type) { int i; - const struct dev_entry *const devs = prog.devs.dev; + const struct id_dev_entry *const devs = prog.devs.id_dev; msg_ginfo("\nSupported %s devices for the %s programmer:\n", type, prog.name); for (i = 0; devs[i].vendor_name != NULL; i++) { msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name, devs[i].device_name, devs[i].vendor_id, @@ -445,6 +445,18 @@ } } +void print_supported_noid_devs(const struct programmer_entry prog, const char *const type) +{ + int i; + + const struct noid_dev_entry *const devs = prog.devs.noid_dev; + msg_ginfo("\nSupported models for the %s programmer:\n", prog.name); + for (i = 0; devs[i].type != NULL; i++) { + msg_pinfo("%-20s %s %s\n", devs[i].type, devs[i].description, + (devs[i].status == NT) ? " (untested)" : ""); + } +} + int print_supported(void) { unsigned int i; @@ -467,18 +479,15 @@ const struct programmer_entry prog = programmer_table[i]; switch (prog.type) { case USB: - print_supported_devs(prog, "USB"); + print_supported_id_devs(prog, "USB"); break; #if NEED_PCI == 1 case PCI: - print_supported_devs(prog, "PCI"); + print_supported_id_devs(prog, "PCI"); break; #endif case OTHER: - if (prog.devs.note != NULL) { - msg_ginfo("\nSupported devices for the %s programmer:\n", prog.name); - msg_ginfo("%s", prog.devs.note); - } + print_supported_noid_devs(prog, "(generic)"); break; default: msg_gerr("\n%s: %s: Uninitialized programmer type! Please report a bug at " -- http://www.hailfinger.org/

2 6

[PATCH 1/4] Bump dediprog driver to use libusb-1.0
by Kyösti Mälkki Jan. 24, 2016

Jan. 24, 2016

From: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Am 21.02.2013 01:46 schrieb Carl-Daniel Hailfinger: > Hi Nico, > > thanks for your patch. > > Am 16.11.2012 11:28 schrieb Nico Huber: >> > This patch tracks the changes in the libusb interface. Nothing changed >> > in the behaviour of the driver, so far. >> > >> > It will be used by a follow-up patch. It's based on "Enable spi clock >> > setting in dediprog driver". >> > >> > Signed-off-by: Nico Huber <nico.huber(a)secunet.com> > Review follows. > The Makefile part checked for libusb 0.1, but it set the linker > parameter for libusb 1.0. > The code assumed that libusb_error_name() is always available, but that > function was only introduced in libusb 1.0.9. > There was a conflict between the added device parameter for multiple > Dedipro SF100 devices on one PC (r1628) and the removal of > get_device_by_vid_pid(). > > I have fixed and forward ported the code, please check that it works and > looks sane. > > This patch is completely untested, I only checked whether it compiles. > If it works for you and looks sane, please tell me so I can commit. > > Signed-off-by: Nico Huber <nico.huber(a)secunet.com> New version. Fixed error messages and incomplete cleanup in the error case. libusb header file location is still something I have to fix in another iteration. Signed-off-by: Nico Huber <nico.huber(a)secunet.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> --- Makefile | 58 +++++++++----- dediprog.c | 258 +++++++++++++++++++++++++++++++++---------------------------- 2 files changed, 178 insertions(+), 138 deletions(-) diff --git a/Makefile b/Makefile index 07fefc0..96a7987 100644 --- a/Makefile +++ b/Makefile @@ -117,7 +117,7 @@ UNSUPPORTED_FEATURES += CONFIG_PONY_SPI=yes else override CONFIG_PONY_SPI = no endif -# Dediprog and FT2232 are not supported under DOS (missing USB support). +# Dediprog and FT2232 are not supported under DOS (missing libusb support). ifeq ($(CONFIG_DEDIPROG), yes) UNSUPPORTED_FEATURES += CONFIG_DEDIPROG=yes else @@ -504,8 +504,9 @@ ifeq ($(NEED_FTDI), yes) FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FT232H := yes" .features && printf "%s" "-D'HAVE_FT232H=1'") FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "$(FTDILIBS)") -# We can't set NEED_USB here because that would transform libftdi auto-enabling +# We can't set NEED_LIBUSB1 here because that would transform libftdi auto-enabling # into a hard requirement for libusb, defeating the purpose of auto-enabling. +# Besides that, the old libftdi requires libusb 0.1, not libusb 1.0. endif ifeq ($(CONFIG_DUMMY), yes) @@ -558,7 +559,7 @@ endif ifeq ($(CONFIG_DEDIPROG), yes) FEATURE_CFLAGS += -D'CONFIG_DEDIPROG=1' PROGRAMMER_OBJS += dediprog.o -NEED_USB := yes +NEED_LIBUSB1 := yes endif ifeq ($(CONFIG_SATAMV), yes) @@ -613,10 +614,12 @@ endif endif endif -ifeq ($(NEED_USB), yes) -CHECK_LIBUSB0 = yes -FEATURE_CFLAGS += -D'NEED_USB=1' -USBLIBS := $(shell pkg-config --libs libusb 2>/dev/null || printf "%s" "-lusb") +ifeq ($(NEED_LIBUSB1), yes) +CHECK_LIBUSB1 = yes +FEATURE_CFLAGS += -D'NEED_LIBUSB1=1' +FEATURE_CFLAGS += $(shell pkg-config --cflags libusb-1.0 2>/dev/null) +USBLIBS := $(shell pkg-config --libs libusb-1.0 2>/dev/null || printf "%s" "-lusb-1.0") +FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "LIBUSB1_ERROR_NAME := yes" .features && printf "%s" "-D'LIBUSB_HAVE_ERROR_NAME=1'") endif ifeq ($(CONFIG_PRINT_WIKI), yes) @@ -711,17 +714,17 @@ int main(int argc, char **argv) endef export LIBPCI_TEST -define LIBUSB0_TEST -#include <usb.h> +define LIBUSB1_TEST +#include <libusb.h> int main(int argc, char **argv) { (void) argc; (void) argv; - usb_init(); + libusb_init(NULL); return 0; } endef -export LIBUSB0_TEST +export LIBUSB1_TEST hwlibs: compiler @printf "" > .libdeps @@ -744,18 +747,18 @@ ifeq ($(CHECK_LIBPCI), yes) rm -f .test.c .test.o .test$(EXEC_SUFFIX); exit 1) ) @rm -f .test.c .test.o .test$(EXEC_SUFFIX) endif -ifeq ($(CHECK_LIBUSB0), yes) - @printf "Checking for libusb-0.1/libusb-compat headers... " - @echo "$$LIBUSB0_TEST" > .test.c - @$(CC) -c $(CPPFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null && \ +ifeq ($(CHECK_LIBUSB1), yes) + @printf "Checking for libusb-1.0 headers... " + @echo "$$LIBUSB1_TEST" > .test.c + @$(CC) -c $(CPPFLAGS) $(FEATURE_CFLAGS) $(CFLAGS) .test.c -o .test.o >/dev/null && \ echo "found." || ( echo "not found."; echo; \ - echo "Please install libusb-0.1 headers or libusb-compat headers."; \ + echo "Please install libusb-1.0 headers."; \ echo "See README for more information."; echo; \ rm -f .test.c .test.o; exit 1) - @printf "Checking if libusb-0.1 is usable... " + @printf "Checking if libusb-1.0 is usable... " @$(CC) $(LDFLAGS) .test.o -o .test$(EXEC_SUFFIX) $(LIBS) $(USBLIBS) >/dev/null && \ echo "yes." || ( echo "no."; \ - echo "Please install libusb-0.1 or libusb-compat."; \ + echo "Please install libusb-1.0."; \ echo "See README for more information."; echo; \ rm -f .test.c .test.o .test$(EXEC_SUFFIX); exit 1) @rm -f .test.c .test.o .test$(EXEC_SUFFIX) @@ -777,6 +780,18 @@ ifneq ($(UNSUPPORTED_FEATURES), ) @false endif +define LIBUSB1_ERROR_NAME_TEST +#include <libusb.h> +int main(int argc, char **argv) +{ + (void) argc; + (void) argv; + libusb_error_name(0); + return 0; +} +endef +export LIBUSB1_ERROR_NAME_TEST + define FTDI_TEST #include <ftdi.h> struct ftdi_context *ftdic = NULL; @@ -823,6 +838,13 @@ export LINUX_SPI_TEST features: compiler @echo "FEATURES := yes" > .features.tmp +ifeq ($(CHECK_LIBUSB1), yes) + @printf "Checking for libusb_error_name support in libusb-1.0... " + @echo "$$LIBUSB1_ERROR_NAME_TEST" >> .featuretest.c + @$(CC) $(CPPFLAGS) $(FEATURE_CFLAGS) $(CFLAGS) $(LDFLAGS) .featuretest.c -o .featuretest$(EXEC_SUFFIX) $(USBLIBS) $(LIBS) >/dev/null 2>&1 && \ + ( echo "found."; echo "LIBUSB1_ERROR_NAME := yes" >> .features.tmp ) || \ + ( echo "not found." ) +endif ifeq ($(NEED_FTDI), yes) @printf "Checking for FTDI support... " @echo "$$FTDI_TEST" > .featuretest.c diff --git a/dediprog.c b/dediprog.c index ae86810..c33dc10 100644 --- a/dediprog.c +++ b/dediprog.c @@ -2,6 +2,7 @@ * This file is part of the flashrom project. * * Copyright (C) 2010 Carl-Daniel Hailfinger + * 2012 secunet Security Networks AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,7 +22,8 @@ #include <string.h> #include <limits.h> #include <errno.h> -#include <usb.h> +#include <stdlib.h> +#include <libusb.h> #include "flash.h" #include "chipdrivers.h" #include "programmer.h" @@ -29,7 +31,8 @@ #define FIRMWARE_VERSION(x,y,z) ((x << 16) | (y << 8) | z) #define DEFAULT_TIMEOUT 3000 -static usb_dev_handle *dediprog_handle; +static libusb_context *usb_ctx; +static libusb_device_handle *dediprog_handle; static int dediprog_firmwareversion; static int dediprog_endpoint; @@ -47,27 +50,63 @@ static void print_hex(void *buf, size_t len) } #endif +#ifndef LIBUSB_HAVE_ERROR_NAME +/* Quick and dirty replacement for missing libusb_error_name in older libusb 1.0. */ +const char *libusb_error_name(int error_code) +{ + /* 18 chars for text, rest for number, sign, nullbyte. */ + static char my_libusb_error[18 + 3 * sizeof(int) + 2]; + + sprintf(my_libusb_error, "libusb error code %i", error_code); + return my_libusb_error; +} +#endif + /* Might be useful for other USB devices as well. static for now. */ /* device parameter allows user to specify one device of multiple installed */ -static struct usb_device *get_device_by_vid_pid(uint16_t vid, uint16_t pid, unsigned int device) +static struct libusb_device_handle *get_device_by_vid_pid_number(uint16_t vid, uint16_t pid, unsigned int num) { - struct usb_bus *bus; - struct usb_device *dev; - - for (bus = usb_get_busses(); bus; bus = bus->next) - for (dev = bus->devices; dev; dev = dev->next) - if ((dev->descriptor.idVendor == vid) && - (dev->descriptor.idProduct == pid)) { - if (device == 0) - return dev; - device--; + struct libusb_device **list; + ssize_t i = 0; + int err = 0; + struct libusb_device_handle *handle = NULL; + struct libusb_device_descriptor desc = {}; + ssize_t count = libusb_get_device_list(usb_ctx, &list); + + if (count < 0) { + msg_perr("Getting the USB device list failed (%s)!\n", libusb_error_name(count)); + return NULL; + } + + for (i = 0; i < count; i++) { + struct libusb_device *dev = list[i]; + err = libusb_get_device_descriptor(dev, &desc); + if (err != 0) { + msg_perr("Reading the USB device descriptor failed (%s)!\n", libusb_error_name(err)); + libusb_free_device_list(list, 1); + return NULL; + } + if ((desc.idVendor == vid) && (desc.idProduct == pid)) { + msg_pdbg("Found USB device %04hx:%04hx at address %hhx-%hhx.\n", desc.idVendor, + desc.idProduct, libusb_get_bus_number(dev), libusb_get_device_address(dev)); + if (num == 0) { + err = libusb_open(dev, &handle); + if (err != 0) { + msg_perr("Opening the USB device failed (%s)!\n", + libusb_error_name(err)); + libusb_free_device_list(list, 1); + return NULL; + } + break; } + num--; + } + } + libusb_free_device_list(list, 1); - return NULL; + return handle; } -//int usb_control_msg(usb_dev_handle *dev, int requesttype, int request, int value, int index, char *bytes, int size, int timeout); - /* Set/clear LEDs on dediprog */ #define PASS_ON (0 << 0) #define PASS_OFF (1 << 0) @@ -101,11 +140,10 @@ static int dediprog_set_leds(int leds) target_leds = leds; } - ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, target_leds, - NULL, 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x07, 0x09, target_leds, + NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command Set LED 0x%x failed (%s)!\n", - leds, usb_strerror()); + msg_perr("Command Set LED 0x%x failed (%s)!\n", leds, libusb_error_name(ret)); return 1; } @@ -144,8 +182,8 @@ static int dediprog_set_spi_voltage(int millivolt) /* Wait some time as the original driver does. */ programmer_delay(200 * 1000); } - ret = usb_control_msg(dediprog_handle, 0x42, 0x9, voltage_selector, - 0xff, NULL, 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x9, voltage_selector, + 0xff, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { msg_perr("Command Set SPI Voltage 0x%x failed!\n", voltage_selector); @@ -188,8 +226,8 @@ static int dediprog_set_spi_speed(unsigned int spispeed_idx) msg_pdbg("SPI speed is %sHz\n", spispeeds[spispeed_idx].name); - ret = usb_control_msg(dediprog_handle, 0x42, 0x61, spispeeds[spispeed_idx].speed, 0xff, - NULL, 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x61, spispeeds[spispeed_idx].speed, 0xff, + NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { msg_perr("Command Set SPI Speed 0x%x failed!\n", spispeeds[spispeed_idx].speed); return 1; @@ -205,15 +243,15 @@ static int dediprog_set_spi_speed(unsigned int spispeed_idx) static int dediprog_spi_bulk_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - int ret; + int ret, transferred; unsigned int i; /* chunksize must be 512, other sizes will NOT work at all. */ const unsigned int chunksize = 0x200; const unsigned int count = len / chunksize; - const char count_and_chunk[] = {count & 0xff, - (count >> 8) & 0xff, - chunksize & 0xff, - (chunksize >> 8) & 0xff}; + const unsigned char count_and_chunk[] = { + count & 0xff, (count >> 8) & 0xff, + chunksize & 0xff, (chunksize >> 8) & 0xff + }; if ((start % chunksize) || (len % chunksize)) { msg_perr("%s: Unaligned start=%i, len=%i! Please report a bug " @@ -227,22 +265,20 @@ static int dediprog_spi_bulk_read(struct flashctx *flash, uint8_t *buf, /* Command Read SPI Bulk. No idea which read command is used on the * SPI side. */ - ret = usb_control_msg(dediprog_handle, 0x42, 0x20, start % 0x10000, - start / 0x10000, (char *)count_and_chunk, - sizeof(count_and_chunk), DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x20, start % 0x10000, start / 0x10000, + (unsigned char *)count_and_chunk, sizeof(count_and_chunk), + DEFAULT_TIMEOUT); if (ret != sizeof(count_and_chunk)) { - msg_perr("Command Read SPI Bulk failed, %i %s!\n", ret, - usb_strerror()); + msg_perr("Command Read SPI Bulk failed, %i %s!\n", ret, libusb_error_name(ret)); return 1; } for (i = 0; i < count; i++) { - ret = usb_bulk_read(dediprog_handle, 0x80 | dediprog_endpoint, - (char *)buf + i * chunksize, chunksize, - DEFAULT_TIMEOUT); - if (ret != chunksize) { - msg_perr("SPI bulk read %i failed, expected %i, got %i " - "%s!\n", i, chunksize, ret, usb_strerror()); + ret = libusb_bulk_transfer(dediprog_handle, 0x80 | dediprog_endpoint, + buf + i * chunksize, chunksize, &transferred, DEFAULT_TIMEOUT); + if ((ret < 0) || (transferred != chunksize)) { + msg_perr("SPI bulk read %i failed, expected %i, got %i %s!\n", + i, chunksize, ret, libusb_error_name(ret)); return 1; } } @@ -306,7 +342,7 @@ static int dediprog_spi_read(struct flashctx *flash, uint8_t *buf, static int dediprog_spi_bulk_write(struct flashctx *flash, uint8_t *buf, unsigned int chunksize, unsigned int start, unsigned int len, uint8_t dedi_spi_cmd) { - int ret; + int ret, transferred; unsigned int i; /* USB transfer size must be 512, other sizes will NOT work at all. * chunksize is the real data size per USB bulk transfer. The remaining @@ -314,7 +350,7 @@ static int dediprog_spi_bulk_write(struct flashctx *flash, uint8_t *buf, unsigne */ const unsigned int count = len / chunksize; const char count_and_cmd[] = {count & 0xff, (count >> 8) & 0xff, 0x00, dedi_spi_cmd}; - char usbbuf[512]; + unsigned char usbbuf[512]; /* * We should change this check to @@ -339,23 +375,21 @@ static int dediprog_spi_bulk_write(struct flashctx *flash, uint8_t *buf, unsigne /* Command Write SPI Bulk. No idea which write command is used on the * SPI side. */ - ret = usb_control_msg(dediprog_handle, 0x42, 0x30, start % 0x10000, start / 0x10000, - (char *)count_and_cmd, sizeof(count_and_cmd), DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x30, start % 0x10000, start / 0x10000, + (unsigned char *)count_and_cmd, sizeof(count_and_cmd), DEFAULT_TIMEOUT); if (ret != sizeof(count_and_cmd)) { - msg_perr("Command Write SPI Bulk failed, %i %s!\n", ret, - usb_strerror()); + msg_perr("Command Write SPI Bulk failed, %i %s!\n", ret, libusb_error_name(ret)); return 1; } for (i = 0; i < count; i++) { memset(usbbuf, 0xff, sizeof(usbbuf)); memcpy(usbbuf, buf + i * chunksize, chunksize); - ret = usb_bulk_write(dediprog_handle, dediprog_endpoint, - usbbuf, 512, - DEFAULT_TIMEOUT); - if (ret != 512) { - msg_perr("SPI bulk write failed, expected %i, got %i " - "%s!\n", 512, ret, usb_strerror()); + ret = libusb_bulk_transfer(dediprog_handle, dediprog_endpoint, + usbbuf, 512, &transferred, DEFAULT_TIMEOUT); + if ((ret < 0) || (transferred != 512)) { + msg_perr("SPI bulk write failed, expected %i, got %i %s!\n", + 512, ret, libusb_error_name(ret)); return 1; } } @@ -444,23 +478,20 @@ static int dediprog_spi_send_command(struct flashctx *flash, msg_perr("Untested readcnt=%i, aborting.\n", readcnt); return 1; } - - ret = usb_control_msg(dediprog_handle, 0x42, 0x1, 0xff, - readcnt ? 0x1 : 0x0, (char *)writearr, writecnt, - DEFAULT_TIMEOUT); + + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x1, 0xff, readcnt ? 0x1 : 0x0, + (unsigned char *)writearr, writecnt, DEFAULT_TIMEOUT); if (ret != writecnt) { - msg_perr("Send SPI failed, expected %i, got %i %s!\n", - writecnt, ret, usb_strerror()); + msg_perr("Send SPI failed, expected %i, got %i %s!\n", writecnt, ret, libusb_error_name(ret)); return 1; } if (!readcnt) return 0; memset(readarr, 0, readcnt); - ret = usb_control_msg(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000, - (char *)readarr, readcnt, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0xc2, 0x01, 0xbb8, 0x0000, + readarr, readcnt, DEFAULT_TIMEOUT); if (ret != readcnt) { - msg_perr("Receive SPI failed, expected %i, got %i %s!\n", - readcnt, ret, usb_strerror()); + msg_perr("Receive SPI failed, expected %i, got %i %s!\n", readcnt, ret, libusb_error_name(ret)); return 1; } return 0; @@ -470,22 +501,18 @@ static int dediprog_check_devicestring(void) { int ret; int fw[3]; - char buf[0x11]; + unsigned char buf[0x11]; /* Command Prepare Receive Device String. */ memset(buf, 0, sizeof(buf)); - ret = usb_control_msg(dediprog_handle, 0xc3, 0x7, 0x0, 0xef03, buf, - 0x1, DEFAULT_TIMEOUT); - /* The char casting is needed to stop gcc complaining about an always true comparison. */ - if ((ret != 0x1) || (buf[0] != (char)0xff)) { - msg_perr("Unexpected response to Command Prepare Receive Device" - " String!\n"); + ret = libusb_control_transfer(dediprog_handle, 0xc3, 0x7, 0x0, 0xef03, buf, 0x1, DEFAULT_TIMEOUT); + if ((ret != 0x1) || (buf[0] != 0xff)) { + msg_perr("Unexpected response to Command Prepare Receive Device String!\n"); return 1; } /* Command Receive Device String. */ memset(buf, 0, sizeof(buf)); - ret = usb_control_msg(dediprog_handle, 0xc2, 0x8, 0xff, 0xff, buf, - 0x10, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0xc2, 0x8, 0xff, 0xff, buf, 0x10, DEFAULT_TIMEOUT); if (ret != 0x10) { msg_perr("Incomplete/failed Command Receive Device String!\n"); return 1; @@ -496,7 +523,7 @@ static int dediprog_check_devicestring(void) msg_perr("Device not a SF100!\n"); return 1; } - if (sscanf(buf, "SF100 V:%d.%d.%d ", &fw[0], &fw[1], &fw[2]) != 3) { + if (sscanf((const char *)buf, "SF100 V:%d.%d.%d ", &fw[0], &fw[1], &fw[2]) != 3) { msg_perr("Unexpected firmware version string!\n"); return 1; } @@ -517,13 +544,12 @@ static int dediprog_check_devicestring(void) static int dediprog_command_a(void) { int ret; - char buf[0x1]; + unsigned char buf[0x1]; memset(buf, 0, sizeof(buf)); - ret = usb_control_msg(dediprog_handle, 0xc3, 0xb, 0x0, 0x0, buf, - 0x1, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0xc3, 0xb, 0x0, 0x0, buf, 0x1, DEFAULT_TIMEOUT); if (ret < 0) { - msg_perr("Command A failed (%s)!\n", usb_strerror()); + msg_perr("Command A failed (%s)!\n", libusb_error_name(ret)); return 1; } if ((ret != 0x1) || (buf[0] != 0x6f)) { @@ -541,13 +567,12 @@ static int dediprog_command_a(void) static int dediprog_command_b(void) { int ret; - char buf[0x3]; + unsigned char buf[0x3]; memset(buf, 0, sizeof(buf)); - ret = usb_control_msg(dediprog_handle, 0xc3, 0x7, 0x0, 0xef00, buf, - 0x3, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0xc3, 0x7, 0x0, 0xef00, buf, 0x3, DEFAULT_TIMEOUT); if (ret < 0) { - msg_perr("Command B failed (%s)!\n", usb_strerror()); + msg_perr("Command B failed (%s)!\n", libusb_error_name(ret)); return 1; } if ((ret != 0x3) || (buf[0] != 0xff) || (buf[1] != 0xff) || @@ -569,10 +594,9 @@ static int dediprog_command_c(void) { int ret; - ret = usb_control_msg(dediprog_handle, 0x42, 0x4, 0x0, 0x0, NULL, - 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x4, 0x0, 0x0, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command C failed (%s)!\n", usb_strerror()); + msg_perr("Command C failed (%s)!\n", libusb_error_name(ret)); return 1; } return 0; @@ -587,17 +611,16 @@ static int dediprog_command_c(void) static int dediprog_command_f(int timeout) { int ret; - char buf[0x1]; + unsigned char buf[0x1]; memset(buf, 0, sizeof(buf)); - ret = usb_control_msg(dediprog_handle, 0xc2, 0x11, 0xff, 0xff, buf, - 0x1, timeout); + ret = libusb_control_transfer(dediprog_handle, 0xc2, 0x11, 0xff, 0xff, buf, 0x1, timeout); /* This check is most probably wrong. Command F always causes a timeout * in the logs, so we should check for timeout instead of checking for * success. */ if (ret != 0x1) { - msg_perr("Command F failed (%s)!\n", usb_strerror()); + msg_perr("Command F failed (%s)!\n", libusb_error_name(ret)); return 1; } return 0; @@ -611,9 +634,9 @@ static int dediprog_command_g(void) { int ret; - ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x03, NULL, 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x07, 0x09, 0x03, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command G failed (%s)!\n", usb_strerror()); + msg_perr("Command G failed (%s)!\n", libusb_error_name(ret)); return 1; } return 0; @@ -628,9 +651,9 @@ static int dediprog_command_h(void) { int ret; - ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x05, NULL, 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x07, 0x09, 0x05, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command H failed (%s)!\n", usb_strerror()); + msg_perr("Command H failed (%s)!\n", libusb_error_name(ret)); return 1; } return 0; @@ -645,9 +668,9 @@ static int dediprog_command_i(void) { int ret; - ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x06, NULL, 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x07, 0x09, 0x06, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command I failed (%s)!\n", usb_strerror()); + msg_perr("Command I failed (%s)!\n", libusb_error_name(ret)); return 1; } return 0; @@ -665,9 +688,9 @@ static int dediprog_command_j(void) { int ret; - ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x07, NULL, 0x0, DEFAULT_TIMEOUT); + ret = libusb_control_transfer(dediprog_handle, 0x42, 0x07, 0x09, 0x07, NULL, 0x0, DEFAULT_TIMEOUT); if (ret != 0x0) { - msg_perr("Command J failed (%s)!\n", usb_strerror()); + msg_perr("Command J failed (%s)!\n", libusb_error_name(ret)); return 1; } return 0; @@ -770,21 +793,18 @@ static int dediprog_shutdown(void *data) if (dediprog_set_spi_voltage(0x0)) return 1; - if (usb_release_interface(dediprog_handle, 0)) { + if (libusb_release_interface(dediprog_handle, 0)) { msg_perr("Could not release USB interface!\n"); return 1; } - if (usb_close(dediprog_handle)) { - msg_perr("Could not close USB device!\n"); - return 1; - } + libusb_close(dediprog_handle); + libusb_exit(usb_ctx); return 0; } /* URB numbers refer to the first log ever captured. */ int dediprog_init(void) { - struct usb_device *dev; char *voltage, *device, *spispeed; int spispeed_idx = 2; int millivolt = 3500; @@ -842,31 +862,29 @@ int dediprog_init(void) free(device); /* Here comes the USB stuff. */ - usb_init(); - usb_find_busses(); - usb_find_devices(); - dev = get_device_by_vid_pid(0x0483, 0xdada, (unsigned int) usedevice); - if (!dev) { + libusb_init(&usb_ctx); + if (!usb_ctx) { + msg_perr("Could not initialize libusb!\n"); + return 1; + } + dediprog_handle = get_device_by_vid_pid_number(0x0483, 0xdada, (unsigned int) usedevice); + if (!dediprog_handle) { msg_perr("Could not find a Dediprog SF100 on USB!\n"); + libusb_exit(usb_ctx); return 1; } - msg_pdbg("Found USB device (%04x:%04x).\n", - dev->descriptor.idVendor, dev->descriptor.idProduct); - dediprog_handle = usb_open(dev); - ret = usb_set_configuration(dediprog_handle, 1); - if (ret < 0) { - msg_perr("Could not set USB device configuration: %i %s\n", - ret, usb_strerror()); - if (usb_close(dediprog_handle)) - msg_perr("Could not close USB device!\n"); + ret = libusb_set_configuration(dediprog_handle, 1); + if (ret != 0) { + msg_perr("Could not set USB device configuration: %i %s\n", ret, libusb_error_name(ret)); + libusb_close(dediprog_handle); + libusb_exit(usb_ctx); return 1; } - ret = usb_claim_interface(dediprog_handle, 0); + ret = libusb_claim_interface(dediprog_handle, 0); if (ret < 0) { - msg_perr("Could not claim USB device interface %i: %i %s\n", - 0, ret, usb_strerror()); - if (usb_close(dediprog_handle)) - msg_perr("Could not close USB device!\n"); + msg_perr("Could not claim USB device interface %i: %i %s\n", 0, ret, libusb_error_name(ret)); + libusb_close(dediprog_handle); + libusb_exit(usb_ctx); return 1; } dediprog_endpoint = 2; -- 1.8.1.1

2 6

External programmers
by Carl-Daniel Hailfinger Dec. 25, 2015

Dec. 25, 2015

Hi, I'm trying to find out which external programmers should be supported next. 1. There was talk of an AVR-based new programmer using the serprog protocol on IRC by someone with the nick "coldelectrons", but I have no idea if he/she is reading this mail. IMHO more hardware using the serprog protocol is always a good idea. 2. All those Willem/Sivava variants. People regularly request those, but I don't think anyone in here owns the hardware. 3. RayeR's SPIPGM. I have a preliminary patch which could work, but I don't have the hardware. Will send the patch to the list soon. 4. LPC^2, Milksop, CheapLPC and other programmers from the Xbox modding community. 5. Dozens of SPI programmer hardware projects scattered over the net. Too many to count, and I'm not sure which of them has more than one user. In general, it seems creating a new programmer hardware design is like writing IRC clients: A nice way to get started in the field. I have no problems merging flashrom support for all of them, but I won't implement support for all of them myself. Regards, Carl-Daniel -- http://www.hailfinger.org/

8 13

Re: [flashrom] flashrom on PowerPC
by Stefan Tauner Nov. 20, 2015

Nov. 20, 2015

On Wed, 27 Jul 2011 18:20:19 +0200 Mattias Mattsson <vitplister(a)gmail.com> wrote: > Hi all, > > I was able to run flashrom under Linux on PPC (big endian) hardware > with two small modifications in internal.c and processor_enable.c (see > attached patch). Not sure if this is the right way to do it but it > seems to work for me. > i am resending this patch (unchanged) because patchwork did not pick it up correctly. please do send one patch per mail only in the future until we have something really working. :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

M25P16, erase (ok) and write (not ok)
by Raven March 1, 2015

March 1, 2015

Hello, here are the test results for "Found Micron/Numonyx/ST flash chip "M25P16" (2048 kB, SPI)". Erase seems to work, but write fails. I tried it with an Arduino Uno (http://www.flashrom.org/Serprog/Arduino_flasher) Output is attached. Greetings

5 17

FAILED: HM77 (Macbook Pro retina)
by Trammell Hudson Dec. 29, 2014

Dec. 29, 2014

No changes were written to the executable portions of the ROM. The data regions at 0x2000-0x2FFF, 0x6400-0x67FF, 0xC000-0x14FFF, 0x1C000, 0x3C000, 0x40000-0x4BFFF were overwritten correctly. My firmware image differed only in those regions below 0x190000, so it might have successfully written to the entire 0x0-0x4BFFF (or even higher) space. The ROM image that I was writing had changes in the executable firmware volume starting at 0x190000. These were not written to the ROM. I have successfully rebooted and can reflash via external SPI if necessary for further tests. Output log from flashrom -V during the write process: flashrom v0.9.6.1-r1564 on Darwin 12.0.0 (x86_64) flashrom was built with libpci 3.1.7, GCC 4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2336.1.00), little endian Command line (8 args): ./flashrom -p internal -V -f -o /Volumes/NO NAME/write.log -w /Volumes/NO NAME/mbp101.rom Calibrating delay loop... OS timer resolution is 1 usecs, 1597M loops per second, 10 myus = 9 us, 100 myus = 127 us, 1000 myus = 1003 us, 10000 myus = 9928 us, 4 myus = 4 us, OK. Initializing internal programmer Error accessing low megabyte, 0x100000 bytes at 0x00000000 Failed getting access to coreboot low tables. dmidecode execution unsuccessful - continuing without DMI info Found chipset "Intel HM77" with PCI ID 8086:1e57. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0xc21: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x9f, read w/o addr, none op[1]: 0x02, write w/ addr, none op[2]: 0x03, read w/ addr, none op[3]: 0x01, write w/o addr, none op[4]: 0x05, read w/o addr, none op[5]: 0x20, write w/ addr, none op[6]: 0xd8, write w/ addr, none op[7]: 0xff, read w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x06 0x06: 0x0004 (HSFC) HSFC: FGO=0, FCYCLE=2, FDBC=0, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x0000ffff (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. 0x58: 0x07ff0190 FREG1: BIOS region (0x00190000-0x007fffff) is read-write. 0x5C: 0x018f0001 FREG2: Management Engine region (0x00001000-0x0018ffff) is read-write. 0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00001fff FREG4: Platform Data region is unused. 0x74: 0x866f0190 PR0: WARNING: 0x00190000-0x0066ffff is read-only. 0x78: 0x9fff0692 PR1: WARNING: 0x00692000-0x01ffffff is read-only. 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled. You can enforce write support with the ich_spi_force programmer option, but it will most likely harm your hardware! If you force flashrom you will get no support if something breaks. 0x90: 0xc4 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xfc4200 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=4 0x94: 0x0606 (PREOP) 0x96: 0x3c6c (OPTYPE) 0x98: 0x0103029f (OPMENU) 0x9C: 0xffd82005 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00800000 (LVSCC) LVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x0, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x64900024 FLILL 0x00000000 --- Details --- Component 1 density: 8 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 50 MHz Write and Erase Clock Freq.: 50 MHz Fast Read is supported. Fast Read Clock Frequency: 50 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x07ff0190 FLREG2 0x018f0001 FLREG3 0x00001fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00190000 - 0x007fffff Region 2 (ME ) 0x00001000 - 0x0018ffff Region 3 (GbE ) is unused. === Master Section === FLMSTR1 0xffff0000 FLMSTR2 0xffff0000 FLMSTR3 0xffff0118 --- Details --- Descr. BIOS ME GbE Platf. BIOS rw rw rw rw rw ME rw rw rw rw rw GbE rw rw rw rw rw SPI Read Configuration: prefetching disabled, caching enabled, OK. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Block Protect 3 (BP3) is not set Chip status register: Block Protect 2 (BP2) is not set Chip status register: Block Protect 1 (BP1) is not set Chip status register: Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000. Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute. Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute. Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not execute. Receiving SFDP signature failed. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017 Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x70, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x70, id2 0x0e, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x34, id2 0x34, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xf8, id2 0x80, id1 is normal flash content, id2 is normal flash content Found Macronix flash chip "MX25L6405" (8192 kB, SPI). Write/erase is not working yet on your programmer in its current configuration. Continuing anyway. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:EERASE FAILED at 0x00001000! Expected=0xff, Read=0x20, failed byte count from 0x00000000-0x0000ffff: 0xada4 ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 1... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:EW, 0x020000-0x02ffff:S, 0x030000-0x03ffff:EW, 0x040000-0x04ffff:EW, 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:S, 0x080000-0x08ffff:S, 0x090000-0x09ffff:S, 0x0a0000-0x0affff:S, 0x0b0000-0x0bffff:S, 0x0c0000-0x0cffff:S, 0x0d0000-0x0dffff:S, 0x0e0000-0x0effff:S, 0x0f0000-0x0fffff:S, 0x100000-0x10ffff:S, 0x110000-0x11ffff:S, 0x120000-0x12ffff:S, 0x130000-0x13ffff:S, 0x140000-0x14ffff:S, 0x150000-0x15ffff:S, 0x160000-0x16ffff:S, 0x170000-0x17ffff:S, 0x180000-0x18ffff:S, 0x190000-0x19ffff:ETransaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: SCGO=0, ACS=1, SPOP=0, COP=6, DBC=0, SME=0, SCF=4 Running OPCODE 0xd8 failed at address 0x190000 (payload length was 0). spi_block_erase_d8 failed during command execution at address 0x190000 Reading current flash chip contents... done. Looking for another erase function. Trying erase function 2... 0x000000-0x7fffff:EInvalid OPCODE 0x06, will not execute. spi_chip_erase_60 failed during command execution Reading current flash chip contents... done. Looking for another erase function. Trying erase function 3... 0x000000-0x7fffff:EInvalid OPCODE 0x06, will not execute. spi_chip_erase_c7 failed during command execution Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything changed. Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Restoring MMIO space at 0x104cb28a0 Restoring PCI config space for 00:1f:0 reg 0xdc

3 3

[PATCH] Add en29lv640b
by Rudolf Marek Aug. 10, 2014

Aug. 10, 2014

Hi Following patch adds the en29lv640b which needs special command sequences in 8 bit mode. Also, 8 bit programming needs actually 16bit double byte program. The chip is found on bifferboard. Please check the patch and let me know. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Thanks Rudolf

4 6

ichspi: fix missing set_addr and crossing of 256 boundary
by Vladimir 'φ-coder/phcoder' Serbinenko Aug. 2, 2014

Aug. 2, 2014

Accoring to PCH documentation crossing 256-byte boundary is invalid and causes wraparound. Please apply attached patch

2 1

[PATCH] Rename programmer registration functions
by Carl-Daniel Hailfinger July 19, 2014

July 19, 2014

register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-rename_register_programmer_register_master/ogp_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/ogp_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/ogp_spi.c (Arbeitskopie) @@ -140,7 +140,7 @@ if (register_shutdown(ogp_spi_shutdown, NULL)) return 1; - if (bitbang_spi_init(&bitbang_spi_master_ogp)) + if (register_spi_bitbang_master(&bitbang_spi_master_ogp)) return 1; return 0; Index: flashrom-rename_register_programmer_register_master/flash.h =================================================================== --- flashrom-rename_register_programmer_register_master/flash.h (Revision 1587) +++ flashrom-rename_register_programmer_register_master/flash.h (Arbeitskopie) @@ -154,7 +154,7 @@ chipaddr virtual_memory; /* Some flash devices have an additional register space. */ chipaddr virtual_registers; - struct registered_programmer *pgm; + struct registered_master *pgm; }; #define TEST_UNTESTED 0 @@ -215,7 +215,7 @@ void map_flash_registers(struct flashctx *flash); int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int erase_flash(struct flashctx *flash); -int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force); +int probe_flash(struct registered_master *pgm, int startchip, struct flashctx *fill_flash, int force); int read_flash_to_file(struct flashctx *flash, const char *filename); int min(int a, int b); int max(int a, int b); Index: flashrom-rename_register_programmer_register_master/drkaiser.c =================================================================== --- flashrom-rename_register_programmer_register_master/drkaiser.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/drkaiser.c (Arbeitskopie) @@ -45,7 +45,7 @@ chipaddr addr); static uint8_t drkaiser_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_drkaiser = { +static const struct par_master par_programmer_drkaiser = { .chip_readb = drkaiser_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -85,7 +85,7 @@ return 1; max_rom_decode.parallel = 128 * 1024; - register_par_programmer(&par_programmer_drkaiser, BUS_PARALLEL); + register_par_master(&par_programmer_drkaiser, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/it87spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/it87spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/it87spi.c (Arbeitskopie) @@ -113,7 +113,7 @@ static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static const struct spi_programmer spi_programmer_it87xx = { +static const struct spi_master spi_programmer_it87xx = { .type = SPI_CONTROLLER_IT87XX, .max_data_read = MAX_DATA_UNSPECIFIED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -199,7 +199,7 @@ if (internal_buses_supported & BUS_SPI) msg_pdbg("Overriding chipset SPI with IT87 SPI.\n"); /* FIXME: Add the SPI bus or replace the other buses with it? */ - register_spi_programmer(&spi_programmer_it87xx); + register_spi_master(&spi_programmer_it87xx); return 0; } Index: flashrom-rename_register_programmer_register_master/gfxnvidia.c =================================================================== --- flashrom-rename_register_programmer_register_master/gfxnvidia.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/gfxnvidia.c (Arbeitskopie) @@ -66,7 +66,7 @@ chipaddr addr); static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_gfxnvidia = { +static const struct par_master par_programmer_gfxnvidia = { .chip_readb = gfxnvidia_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -112,7 +112,7 @@ /* Write/erase doesn't work. */ programmer_may_write = 0; - register_par_programmer(&par_programmer_gfxnvidia, BUS_PARALLEL); + register_par_master(&par_programmer_gfxnvidia, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/nicrealtek.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicrealtek.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicrealtek.c (Arbeitskopie) @@ -40,7 +40,7 @@ static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nicrealtek = { +static const struct par_master par_programmer_nicrealtek = { .chip_readb = nicrealtek_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -82,7 +82,7 @@ if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; - register_par_programmer(&par_programmer_nicrealtek, BUS_PARALLEL); + register_par_master(&par_programmer_nicrealtek, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/serprog.c =================================================================== --- flashrom-rename_register_programmer_register_master/serprog.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/serprog.c (Arbeitskopie) @@ -320,7 +320,7 @@ unsigned char *readarr); static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static struct spi_programmer spi_programmer_serprog = { +static struct spi_master spi_programmer_serprog = { .type = SPI_CONTROLLER_SERPROG, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_WRITE_UNLIMITED, @@ -337,7 +337,7 @@ const chipaddr addr); static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -static const struct par_programmer par_programmer_serprog = { +static const struct par_master par_programmer_serprog = { .chip_readb = serprog_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -673,10 +673,9 @@ sp_streamed_transmit_bytes = 0; sp_opbuf_usage = 0; if (serprog_buses_supported & BUS_SPI) - register_spi_programmer(&spi_programmer_serprog); + register_spi_master(&spi_programmer_serprog); if (serprog_buses_supported & BUS_NONSPI) - register_par_programmer(&par_programmer_serprog, - serprog_buses_supported & BUS_NONSPI); + register_par_master(&par_programmer_serprog, serprog_buses_supported & BUS_NONSPI); return 0; } Index: flashrom-rename_register_programmer_register_master/bitbang_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/bitbang_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/bitbang_spi.c (Arbeitskopie) @@ -63,7 +63,7 @@ const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_bitbang = { +static const struct spi_master spi_programmer_bitbang = { .type = SPI_CONTROLLER_BITBANG, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_WRITE_UNLIMITED, @@ -82,9 +82,9 @@ } #endif -int bitbang_spi_init(const struct bitbang_spi_master *master) +int register_spi_bitbang_master(const struct bitbang_spi_master *master) { - struct spi_programmer pgm = spi_programmer_bitbang; + struct spi_master pgm = spi_programmer_bitbang; /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type, * we catch it here. Same goes for missing initialization of bitbanging * functions. @@ -99,7 +99,7 @@ } pgm.data = master; - register_spi_programmer(&pgm); + register_spi_master(&pgm); /* Only mess with the bus if we're sure nobody else uses it. */ bitbang_spi_request_bus(master); Index: flashrom-rename_register_programmer_register_master/satamv.c =================================================================== --- flashrom-rename_register_programmer_register_master/satamv.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/satamv.c (Arbeitskopie) @@ -46,7 +46,7 @@ chipaddr addr); static uint8_t satamv_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_satamv = { +static const struct par_master par_programmer_satamv = { .chip_readb = satamv_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -156,7 +156,7 @@ /* 512 kByte with two 8-bit latches, and * 4 MByte with additional 3-bit latch. */ max_rom_decode.parallel = 4 * 1024 * 1024; - register_par_programmer(&par_programmer_satamv, BUS_PARALLEL); + register_par_master(&par_programmer_satamv, BUS_PARALLEL); return 0; Index: flashrom-rename_register_programmer_register_master/dummyflasher.c =================================================================== --- flashrom-rename_register_programmer_register_master/dummyflasher.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/dummyflasher.c (Arbeitskopie) @@ -119,7 +119,7 @@ static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -static const struct spi_programmer spi_programmer_dummyflasher = { +static const struct spi_master spi_programmer_dummyflasher = { .type = SPI_CONTROLLER_DUMMY, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -130,7 +130,7 @@ .write_aai = default_spi_write_aai, }; -static const struct par_programmer par_programmer_dummy = { +static const struct par_master par_programmer_dummy = { .chip_readb = dummy_chip_readb, .chip_readw = dummy_chip_readw, .chip_readl = dummy_chip_readl, @@ -401,12 +401,10 @@ return 1; } if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)) - register_par_programmer(&par_programmer_dummy, - dummy_buses_supported & - (BUS_PARALLEL | BUS_LPC | - BUS_FWH)); + register_par_master(&par_programmer_dummy, + dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)); if (dummy_buses_supported & BUS_SPI) - register_spi_programmer(&spi_programmer_dummyflasher); + register_spi_master(&spi_programmer_dummyflasher); return 0; } Index: flashrom-rename_register_programmer_register_master/cli_classic.c =================================================================== --- flashrom-rename_register_programmer_register_master/cli_classic.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/cli_classic.c (Arbeitskopie) @@ -421,10 +421,10 @@ msg_pdbg("The following protocols are supported: %s.\n", tempstr); free(tempstr); - for (j = 0; j < registered_programmer_count; j++) { + for (j = 0; j < registered_master_count; j++) { startchip = 0; while (chipcount < ARRAY_SIZE(flashes)) { - startchip = probe_flash(&registered_programmers[j], startchip, &flashes[chipcount], 0); + startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0); if (startchip == -1) break; chipcount++; @@ -446,12 +446,12 @@ "automatically.\n"); } if (force && read_it && chip_to_probe) { - struct registered_programmer *pgm; + struct registered_master *pgm; int compatible_programmers = 0; msg_cinfo("Force read (-f -r -c) requested, pretending the chip is there:\n"); /* This loop just counts compatible controllers. */ - for (j = 0; j < registered_programmer_count; j++) { - pgm = &registered_programmers[j]; + for (j = 0; j < registered_master_count; j++) { + pgm = &registered_masters[j]; /* chip is still set from the chip_to_probe earlier in this function. */ if (pgm->buses_supported & chip->bustype) compatible_programmers++; @@ -464,8 +464,8 @@ if (compatible_programmers > 1) msg_cinfo("More than one compatible controller found for the requested flash " "chip, using the first one.\n"); - for (j = 0; j < registered_programmer_count; j++) { - pgm = &registered_programmers[j]; + for (j = 0; j < registered_master_count; j++) { + pgm = &registered_masters[j]; startchip = probe_flash(pgm, 0, &flashes[0], 1); if (startchip != -1) break; Index: flashrom-rename_register_programmer_register_master/internal.c =================================================================== --- flashrom-rename_register_programmer_register_master/internal.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/internal.c (Arbeitskopie) @@ -145,7 +145,7 @@ const chipaddr addr); static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -static const struct par_programmer par_programmer_internal = { +static const struct par_master par_programmer_internal = { .chip_readb = internal_chip_readb, .chip_readw = internal_chip_readw, .chip_readl = internal_chip_readl, @@ -348,7 +348,7 @@ * The error code might have been a warning only. */ #if defined(__i386__) || defined(__x86_64__) || defined (__mips) - register_par_programmer(&par_programmer_internal, internal_buses_supported); + register_par_master(&par_programmer_internal, internal_buses_supported); return 0; #else msg_perr("Your platform is not supported yet for the internal " Index: flashrom-rename_register_programmer_register_master/ichspi.c =================================================================== --- flashrom-rename_register_programmer_register_master/ichspi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/ichspi.c (Arbeitskopie) @@ -1514,7 +1514,7 @@ msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr)); } -static const struct spi_programmer spi_programmer_ich7 = { +static const struct spi_master spi_programmer_ich7 = { .type = SPI_CONTROLLER_ICH7, .max_data_read = 64, .max_data_write = 64, @@ -1525,7 +1525,7 @@ .write_aai = default_spi_write_aai, }; -static const struct spi_programmer spi_programmer_ich9 = { +static const struct spi_master spi_programmer_ich9 = { .type = SPI_CONTROLLER_ICH9, .max_data_read = 64, .max_data_write = 64, @@ -1536,7 +1536,7 @@ .write_aai = default_spi_write_aai, }; -static const struct opaque_programmer opaque_programmer_ich_hwseq = { +static const struct opaque_master opaque_programmer_ich_hwseq = { .max_data_read = 64, .max_data_write = 64, .probe = ich_hwseq_probe, @@ -1623,7 +1623,7 @@ } ich_init_opcodes(); ich_set_bbar(0); - register_spi_programmer(&spi_programmer_ich7); + register_spi_master(&spi_programmer_ich7); break; case CHIPSET_ICH8: default: /* Future version might behave the same */ @@ -1808,9 +1808,9 @@ } hwseq_data.size_comp0 = getFCBA_component_density(&desc, 0); hwseq_data.size_comp1 = getFCBA_component_density(&desc, 1); - register_opaque_programmer(&opaque_programmer_ich_hwseq); + register_opaque_master(&opaque_programmer_ich_hwseq); } else { - register_spi_programmer(&spi_programmer_ich9); + register_spi_master(&spi_programmer_ich9); } break; } @@ -1833,7 +1833,7 @@ return 0; } -static const struct spi_programmer spi_programmer_via = { +static const struct spi_master spi_programmer_via = { .type = SPI_CONTROLLER_VIA, .max_data_read = 16, .max_data_write = 16, @@ -1854,7 +1854,7 @@ /* Not sure if it speaks all these bus protocols. */ internal_buses_supported = BUS_LPC | BUS_FWH; ich_generation = CHIPSET_ICH7; - register_spi_programmer(&spi_programmer_via); + register_spi_master(&spi_programmer_via); msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2)); Index: flashrom-rename_register_programmer_register_master/nicintel_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicintel_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicintel_spi.c (Arbeitskopie) @@ -196,7 +196,7 @@ if (register_shutdown(nicintel_spi_shutdown, NULL)) return 1; - if (bitbang_spi_init(&bitbang_spi_master_nicintel)) + if (register_spi_bitbang_master(&bitbang_spi_master_nicintel)) return 1; return 0; Index: flashrom-rename_register_programmer_register_master/opaque.c =================================================================== --- flashrom-rename_register_programmer_register_master/opaque.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/opaque.c (Arbeitskopie) @@ -50,9 +50,9 @@ return flash->pgm->opaque.erase(flash, blockaddr, blocklen); } -int register_opaque_programmer(const struct opaque_programmer *pgm) +int register_opaque_master(const struct opaque_master *pgm) { - struct registered_programmer rpgm; + struct registered_master rpgm; if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) { msg_perr("%s called with incomplete programmer definition. " Index: flashrom-rename_register_programmer_register_master/nicnatsemi.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicnatsemi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicnatsemi.c (Arbeitskopie) @@ -41,7 +41,7 @@ chipaddr addr); static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nicnatsemi = { +static const struct par_master par_programmer_nicnatsemi = { .chip_readb = nicnatsemi_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -75,7 +75,7 @@ * functions below wants to be 0x0000FFFF. */ max_rom_decode.parallel = 131072; - register_par_programmer(&par_programmer_nicnatsemi, BUS_PARALLEL); + register_par_master(&par_programmer_nicnatsemi, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/dediprog.c =================================================================== --- flashrom-rename_register_programmer_register_master/dediprog.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/dediprog.c (Arbeitskopie) @@ -736,7 +736,7 @@ return millivolt; } -static const struct spi_programmer spi_programmer_dediprog = { +static const struct spi_master spi_programmer_dediprog = { .type = SPI_CONTROLLER_DEDIPROG, .max_data_read = MAX_DATA_UNSPECIFIED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -854,7 +854,7 @@ return 1; } - register_spi_programmer(&spi_programmer_dediprog); + register_spi_master(&spi_programmer_dediprog); /* RE leftover, leave in until the driver is complete. */ #if 0 Index: flashrom-rename_register_programmer_register_master/rayer_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/rayer_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/rayer_spi.c (Arbeitskopie) @@ -175,7 +175,7 @@ /* Get the initial value before writing to any line. */ lpt_outbyte = INB(lpt_iobase); - if (bitbang_spi_init(&bitbang_spi_master_rayer)) + if (register_spi_bitbang_master(&bitbang_spi_master_rayer)) return 1; return 0; Index: flashrom-rename_register_programmer_register_master/it85spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/it85spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/it85spi.c (Arbeitskopie) @@ -276,7 +276,7 @@ const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_it85xx = { +static const struct spi_master spi_programmer_it85xx = { .type = SPI_CONTROLLER_IT85XX, .max_data_read = 64, .max_data_write = 64, @@ -312,7 +312,7 @@ * a debug message about it. */ /* Set this as SPI controller. */ - register_spi_programmer(&spi_programmer_it85xx); + register_spi_master(&spi_programmer_it85xx); } return ret; } Index: flashrom-rename_register_programmer_register_master/buspirate_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/buspirate_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/buspirate_spi.c (Arbeitskopie) @@ -132,7 +132,7 @@ static int buspirate_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_buspirate = { +static const struct spi_master spi_programmer_buspirate = { .type = SPI_CONTROLLER_BUSPIRATE, .max_data_read = 12, .max_data_write = 12, @@ -407,7 +407,7 @@ return 1; } - register_spi_programmer(&spi_programmer_buspirate); + register_spi_master(&spi_programmer_buspirate); return 0; } Index: flashrom-rename_register_programmer_register_master/linux_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/linux_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/linux_spi.c (Arbeitskopie) @@ -46,7 +46,7 @@ static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static const struct spi_programmer spi_programmer_linux = { +static const struct spi_master spi_programmer_linux = { .type = SPI_CONTROLLER_LINUX, .max_data_read = MAX_DATA_UNSPECIFIED, /* TODO? */ .max_data_write = MAX_DATA_UNSPECIFIED, /* TODO? */ @@ -115,7 +115,7 @@ return 1; } - register_spi_programmer(&spi_programmer_linux); + register_spi_master(&spi_programmer_linux); return 0; } Index: flashrom-rename_register_programmer_register_master/atahpt.c =================================================================== --- flashrom-rename_register_programmer_register_master/atahpt.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/atahpt.c (Arbeitskopie) @@ -45,7 +45,7 @@ chipaddr addr); static uint8_t atahpt_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_atahpt = { +static const struct par_master par_programmer_atahpt = { .chip_readb = atahpt_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -80,7 +80,7 @@ if (register_shutdown(atahpt_shutdown, NULL)) return 1; - register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL); + register_par_master(&par_programmer_atahpt, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/nic3com.c =================================================================== --- flashrom-rename_register_programmer_register_master/nic3com.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nic3com.c (Arbeitskopie) @@ -60,7 +60,7 @@ chipaddr addr); static uint8_t nic3com_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nic3com = { +static const struct par_master par_programmer_nic3com = { .chip_readb = nic3com_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -116,7 +116,7 @@ return 1; max_rom_decode.parallel = 128 * 1024; - register_par_programmer(&par_programmer_nic3com, BUS_PARALLEL); + register_par_master(&par_programmer_nic3com, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/spi.c (Arbeitskopie) @@ -167,9 +167,9 @@ return flash->pgm->spi.write_aai(flash, buf, start, len); } -int register_spi_programmer(const struct spi_programmer *pgm) +int register_spi_master(const struct spi_master *pgm) { - struct registered_programmer rpgm; + struct registered_master rpgm; if (!pgm->write_aai || !pgm->write_256 || !pgm->read || !pgm->command || !pgm->multicommand || Index: flashrom-rename_register_programmer_register_master/ft2232_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/ft2232_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/ft2232_spi.c (Arbeitskopie) @@ -142,7 +142,7 @@ const unsigned char *writearr, unsigned char *readarr); -static const struct spi_programmer spi_programmer_ft2232 = { +static const struct spi_master spi_programmer_ft2232 = { .type = SPI_CONTROLLER_FT2232, .max_data_read = 64 * 1024, .max_data_write = 256, @@ -356,7 +356,7 @@ // msg_pdbg("\nft2232 chosen\n"); - register_spi_programmer(&spi_programmer_ft2232); + register_spi_master(&spi_programmer_ft2232); return 0; Index: flashrom-rename_register_programmer_register_master/satasii.c =================================================================== --- flashrom-rename_register_programmer_register_master/satasii.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/satasii.c (Arbeitskopie) @@ -43,7 +43,7 @@ static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_satasii = { +static const struct par_master par_programmer_satasii = { .chip_readb = satasii_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -90,7 +90,7 @@ if (register_shutdown(satasii_shutdown, NULL)) return 1; - register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); + register_par_master(&par_programmer_satasii, BUS_PARALLEL); return 0; } Index: flashrom-rename_register_programmer_register_master/wbsio_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/wbsio_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/wbsio_spi.c (Arbeitskopie) @@ -68,7 +68,7 @@ static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -static const struct spi_programmer spi_programmer_wbsio = { +static const struct spi_master spi_programmer_wbsio = { .type = SPI_CONTROLLER_WBSIO, .max_data_read = MAX_DATA_UNSPECIFIED, .max_data_write = MAX_DATA_UNSPECIFIED, @@ -90,7 +90,7 @@ msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is " "1024 kB!\n", __func__); max_rom_decode.spi = 1024 * 1024; - register_spi_programmer(&spi_programmer_wbsio); + register_spi_master(&spi_programmer_wbsio); return 0; } Index: flashrom-rename_register_programmer_register_master/pony_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/pony_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/pony_spi.c (Arbeitskopie) @@ -158,7 +158,7 @@ return 1; } - if (bitbang_spi_init(&bitbang_spi_master_pony)) { + if (register_spi_bitbang_master(&bitbang_spi_master_pony)) { return 1; } return 0; Index: flashrom-rename_register_programmer_register_master/nicintel.c =================================================================== --- flashrom-rename_register_programmer_register_master/nicintel.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/nicintel.c (Arbeitskopie) @@ -48,7 +48,7 @@ chipaddr addr); static uint8_t nicintel_chip_readb(const struct flashctx *flash, const chipaddr addr); -static const struct par_programmer par_programmer_nicintel = { +static const struct par_master par_programmer_nicintel = { .chip_readb = nicintel_chip_readb, .chip_readw = fallback_chip_readw, .chip_readl = fallback_chip_readl, @@ -110,7 +110,7 @@ pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR); max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE; - register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); + register_par_master(&par_programmer_nicintel, BUS_PARALLEL); return 0; Index: flashrom-rename_register_programmer_register_master/sb600spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/sb600spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/sb600spi.c (Arbeitskopie) @@ -194,7 +194,7 @@ return 0; } -static const struct spi_programmer spi_programmer_sb600 = { +static const struct spi_master spi_programmer_sb600 = { .type = SPI_CONTROLLER_SB600, .max_data_read = 8, .max_data_write = 5, @@ -320,7 +320,7 @@ /* Bring the FIFO to a clean state. */ reset_internal_fifo_pointer(); - register_spi_programmer(&spi_programmer_sb600); + register_spi_master(&spi_programmer_sb600); return 0; } Index: flashrom-rename_register_programmer_register_master/mcp6x_spi.c =================================================================== --- flashrom-rename_register_programmer_register_master/mcp6x_spi.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/mcp6x_spi.c (Arbeitskopie) @@ -161,7 +161,7 @@ (status >> MCP6X_SPI_GRANT) & 0x1); mcp_gpiostate = status & 0xff; - if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) { + if (register_spi_bitbang_master(&bitbang_spi_master_mcp6x)) { /* This should never happen. */ msg_perr("MCP6X bitbang SPI master init failed!\n"); return 1; Index: flashrom-rename_register_programmer_register_master/programmer.c =================================================================== --- flashrom-rename_register_programmer_register_master/programmer.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/programmer.c (Arbeitskopie) @@ -96,10 +96,10 @@ return; } -int register_par_programmer(const struct par_programmer *pgm, +int register_par_master(const struct par_master *pgm, const enum chipbustype buses) { - struct registered_programmer rpgm; + struct registered_master rpgm; if (!pgm->chip_writeb || !pgm->chip_writew || !pgm->chip_writel || !pgm->chip_writen || !pgm->chip_readb || !pgm->chip_readw || !pgm->chip_readl || !pgm->chip_readn) { @@ -115,20 +115,20 @@ } /* The limit of 4 is totally arbitrary. */ -#define PROGRAMMERS_MAX 4 -struct registered_programmer registered_programmers[PROGRAMMERS_MAX]; -int registered_programmer_count = 0; +#define MASTERS_MAX 4 +struct registered_master registered_masters[MASTERS_MAX]; +int registered_master_count = 0; -/* This function copies the struct registered_programmer parameter. */ -int register_programmer(struct registered_programmer *pgm) +/* This function copies the struct registered_master parameter. */ +int register_programmer(struct registered_master *pgm) { - if (registered_programmer_count >= PROGRAMMERS_MAX) { + if (registered_master_count >= MASTERS_MAX) { msg_perr("Tried to register more than %i programmer " - "interfaces.\n", PROGRAMMERS_MAX); + "interfaces.\n", MASTERS_MAX); return ERROR_FLASHROM_LIMIT; } - registered_programmers[registered_programmer_count] = *pgm; - registered_programmer_count++; + registered_masters[registered_master_count] = *pgm; + registered_master_count++; return 0; } @@ -138,8 +138,8 @@ int i; enum chipbustype ret = BUS_NONE; - for (i = 0; i < registered_programmer_count; i++) - ret |= registered_programmers[i].buses_supported; + for (i = 0; i < registered_master_count; i++) + ret |= registered_masters[i].buses_supported; return ret; } Index: flashrom-rename_register_programmer_register_master/flashrom.c =================================================================== --- flashrom-rename_register_programmer_register_master/flashrom.c (Revision 1587) +++ flashrom-rename_register_programmer_register_master/flashrom.c (Arbeitskopie) @@ -949,7 +949,7 @@ return 1; } -int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *flash, int force) +int probe_flash(struct registered_master *pgm, int startchip, struct flashctx *flash, int force) { const struct flashchip *chip; unsigned long base = 0; Index: flashrom-rename_register_programmer_register_master/programmer.h =================================================================== --- flashrom-rename_register_programmer_register_master/programmer.h (Revision 1587) +++ flashrom-rename_register_programmer_register_master/programmer.h (Arbeitskopie) @@ -445,7 +445,7 @@ #endif /* bitbang_spi.c */ -int bitbang_spi_init(const struct bitbang_spi_master *master); +int register_spi_bitbang_master(const struct bitbang_spi_master *master); /* buspirate_spi.c */ #if CONFIG_BUSPIRATE_SPI == 1 @@ -517,7 +517,7 @@ #define MAX_DATA_UNSPECIFIED 0 #define MAX_DATA_READ_UNLIMITED 64 * 1024 #define MAX_DATA_WRITE_UNLIMITED 256 -struct spi_programmer { +struct spi_master { enum spi_controller type; unsigned int max_data_read; unsigned int max_data_write; @@ -538,7 +538,7 @@ int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_aai(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); -int register_spi_programmer(const struct spi_programmer *programmer); +int register_spi_master(const struct spi_master *programmer); /* The following enum is needed by ich_descriptor_tool and ich* code. */ enum ich_chipset { @@ -580,7 +580,7 @@ #endif /* opaque.c */ -struct opaque_programmer { +struct opaque_master { int max_data_read; int max_data_write; /* Specific functions for this programmer */ @@ -590,7 +590,7 @@ int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); const void *data; }; -int register_opaque_programmer(const struct opaque_programmer *pgm); +int register_opaque_master(const struct opaque_master *pgm); /* programmer.c */ int noop_shutdown(void); @@ -603,7 +603,7 @@ uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr); uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr); void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); -struct par_programmer { +struct par_master { void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr); void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr); void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr); @@ -614,18 +614,18 @@ void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); const void *data; }; -int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); -struct registered_programmer { +int register_par_master(const struct par_master *pgm, const enum chipbustype buses); +struct registered_master { enum chipbustype buses_supported; union { - struct par_programmer par; - struct spi_programmer spi; - struct opaque_programmer opaque; + struct par_master par; + struct spi_master spi; + struct opaque_master opaque; }; }; -extern struct registered_programmer registered_programmers[]; -extern int registered_programmer_count; -int register_programmer(struct registered_programmer *pgm); +extern struct registered_master registered_masters[]; +extern int registered_master_count; +int register_programmer(struct registered_master *pgm); /* serprog.c */ #if CONFIG_SERPROG == 1 -- http://www.hailfinger.org/

3 4

[PATCH] Add IT8212F as programmer
by Kyösti Mälkki June 1, 2014

June 1, 2014

This PCI PATA controller can use 3V parallel flash upto 128kB. My card was identified as: PCI 1283:8212, subsystem 1283:0001. and labelled as: Innovision Multimedia LTD. EIO ATA133 RAID (DM-8401 Ver A) This particular card did not require setting of any GPIO signals to enable flash writing. My card has Pm39LV512 in PLCC32 package without socket. Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Index: flashrom-it8212f/Makefile =================================================================== --- flashrom-it8212f/Makefile (revision 1539) +++ flashrom-it8212f/Makefile (working copy) @@ -177,7 +177,12 @@ else override CONFIG_SATAMV = no endif +ifeq ($(CONFIG_IT8212), yes) +UNSUPPORTED_FEATURES += CONFIG_IT8212=yes +else +override CONFIG_IT8212 = no endif +endif ifeq ($(TARGET_OS), libpayload) CPPFLAGS += -DSTANDALONE @@ -344,6 +349,9 @@ # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +# Always enable ITE IT8212F PATA controllers for now. +CONFIG_IT8212 ?= yes + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -503,6 +511,12 @@ PROGRAMMER_OBJS += linux_spi.o endif +ifeq ($(CONFIG_IT8212), yes) +FEATURE_CFLAGS += -D'CONFIG_IT8212=1' +PROGRAMMER_OBJS += it8212.o +NEED_PCI := yes +endif + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Index: flashrom-it8212f/print_wiki.c =================================================================== --- flashrom-it8212f/print_wiki.c (revision 1539) +++ flashrom-it8212f/print_wiki.c (working copy) @@ -338,6 +338,9 @@ #if CONFIG_SATAMV == 1 print_supported_pcidevs_wiki(satas_mv); #endif +#if CONFIG_IT8212 == 1 + print_supported_pcidevs_wiki(ata_it82); +#endif printf("\n|}\n"); } Index: flashrom-it8212f/it8212.c =================================================================== --- flashrom-it8212f/it8212.c (revision 0) +++ flashrom-it8212f/it8212.c (revision 0) @@ -0,0 +1,110 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2011 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include "flash.h" +#include "programmer.h" + +static uint8_t *it8212_bar; +static uint8_t it8212_rom_enable = 0; + +#define PCI_VENDOR_ID_ITE 0x1283 + +const struct pcidev_status ata_it82[] = { + {PCI_VENDOR_ID_ITE, 0x8212, OK, "ITE", "8212F PATA RAID"}, + {}, +}; + +#define IT8212_MEMMAP_SIZE (128 * 1024) +#define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1) + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr); +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr); +static const struct par_programmer par_programmer_it8212 = { + .chip_readb = it8212_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = it8212_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static int it8212_shutdown(void *data) +{ + if (! it8212_rom_enable) { + uintptr_t addr = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr & ~0x01); + } + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +int it8212_init(void) +{ + uintptr_t addr; + + /* Needed only for PCI accesses on some platforms. + * FIXME: Refactor that into get_mem_perms/get_io_perms/get_pci_perms? + */ + get_io_perms(); + + /* No need to check for errors, pcidev_init() will not return in case + * of errors. + */ + addr = pcidev_init(PCI_ROM_ADDRESS, ata_it82); + + it8212_bar = physmap("IT8212F flash", addr, IT8212_MEMMAP_SIZE); + if (it8212_bar == ERROR_PTR) + goto error_out_unmap; + if (register_shutdown(it8212_shutdown, NULL)) + return 1; + + /* To restore ROM BAR enable once we are done. */ + it8212_rom_enable = addr & 0x01; + if (! it8212_rom_enable) + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, addr | 0x01); + + max_rom_decode.parallel = IT8212_MEMMAP_SIZE; + register_par_programmer(&par_programmer_it8212, BUS_PARALLEL); + return 0; + +error_out_unmap: + physunmap(it8212_bar, IT8212_MEMMAP_SIZE); + pci_cleanup(pacc); + release_io_perms(); + return 1; +} + +static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) +{ + pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} + +static uint8_t it8212_chip_readb(const struct flashctx *flash, + const chipaddr addr) +{ + return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK)); +} Index: flashrom-it8212f/flashrom.c =================================================================== --- flashrom-it8212f/flashrom.c (revision 1539) +++ flashrom-it8212f/flashrom.c (working copy) @@ -261,6 +261,16 @@ }, #endif +#if CONFIG_IT8212 == 1 + { + .name = "it8212", + .init = it8212_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Index: flashrom-it8212f/programmer.h =================================================================== --- flashrom-it8212f/programmer.h (revision 1539) +++ flashrom-it8212f/programmer.h (working copy) @@ -87,6 +87,9 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +#if CONFIG_IT8212 == 1 + PROGRAMMER_IT8212, +#endif PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -456,6 +459,12 @@ int linux_spi_init(void); #endif +/* it8212.c */ +#if CONFIG_IT8212 == 1 +int it8212_init(void); +extern const struct pcidev_status ata_it82[]; +#endif + /* dediprog.c */ #if CONFIG_DEDIPROG == 1 int dediprog_init(void); Index: flashrom-it8212f/print.c =================================================================== --- flashrom-it8212f/print.c (revision 1539) +++ flashrom-it8212f/print.c (working copy) @@ -538,6 +538,11 @@ programmer_table[PROGRAMMER_LINUX_SPI].name); msg_ginfo("Device files /dev/spidev*.*\n"); #endif +#if CONFIG_IT8212 == 1 + msg_ginfo("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_IT8212].name); + print_supported_pcidevs(ata_it82); +#endif } #if CONFIG_INTERNAL == 1

2 3

[PATCH] CID1130005: Array compared against 0
by Stefan Reinauer May 30, 2014

May 30, 2014

CID1130005: Array compared against 0 The address of an array is never NULL, so the comparison will always evaluate the same way. In selfcheck: Array compared against NULL pointer Since the array is defined unconditionally in C code the check does not really make sense. It might make more sense to check whether there are entries in the array, but that is not required on all platforms so far. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: print.c =================================================================== --- print.c (revision 1763) +++ print.c (working copy) @@ -1073,7 +1073,7 @@ B("ZOTAC", "ZBOX HD-ID11", OK, NULL, NULL), #endif - {0}, + {NULL}, }; /* Please keep this list alphabetically ordered by vendor/board. */ @@ -1101,6 +1101,6 @@ B("Lenovo", "3000 V100 TF05Cxx", OK, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3…", NULL), #endif - {0}, + {NULL}, }; #endif Index: flashrom.c =================================================================== --- flashrom.c (revision 1763) +++ flashrom.c (working copy) @@ -1759,24 +1759,6 @@ if (selfcheck_eraseblocks(chip)) ret = 1; -#if CONFIG_INTERNAL == 1 - if (chipset_enables == NULL) { - msg_gerr("Chipset enables table does not exist!\n"); - ret = 1; - } - if (board_matches == NULL) { - msg_gerr("Board enables table does not exist!\n"); - ret = 1; - } - if (boards_known == NULL) { - msg_gerr("Known boards table does not exist!\n"); - ret = 1; - } - if (laptops_known == NULL) { - msg_gerr("Known laptops table does not exist!\n"); - ret = 1; - } -#endif return ret; }

3 13

[PATCH] Unlock ST M50FW002 correctly
by Carl-Daniel Hailfinger May 29, 2014

May 29, 2014

Unlock ST M50FW002 correctly Refactor ST M50 family unlocking TODO: Unify write_lockbits_49fl00x() and unlock_block_stm50() and unlock_w39_fwh_block() and unlock_82802ab() and write_lockbits_block_49lfxxxc(). They all use exactly the same mechanism, but they don't share any code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-stm50fw002_unlock/flashchips.c =================================================================== --- flashrom-stm50fw002_unlock/flashchips.c (Revision 1437) +++ flashrom-stm50fw002_unlock/flashchips.c (Arbeitskopie) @@ -7523,9 +7523,9 @@ .total_size = 256, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -7536,9 +7536,12 @@ {16 * 1024, 1}, }, .block_erase = erase_block_82802ab, + }, { + .eraseblocks = { {256 * 1024, 1}, }, + .block_erase = NULL, /* Only in A/A mux mode */ } }, - .unlock = unlock_stm50flw0x0x, + .unlock = unlock_stm50fw002, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ Index: flashrom-stm50fw002_unlock/stm50flw0x0x.c =================================================================== --- flashrom-stm50fw002_unlock/stm50flw0x0x.c (Revision 1437) +++ flashrom-stm50fw002_unlock/stm50flw0x0x.c (Arbeitskopie) @@ -3,6 +3,7 @@ * * Copyright (C) 2008 Claus Gindhart <claus.gindhart(a)kontron.com> * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> + * Copyright (C) 2011 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -31,6 +32,21 @@ #include "flashchips.h" #include "chipdrivers.h" +#define STM50_UNLOCKED 0x00 + +static int unlock_block_stm50(struct flashchip *flash, int offset) +{ + chipaddr lock = flash->virtual_registers + offset + 2; + + msg_cdbg("Unlocking at 0x%x\n", offset); + chip_writeb(STM50_UNLOCKED, lock); + if (chip_readb(lock) != STM50_UNLOCKED) { + msg_cerr("Cannot unlock at 0x%x\n", offset); + return -1; + } + return 0; +} + /* * claus.gindhart(a)kontron.com * The ST M50FLW080B and STM50FLW080B chips have to be unlocked, @@ -38,8 +54,6 @@ */ static int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset) { - chipaddr wrprotect = flash->virtual_registers + 2; - static const uint8_t unlock_sector = 0x00; int j; /* @@ -58,22 +72,12 @@ || (offset == 0xF0000)) { // unlock each 4k-sector - for (j = 0; j < 0x10000; j += 0x1000) { - msg_cdbg("unlocking at 0x%x\n", offset + j); - chip_writeb(unlock_sector, wrprotect + offset + j); - if (chip_readb(wrprotect + offset + j) != unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", - offset + j); + for (j = 0; j < 0x10000; j += 0x1000) + if (unlock_block_stm50(flash, offset + j)) return -1; - } - } } else { - msg_cdbg("unlocking at 0x%x\n", offset); - chip_writeb(unlock_sector, wrprotect + offset); - if (chip_readb(wrprotect + offset) != unlock_sector) { - msg_cerr("Cannot unlock sector @ 0x%x\n", offset); + if (unlock_block_stm50(flash, offset)) return -1; - } } return 0; @@ -93,6 +97,27 @@ return 0; } +/* FIXME: Should this be moved to a generic walk_unlockregions()? */ +int unlock_stm50fw002(struct flashchip *flash) +{ + static const struct eraseblock unlockregions[4] = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}}; + int i, j; + int addr = 0; + + for (i = 0; i < 4; i++) { + for (j = 0; j < unlockregions[i].count; j++) { + if (unlock_block_stm50(flash, addr)) + return 1; + addr += unlockregions[i].size; + } + } + return 0; +} + /* This function is unused. */ int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize) { Index: flashrom-stm50fw002_unlock/chipdrivers.h =================================================================== --- flashrom-stm50fw002_unlock/chipdrivers.h (Revision 1437) +++ flashrom-stm50fw002_unlock/chipdrivers.h (Arbeitskopie) @@ -146,5 +146,6 @@ /* stm50flw0x0x.c */ int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize); int unlock_stm50flw0x0x(struct flashchip *flash); +int unlock_stm50fw002(struct flashchip *flash); #endif /* !__CHIPDRIVERS_H__ */ -- http://www.hailfinger.org/

3 3

[PATCH] CID1129998/1129999: Unchecked return value from library
by Stefan Reinauer May 27, 2014

May 27, 2014

CID1129998/1129999: Unchecked return value from library The function returns a value that indicates an error condition. If this is not checked, the error condition may not be handled correctly. In serialport_write_nonblock: Value returned from a library function is not checked for errors before being used. This value may indicate an error condition. In serialport_config: Value returned from a library function is not checked for errors before being used. This value may indicate an error condition. Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: serial.c =================================================================== --- serial.c (revision 1763) +++ serial.c (working copy) @@ -181,7 +181,10 @@ msg_pdbg("Baud rate is %ld.\n", dcb.BaudRate); #else struct termios wanted, observed; - fcntl(fd, F_SETFL, 0); + if (fcntl(fd, F_SETFL, 0) != 0) { + msg_perr_strerror("Could not set serial port mode: "); + return 1; + } if (tcgetattr(fd, &observed) != 0) { msg_perr_strerror("Could not fetch original serial port configuration: "); return 1; @@ -419,14 +422,21 @@ return -1; } if(!SetCommTimeouts(sp_fd, &newTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + return -1; + } #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { -#endif - msg_perr_strerror("Could not set serial port timeout settings %s"); + msg_perr_strerror("Could not set serial port mode to non-blocking: "); return -1; } +#endif int i; int rd_bytes = 0; @@ -458,12 +468,15 @@ /* restore original blocking behavior */ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { + msg_perr_strerror("Could not set serial port timeout settings: "); + ret = -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif - msg_perr_strerror("Could not restore serial port timeout settings: %s\n"); + msg_perr_strerror("Could not set serial port mode to non-blocking: "); ret = -1; } +#endif return ret; } @@ -495,7 +508,14 @@ #else ssize_t rv; const int flags = fcntl(sp_fd, F_GETFL); - fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK); + if (flags == -1) { + msg_perr_strerror("Could not get serial port mode: "); + return -1; + } + if (fcntl(sp_fd, F_SETFL, flags | O_NONBLOCK) != 0) { + msg_perr_strerror("Could not set serial port mode to non-blocking: "); + return -1; + } #endif int i; @@ -531,10 +551,13 @@ #ifdef _WIN32 if (!SetCommTimeouts(sp_fd, &oldTimeout)) { msg_perr_strerror("Could not restore serial port timeout settings: "); + return -1; + } #else if (fcntl(sp_fd, F_SETFL, flags) != 0) { -#endif + msg_perr_strerror("Could not reset serial port mode: "); return -1; } +#endif return ret; }

2 2

[PATCH] CID1130010: Resource leak
by Stefan Reinauer May 26, 2014

May 26, 2014

CID1130010: Resource leak The system resource will not be reclaimed and reused, reducing the future availability of the resource. In verify_range: Leak of memory or pointers to system resources Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Index: flashrom.c =================================================================== --- flashrom.c (revision 1763) +++ flashrom.c (working copy) @@ -676,7 +676,8 @@ if (!flash->chip->read) { msg_cerr("ERROR: flashrom has no read function for this flash chip.\n"); - return 1; + ret = -1; + goto out_free; } if (!readbuf) { msg_gerr("Could not allocate memory!\n");

2 2

Detection of MS-7094 as MS-6702E
by Stelios Tsampas May 14, 2014

May 14, 2014

Flashrom detects MS-7094 (http://www.msi.com/product/mb/K8T-Neo2-F-V2-0.html) as MS-6702E (http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html) Note: flashrom successfully flashed MS-7094 even though it wasn't detected properly but it couldn't flash MS-6702E as it couldn't find a suitable erase command. Edit: Re-attached proper lspci output

2 2

[PATCH] nicintel_eeprom: New programmer for Intel Nics eeproms
by Ricardo Ribalda Delgado May 12, 2014

May 12, 2014

This patch let you read and write the eeprom on your gigagit nic card. So far it has been tested on the 82580 NIC, but there should be other boards also compatibles. It is a nice substitution for the eeupdate tool. Speed is quite decent root@qt5022:~# time ./flashrom -p nicintel_eeprom:pci=03:00.0 -E flashrom v0.9.7-r1622 on Linux 3.11.0-qtec-standard (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found Programmer flash chip "Opaque flash chip" (32 kB, Programmer-specific) on nicintel_eeprom. Erasing and writing flash chip... Erase/write done. real 0m4.699s user 0m4.676s sys 0m0.024s root@qt5022:~# time ./flashrom -p nicintel_eeprom:pci=03:00.0 -w original.kk flashrom v0.9.7-r1622 on Linux 3.11.0-qtec-standard (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found Programmer flash chip "Opaque flash chip" (32 kB, Programmer-specific) on nicintel_eeprom. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. real 0m3.533s user 0m3.516s sys 0m0.018s Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda(a)gmail.com> --- Makefile | 9 ++ flashrom.c | 12 ++ nicintel_eeprom.c | 329 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ programmer.h | 9 ++ 4 files changed, 359 insertions(+) create mode 100644 nicintel_eeprom.c diff --git a/Makefile b/Makefile index 70ef640..e9d5fbf 100644 --- a/Makefile +++ b/Makefile @@ -396,6 +396,9 @@ CONFIG_NICINTEL ?= yes # Always enable SPI on Intel NICs for now. CONFIG_NICINTEL_SPI ?= yes +# Always enable EEPROM on Intel NICs for now. +CONFIG_NICINTEL_EEPROM ?= yes + # Always enable SPI on OGP cards for now. CONFIG_OGP_SPI ?= yes @@ -560,6 +563,12 @@ PROGRAMMER_OBJS += nicintel_spi.o NEED_PCI := yes endif +ifeq ($(CONFIG_NICINTEL_EEPROM), yes) +FEATURE_CFLAGS += -D'CONFIG_NICINTEL_EEPROM=1' +PROGRAMMER_OBJS += nicintel_eeprom.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_OGP_SPI), yes) FEATURE_CFLAGS += -D'CONFIG_OGP_SPI=1' PROGRAMMER_OBJS += ogp_spi.o diff --git a/flashrom.c b/flashrom.c index a00347e..0cb948b 100644 --- a/flashrom.c +++ b/flashrom.c @@ -273,6 +273,18 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_NICINTEL_EEPROM == 1 + { + .name = "nicintel_eeprom", + .type = PCI, + .devs.dev = nics_intel_ee, + .init = nicintel_ee_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_OGP_SPI == 1 { .name = "ogp_spi", diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c new file mode 100644 index 0000000..9719c24 --- /dev/null +++ b/nicintel_eeprom.c @@ -0,0 +1,329 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2013 Ricardo Ribalda - Qtechnology A/S + * + * Based on nicinctel_spi.c and ichspi.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * Datasheet: Intel 82580 Quad/Dual Gigabit Ethernet LAN Controller Datasheet + */ + +#include <stdlib.h> +#include <unistd.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_INTEL 0x8086 +#define MEMMAP_SIZE getpagesize() + +/* EEPROM/Flash Control & Data Register */ +#define EECD 0x10 +#define EERD 0x14 + +/* Eeprom Access register bits +* Section 8.4.1 +*/ +#define EE_SCK 0 +#define EE_CS 1 +#define EE_SI 2 +#define EE_SO 3 +#define EE_REQ 6 +#define EE_GNT 7 +#define EE_PRES 8 +#define EE_SIZE 11 +#define EE_SIZE_MASK 0xf + +#define EERD_START 0 +#define EERD_DONE 1 +#define EERD_ADDR 2 +#define EERD_DATA 16 + +#define BIT(x) (1<<x) +#define PAGE_MASK 0x3f + +uint8_t *nicintel_eebar; +struct pci_dev *nicintel_pci; + +#define UNPROG_DEVICE 0x1509 + +const struct dev_entry nics_intel_ee[] = { + {PCI_VENDOR_ID_INTEL, 0x150e, OK, "Intel", "82580 Quad/Dual Gigabit Ethernet LAN Controller"}, + {PCI_VENDOR_ID_INTEL, UNPROG_DEVICE, OK, "Intel", "Unprogrammed 82580 Quad/Dual Gigabit Ethernet LAN Controller"}, + {0}, +}; + +static int nicintel_ee_probe(struct flashctx *flash) +{ + if (nicintel_pci->device_id == UNPROG_DEVICE) + flash->chip->total_size = 16; + else{ + uint32_t tmp; + tmp = pci_mmio_readl(nicintel_eebar + EECD); + tmp = ((tmp >> EE_SIZE) & EE_SIZE_MASK); + switch (tmp) { + case 7: + flash->chip->total_size = 16; + break; + case 8: + flash->chip->total_size = 32; + break; + default: + msg_cerr("Non supported chip size 0x%x\n", tmp); + return 0; + } + } + + flash->chip->page_size = PAGE_MASK + 1; + flash->chip->tested = TEST_OK_PREW; + flash->chip->gran = write_gran_1byte; + flash->chip->block_erasers->eraseblocks[0].size = (PAGE_MASK + 1); + flash->chip->block_erasers->eraseblocks[0].count = + (flash->chip->total_size * 1024) / (PAGE_MASK + 1); + + return 1; +} + +#define RETRIES_EERD 10000000 +static int nicintel_ee_read_word(unsigned int daddr, uint16_t * word) +{ + uint32_t tmp; + int i; + + tmp = BIT(EERD_START) + (daddr << EERD_ADDR); + pci_mmio_writel(tmp, nicintel_eebar + EERD); + + for (i = 0; i < RETRIES_EERD; i++) { + tmp = pci_mmio_readl(nicintel_eebar + EERD); + if (tmp & BIT(EERD_DONE)) { + *word = (tmp >> EERD_DATA) & 0xffff; + return 0; + } + } + + return -1; +} + +static int nicintel_ee_read(struct flashctx *flash, uint8_t * buf, + unsigned int addr, unsigned int len) +{ + uint16_t word; + + if (addr & 1) { + if (nicintel_ee_read_word(addr / 2, &word)) + return -1; + *buf++ = word & 0xff; + addr++; + len--; + } + + while (len) { + if (nicintel_ee_read_word(addr / 2, &word)) + return -1; + *buf++ = word & 0xff; + addr++; + len--; + if (len) { + *buf++ = (word >> 8) & 0xff; + addr++; + len--; + } + } + + return 0; +} + +static int nicintel_ee_bitset(int reg, int bit, int val) +{ + uint32_t tmp; + + tmp = pci_mmio_readl(nicintel_eebar + reg); + if (val) + tmp |= BIT(bit); + else + tmp &= ~BIT(bit); + pci_mmio_writel(tmp, nicintel_eebar + reg); + + return -1; +} + +static int nicintel_ee_byte(uint8_t mosi, uint8_t * miso) +{ + int i; + uint8_t out = 0x0; + + for (i = 7; i >= 0; i--) { + nicintel_ee_bitset(EECD, EE_SI, mosi & BIT(i)); + nicintel_ee_bitset(EECD, EE_SCK, 1); + if (miso) { + uint32_t tmp = pci_mmio_readl(nicintel_eebar + EECD); + if (tmp & BIT(EE_SO)) + out |= BIT(i); + } + nicintel_ee_bitset(EECD, EE_SCK, 0); + } + + if (miso) + *miso = out; + + return 0; +} + +#define OPCODE_RDSR 0x5 +#define RETRIES_RDSR 100 +#define RDSR_WIP 0 +static int nicintel_ee_ready() +{ + int i; + uint8_t rdsr; + + nicintel_ee_bitset(EECD, EE_CS, 0); + nicintel_ee_byte(OPCODE_RDSR, NULL); + for (i = 0; i < RETRIES_RDSR; i++) { + nicintel_ee_byte(0x00, &rdsr); + if (!(rdsr & BIT(RDSR_WIP))) { + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + return 0; + } + } + + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + + return -1; +} + +static int nicintel_ee_req() +{ + uint32_t tmp; + nicintel_ee_bitset(EECD, EE_REQ, 1); + + tmp = pci_mmio_readl(nicintel_eebar + EECD); + if (!(tmp & BIT(EE_GNT))) { + msg_perr("Enabling eeprom access failed.\n"); + return 1; + } + + nicintel_ee_bitset(EECD, EE_SCK, 0); + return 0; +} + +#define DELAY_WRITE 1000 +#define OPCODE_WRITE 0x2 +#define OPCODE_WREN 0x6 +static int nicintel_ee_write(struct flashctx *flash, uint8_t * buf, + unsigned int addr, unsigned int len) +{ + if (nicintel_ee_req()) + return -1; + + if (nicintel_ee_ready()) { + nicintel_ee_bitset(EECD, EE_REQ, 0); + return -1; + } + + while (len) { + //wren + nicintel_ee_bitset(EECD, EE_CS, 0); + nicintel_ee_byte(OPCODE_WREN, NULL); + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + + //data + nicintel_ee_bitset(EECD, EE_CS, 0); + nicintel_ee_byte(OPCODE_WRITE, NULL); + nicintel_ee_byte((addr >> 8) & 0xff, NULL); + nicintel_ee_byte(addr & 0xff, NULL); + while (len) { + nicintel_ee_byte((buf) ? *buf++ : 0xff, NULL); + len--; + addr++; + if (!(addr & PAGE_MASK)) + break; + } + nicintel_ee_bitset(EECD, EE_CS, 1); + programmer_delay(1); + if (nicintel_ee_ready()) { + nicintel_ee_bitset(EECD, EE_REQ, 0); + return -1; + } + } + + nicintel_ee_bitset(EECD, EE_REQ, 0); + return 0; +} + +static int nicintel_ee_erase(struct flashctx *flash, unsigned int addr, + unsigned int len) +{ + return nicintel_ee_write(flash, NULL, addr, len); +} + +static const struct opaque_programmer opaque_programmer_nicintel_ee = { + .probe = nicintel_ee_probe, + .read = nicintel_ee_read, + .write = nicintel_ee_write, + .erase = nicintel_ee_erase, +}; + +static int nicintel_spi_shutdown(void *data) +{ + + /* See the comment about EECD in nicintel_ee_init() for details. */ + + return 0; +} + +int nicintel_ee_init(void) +{ + struct pci_dev *dev = NULL; + uint32_t tmp; + + if (rget_io_perms()) + return 1; + + dev = pcidev_init(nics_intel_ee, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; + + nicintel_eebar = rphysmap("Intel Gigabit NIC w/ SPI EEPROM", + io_base_addr, MEMMAP_SIZE); + nicintel_pci=dev; + /* Automatic restore of EECD on shutdown is not possible because EECD + * does not only contain EE_REQ but other bits with side effects as well. + * Those other bits must be left untouched. + */ + if (dev->device_id != UNPROG_DEVICE) { + tmp = pci_mmio_readl(nicintel_eebar + EECD); + + if (!(tmp & BIT(EE_PRES))) { + msg_perr("EEprom not present.\n"); + return 1; + } + } + + if (register_shutdown(nicintel_spi_shutdown, NULL)) + return 1; + + return register_opaque_programmer(&opaque_programmer_nicintel_ee); +} diff --git a/programmer.h b/programmer.h index f792d9a..dcf9911 100644 --- a/programmer.h +++ b/programmer.h @@ -78,6 +78,9 @@ enum programmer { #if CONFIG_NICINTEL_SPI == 1 PROGRAMMER_NICINTEL_SPI, #endif +#if CONFIG_NICINTEL_EEPROM == 1 + PROGRAMMER_NICINTEL_EEPROM, +#endif #if CONFIG_OGP_SPI == 1 PROGRAMMER_OGP_SPI, #endif @@ -406,6 +409,12 @@ int nicintel_spi_init(void); extern const struct dev_entry nics_intel_spi[]; #endif +/* nicintel_eeprom.c */ +#if CONFIG_NICINTEL_EEPROM == 1 +int nicintel_ee_init(void); +extern const struct dev_entry nics_intel_ee[]; +#endif + /* ogp_spi.c */ #if CONFIG_OGP_SPI == 1 int ogp_spi_init(void); -- 1.8.4.rc3

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at45db buffer overflow
by degener_trash＠mail.ru May 10, 2014

May 10, 2014

I found buffer overflow at at45db module. Error was in chunk length calculation. Patch is attached. Chip AT45DB041D: reading, writing and erasing operations works correctly. Best regards, Alexander Irenkov

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Re: [flashrom] [PATCH] dummyflasher.c: add an "empty" parameter and initialize with random bytes by default
by Carl-Daniel Hailfinger May 9, 2014

May 9, 2014

Am 21.07.2011 17:54 schrieb Stefan Tauner: > previously the dummies were initialized to be empty (all ones), which makes writes skip > erasing altogether. with this patch the default is to fill it with random bytes instead and the > old behavior can be enforced with stating "empty=yes" on the command line. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Does the following not work for you? dd if=/dev/urandom bs=1k count=4k of=oldimage.bin flashrom -p dummy:emulate=SST25VF032B,image=oldimage.bin -w newimage.bin Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] Reorganize shutting down.
by Stefan Tauner May 7, 2014

May 7, 2014

On Fri, 30 Aug 2013 02:00:34 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > This was mainly driven by getting rid of cli_classic_abort_usage() in cli_classic.c. I forgot to mention something and give a rationale for it: Thereby we also get rid of teasing the user to run flashrom again to show usage information. If we think the user should see the usage information we should show it to him or at least a short syntax summary (which we pretty much lack currently: the programmer parameter syntax is not really well explained). (Small) GNU apps seem to favor printing a similar message like we do. nmap, rsync give their whole usage information which is a bit of a pain because it is so long (unlike flashrom's), ping and hd are examples that just print a syntax summary (but they lack a complete usage help). All of the above is stupid. :P Printing a wall of text does not help and is even counterproductive if one can not scroll. Printing how to print help is also a little bit silly if that help text is not very long anyway. The right™ thing in the case of flashrom is IMHO to print the complete usage help (after improving it to explain the programmer parameter syntax better). RFC. > > This makes the whole main function more consistent and fixes a myriad of > (theoretical) memory leaks. This slightly changes output in most error cases. > doit() stops calling programmer_shutdown() with this patch, beware. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

2 1

[PATCH] Added SST25WF080
by jharper＠iseis.com May 3, 2014

May 3, 2014

This patch adds support for the SST25WF080 1 Mbyte SPI flash chip. It has been very minimally tested (basically one each read/write/verify), on Windows XP with a USB Blaster as the programmer. It worked, although it was horribly slow (at least 15 minutes to program 1 MB) - but I have not otherwise used this hardware/software combination to program anything, so that might be normal. - Jason Harper ---------------------------------------------------------------- This message was sent using IMP, the Internet Messaging Program.

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Compatibility with ECS Socket AM2+
by Leif Middelschulte May 3, 2014

May 3, 2014

Hi, firstofall thanks for your effort with flashrom. It’s really great to be able to flash a bios image independently of Windows. Sorry I didn’t catch the entire/verbose output. Nevertheless I could successfully flash a vendor bios for the following Motherboard: http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=865&M… Regards, Leif

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Is there a sure-fire way to reset any BIOS flash image to its default, out-of-the-box state with no special equipment?
by linx255＠nym.hush.com May 3, 2014

May 3, 2014

Hi, I am seeking an answer to an apparently obscure question. If I install coreboot on my BIOS (UEFI motherboard) and the computer fails to boot, can I reset the BIOS flash to its default image? I've read about possibly changing jumper positions or removing the BIOS battery, but I can't seem to establish if these are sure-fire ways of restoring the original BIOS flash image. I'd like to attempt to install coreboot on a motherboard that doesn't appear to be coreboot-supported, but only if I know I can completely undo this. Is the default BIOS flash image preserved somewhere on a ROM chip or can it only be restored with special equipment? I definitely do not want to end up with an unusable machine. Thanks! Jim

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Erase/write Bios failed on my computer, need some help plz
by Alex Moracchini May 3, 2014

May 3, 2014

Hello Flahsrom staff ! I have a problem with my stuff and flashrom. I want upgrade my Bios version but the erase/write function of flashrom has failed. I use “ASUS P5N32-SLI SE Deluxe” motherboard ( Bios version 0801 ) and i would install this new Bios version : http://fr.driverscollection.com/_440158660264bb85a1400351c90/T%C3%A9l%C3%A9… First operation : # flashrom -p internal flashrom v0.9.7-r1711 on FreeBSD 10.0-RELEASE (i386) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA CK804". Enabling flash write... OK. Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000 . No operations were specified. Second operation : # flashrom -p internal -w P5N32-SLI-SE-ASUS-Deluxe-0901.ROM flashrom v0.9.7-r1711 on FreeBSD 10.0-RELEASE (i386) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA CK804". Enabling flash write... OK. Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000. Reading old flash chip contents... done. Erasing and writing flash chip... writing sector at 0x28c35200 failed! Reading current flash chip contents... done. FAILED at 0x0003c308! Expected=0xff, Found=0x48, failed byte count from 0x00030000-0x0003ffff: 0x3ca7 ERASE FAILED! FAILED! Have you an idea for fix this problem ? Thanks in advance ! Regards. Alex Johnson

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[PATCH] Add support for nforce1 chipset flash enable
by Marcin Kościelnicki May 3, 2014

May 3, 2014

Signed-Off-By: Marcin Kościelnicki <koriakin(a)0x04.net> Index: chipset_enable.c =================================================================== --- chipset_enable.c (revision 1764) +++ chipset_enable.c (working copy) @@ -1075,6 +1075,15 @@ return 0; } +static int enable_flash_nvidia_nforce(struct pci_dev *dev, const char *name) +{ + rpci_write_byte(dev, 0x7a, 0); + if (enable_flash_nvidia_common(dev, name)) + return ERROR_NONFATAL; + else + return 0; +} + static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name) { rpci_write_byte(dev, 0x92, 0); @@ -1417,6 +1426,7 @@ {0x10de, 0x00e0, OK, "NVIDIA", "NForce3", enable_flash_nvidia_nforce2}, /* Slave, should not be here, to fix known bug for A01. */ {0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804}, + {0x10de, 0x01b2, OK, "NVIDIA", "NForce", enable_flash_nvidia_nforce}, {0x10de, 0x0260, OK, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0261, NT, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0262, NT, "NVIDIA", "MCP51", enable_flash_ck804},

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