February 2013 - flashrom - mail.coreboot.org

a serious problem to solve
by Henry Blanco Lores Feb. 8, 2013

Feb. 8, 2013

Hello guys, I have subscribed to this mailing list looking for some help about the use of the flashrom tool. The problem is this: A friend of mine who has just started using Linux, was testing some tools and not reading carefully their corresponding manuals, he executed this command: flashrom -r and this seems to have erased the BIOS of his PC. This is my guess because he just told me by phone that not even the video signal was working. His motherboard is an ASUS P5GC. Is it possible to recover the BIOS back to the previous state?? Please, I will be looking forward for your comments. Thanks in advance. H.

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Re: [flashrom] flashrom ignoring ROM layout region
by Stefan Tauner Feb. 8, 2013

Feb. 8, 2013

On Thu, 7 Feb 2013 16:09:45 -0800 John Gainsborough <jgindc1(a)gmail.com> wrote: > Hi Stefan. > > I am now attempting to write to a flashrom using the layout/region > approach. I need to write a region from a 4MB ROM to the beginning of an > 8MB ROM. > The region image from the 4MB ROM is 4,128,768 bytes == 0x3f0000 long and > this file is called image1. > I have defined the 8MB ROM layout in file called romlayout_8MB to be: > > 000000:3effff main > 3f0000:7fffff remainder > > i.e I want to place the contents of file image1 in to the 8MB ROM region > defined as main. > > I invoked flashrom as follows: > > flashrom -p buspirate_spi:dev=/dev/ttyUSB0,spispeed=250k -l romlayout_8MB > -i main -w image1 > > The flash ROM is detected correctly, delay calculated, but then flashrom > immediately returns the error: > "image size doesn't match". > > As always, guidance/suggestions gratefully received. That's one of the other things my patches fix :) The image you supply with -v/-r/-w is always used to present a mapping of the whole chip. The layout information is only used to select the address range inside that mapping. So for vanilla flashrom you have to create an 8MB file and fill the first 4MB with the content you want and continue as you have done. With my patches one can add an image name to any -i parameter (e.g. -i main:main.img) which is then mapped to the corresponding offset. IIRC one has still to supply a whole image with the correct size, but if the needed ranges are also present as "-i images" then it would not be used at all. Similar for the read operations: it would create a whole image with a lot of 0xFFs outside the selected regions and smaller/exact files for the "-i images". Maybe I have some time at the weekend to integrate the patches. I think there is consensus that we want them in and they have been tested by a number of people, so i think it should not break too much :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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operation details and future changes (was: flashrom ignoring ROM layout region)
by Stefan Tauner Feb. 8, 2013

Feb. 8, 2013

On Fri, 8 Feb 2013 11:08:21 +0100 Mark Marshall <markmarshall14(a)gmail.com> wrote: Hi Mark, > I too would love for these changes to go in. I'm currently working with a > 64MB flash, and > I've got a number of problems, one of which is that flashrom tries to read > the entire flash > before doing anything (which will never be what I want...). It does so to be able to skip blocks that have the wanted content already and to be able to tell you if anything has changed in the case of an error (not so important on external programmes, but very interesting for people writing their live BIOSes and seeing errors). Usually reading does take way less time than erasing/writing or might even speed up the whole process. ATM there is no way to disable this behavior but we plan to do so and IIRC a part of the mentioned patch set is a first step into that direction. > The other problems are: > - That most of flashrom seems to be limited to 2^24 address bits. > (this is relatively easy to fix) We will see about that :) We are of course aware that this is needed quite soon. Do you want to help us with this (mostly testing, but if you like you can also try to create the needed patch)? > - That flashrom thinks a page is always 256 byes (I think I've found > most cases of this, but I'm not sure. What's the granularity flag > for? The flag is there to fix exactly this :) See also http://patchwork.coreboot.org/patch/3757/ Not many chips need this and so we never moved into this direction... do you really need it? > I've also found that flashrom doesn't always do what I expect, and I'm not > sure if this is > by design or not. for instance, if I want to erase my entire flash chip, > it ends up calling > the sector erase on each sector, not by doing a chip-erase? Are these > types of things > written down anywhere? We try to erase the smallest possible blocks first (in order of the eraser array of the chip definition(s) in flashchips.c. This potentially allows to skip writing of block as explained above. It is of course rather useless for the -E/--erase operation, but the code is shared and no one complained yet IIRC (or sent a patch). Most of these details are not documented I think, but some are (in the manpage). Patches for the manpage are welcomed. Everyone is invited to edit the wiki too :) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Added chipsets
by Николай Николаев Feb. 8, 2013

Feb. 8, 2013

Added chipsets: AMIC A25LQ16 Eon EN25S64 Eon EN25S10 Eon EN25S20 Eon EN25S40 Eon EN25S80 Eon EN25QH256 Eon EN25QH128 Eon EN25S32 Eon EN25S16 GigaDevice GD25Q10 GigaDevice GD25Q512 GigaDevice GD25Q128B Numonyx (Micron) N25Q128A13 Numonyx (Micron) N25Q128A11 Numonyx (Micron) N25Q256A11 Numonyx (Micron) N25Q256A13 Numonyx (Micron) N25Q512A11 Numonyx (Micron) N25Q512A13 Numonyx (Micron) N25Q00AA13 Numonyx (Micron) M25PX80 Numonyx (Micron) M45PE16 Numonyx (Micron) M45PE80 Numonyx (Micron) M45PE40 Numonyx (Micron) M45PE10 Numonyx (Micron) M45PE20 Sanyo LE25FW403A Sanyo LE25FW418A Sanyo LE25FW806 Sanyo LE25FW808 Spansion S25FL204K Spansion S25FL128S Spansion S25FL256S Spansion S25FL512S Spansion S25FL208K Spansion S25FL116K Fixed wrong description for Sanyo LE25FW203A -- With best regards Nikolay Nikolaev С Уважением Николаев Николай

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Re: [flashrom] flashrom OPCODES for SPI
by Николай Николаев Feb. 8, 2013

Feb. 8, 2013

The SST25VF040B was added before the new naming scheme was implemented. We > did not want to break any existing software which depends on certain > strings. > Ok i support your fears. it is old chip and has a small capacity. { .vendor = "SST", .name = "SST25VF032B", .bustype = BUS_SPI, .manufacture_id = SST_ID, .model_id = SST_SST25VF032B, .total_size = 4096, .page_size = 256, .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 1024} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {32 * 1024, 128} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 64} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, }, }, .printlock = spi_prettyprint_status_register_sst25, /* TODO: check */ .unlock = spi_disable_blockprotect, .write = spi_aai_write, /* what do i see? - this is a fetch */ .read = spi_chip_read, .voltage = {2700, 3600}, }, for example: if i used chip MX25L3205 and i want to change it on SST25VF032B, that i can't reprogram chip because this chip didn't have a AAI OPcodes 0xAD (i can't change opcodes in SPI controller). But i know my controller has a standard codes for reading and page programming. Voltage can be important for external programmer usage. It's not much > effort to add it, anyway. > How will you choose voltage for external program if you want to program MX25L6439E and MX25U6435F? What value we will write to field voltage? > Some SST25VF040B chips identify using the REMS opcode, others use RDID. > Complain to the manufacturer :-) > Sorry but i can't found REMS code in documentation on this chip. Mayby you give me link on pdf and i will be study on my free time. 8) Support for this chip came before the new naming scheme. In the future, > part names like this will be written as "EN25Q80...P" where the dot '.' is > a wildcard for each letter which does not affect programming capabilities. > Ok how will you mark next chips MX25L6439E and MX25U6435F? That chips has a identical chip ID = 0x2537. if if will be MX25.64...(F) that i think it's don't readable. -- With best regards Nikolay Nikolaev С Уважением Николаев Николай

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Report: ASUSTeK P8H61-I 0504 read
by dpcimanager＠users.sourceforge.net Feb. 8, 2013

Feb. 8, 2013

flashrom v0.9.6.1-r1646 on Darwin 12.2.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.10, LLVM Clang 4.1 ((tags/Apple/clang-421.11.66)), little endian Command line (5 args): ~/Desktop/DPCIManager/DPCIManager.app/Contents/MacOS/flashrom -VV -r /var/folders/m0/d54vw1ks3yzg_05_5kvwdqgm0000gn/T/DPCIXKhC8I.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 470M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1003 us, 10000 myus = 10014 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "P8H61-I" DMI string baseboard-version: "Rev 1.xx" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8771 on port 0x2e Found chipset "Intel H61" with PCI ID 8086:1c5c. Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0xc00: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x6008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0 Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done OP Type Pre-OP op[0]: 0x02, write w/ addr, none op[1]: 0x03, read w/ addr, none op[2]: 0xd8, write w/ addr, none op[3]: 0x05, read w/o addr, none op[4]: 0x90, read w/ addr, none op[5]: 0x01, write w/o addr, none op[6]: 0x9f, read w/o addr, none op[7]: 0xc7, write w/o addr, none Pre-OP 0: 0x06, Pre-OP 1: 0x50 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, FREG0: Warning: Flash Descriptor region (0x00000000-0x00000fff) is read-only. FREG2: Warning: Management Engine region (0x00001000-0x0017ffff) is locked. SME=0 0x08: 0x00182b77 (FADDR) 0x50: 0x00000a0b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b 0x54: 0x00000000 0x58: 0x03ff0180 FREG1: BIOS region (0x00180000-0x003fffff) is read-write. 0x5C: 0x017f0001 0x60: 0x00000fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00000fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled for safety reasons. You can enforce write support with the ich_spi_force programmer option, but you will most likely harm your hardware! If you force flashrom you will get no support if something breaks. On a few mainboards it is possible to enable write access by setting a jumper (see its documentation or the board itself). 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf94010 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1 0x94: 0x5006 (PREOP) 0x96: 0x463b (OPTYPE) 0x98: 0x05d80302 (OPMENU) 0x9C: 0xc79f0190 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00002005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300023 FLILL 0x00000000 --- Details --- Component 1 density: 4 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x03ff0180 FLREG2 0x017f0001 FLREG3 0x00000fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00180000 - 0x003fffff Region 2 (ME ) 0x00001000 - 0x0017ffff Region 3 (GbE ) is unused. === Master Section === FLMSTR1 0x0a0b0000 FLMSTR2 0x0c0d0000 FLMSTR3 0x08080118 --- Details --- Descr. BIOS ME GbE Platf. BIOS r rw rw ME r rw rw GbE rw SPI Read Configuration: prefetching disabled, caching enabled, OK. Super I/O ID 0x8771 is not on the list of flash capable controllers. The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25F512, 64 kB: program_opcodes: preop=5006 optype=460b opmenu=05150302c79f0190 on-the-fly OPCODE (0x15) re-programmed, op-pos=2 probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F512A, 64 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25F1024(A), 128 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F2048, 256 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25F4096, 512 kB: probe_spi_at25f: id1 0xff, id2 0xff Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for GigaDevice GD25LQ32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Intel 25F160S33B8, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Intel 25F160S33T8, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Intel 25F320S33B8, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Intel 25F320S33T8, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Intel 25F640S33B8, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Intel 25F640S33T8, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx N25Q016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx N25Q032..1E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx N25Q032..3E, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx N25Q064..1E, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx N25Q064..3E, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL032A/P, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL064A/P, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25LF040A, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0x15, id2 0x15 Probing for SST SST25LF080(A), 1024 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25WF512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25WF010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25WF020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25WF040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Found Winbond flash chip "W25Q32" (4096 kB, SPI) at physical address 0xffc00000. Chip status register is 0x00. Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Unknown SFDP-capable chip, 0 kB: program_opcodes: preop=5006 optype=462b opmenu=055a0302c79f0190 on-the-fly OPCODE (0x5A) re-programmed, op-pos=2 SFDP revision = 1.0 SFDP number of parameter headers is 1 (NPH = 0). SFDP parameter table header 0/0: ID 0x00, version 1.0 Length 36 B, Parameter Table Pointer 0x000080 Parsing JEDEC flash parameter table... 3-Byte only addressing. Status register is non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR. Write chunk size is at least 64 B. Flash chip size is 4096 kB. Block eraser 0: 1024 x 4096 B with opcode 0x20 Tried to add a duplicate block eraser: 1024 x 4096 B with opcode 0x20. Block eraser 1: 128 x 32768 B with opcode 0x52 Block eraser 2: 64 x 65536 B with opcode 0xd8 done. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond unknown Winbond (ex Nexcom) SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x3d, id2 0x5f, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x80, id2 0xd7, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x80, id2 0xd7, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x39, id2 0x31, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Found Winbond flash chip "W25Q32" (4096 kB, SPI). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). Block protection is disabled. Reading flash... Transaction error! SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0 SSFC: Read operation failed! SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0 Running OPCODE 0x03 failed at address 0x001000 (payload length was 64). FAILED. Restoring MMIO space at 0x1031be8a0 Restoring MMIO space at 0x1031be89c Restoring MMIO space at 0x1031be898 Restoring MMIO space at 0x1031be896 Restoring MMIO space at 0x1031be894 Restoring PCI config space for 00:1f:0 reg 0xdc

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Report: Dell 01HXXJ A05 read
by dpcimanager＠users.sourceforge.net Feb. 8, 2013

Feb. 8, 2013

flashrom v0.9.6.1-r1646 on Darwin 12.2.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.10, LLVM Clang 4.1 ((tags/Apple/clang-421.11.66)), little endian Command line (5 args): /Volumes/Files/kurtn/Downloads/DPCIManager/DPCIManager.app/Contents/MacOS/flashrom -VV -r /var/folders/g8/4hgssf795732rg73l8sdz0d40000gn/T/DPCIzCK01v.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 355M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1028 us, 10000 myus = 10081 us, 4 myus = 4 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. DMI string system-manufacturer: "Dell Inc." DMI string system-product-name: "Inspiron N5050" DMI string system-version: "Not Specified" DMI string baseboard-manufacturer: "Dell Inc." DMI string baseboard-product-name: "01HXXJ" DMI string baseboard-version: "A05" DMI string chassis-type: "Portable" Laptop detected via DMI. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: fc. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed.

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Report: Intel HM67 #2 read
by dpcimanager＠users.sourceforge.net Feb. 8, 2013

Feb. 8, 2013

flashrom v0.9.6.1-r1622 on Darwin 12.2.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, LLVM Clang 4.1 ((tags/Apple/clang-421.11.66)), little endian Command line (5 args): ~/Downloads/DPCIManager/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Desktop/Kexts/bios.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 329M loops per second, 10 myus = 10 us, 100 myus = 104 us, 1000 myus = 1016 us, 10000 myus = 10062 us, 4 myus = 5 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. sh: dmidecode: command not found dmidecode execution unsuccessful - continuing without DMI info W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 85. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found ITE EC, ID 0x8518,Rev 0x02 on port 0x4e. Found chipset "Intel HM67" with PCI ID 8086:1c4b. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x0 0xffe00000/0xffa00000 FWH IDSEL: 0x0 0xffd80000/0xff980000 FWH IDSEL: 0x0 0xffd00000/0xff900000 FWH IDSEL: 0x0 0xffc80000/0xff880000 FWH IDSEL: 0x0 0xffc00000/0xff800000 FWH IDSEL: 0xf 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x380000 bytes BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0xc20: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x00, read w/o addr, none op[1]: 0x00, read w/o addr, none op[2]: 0x00, read w/o addr, none op[3]: 0x00, read w/o addr, none op[4]: 0x00, read w/o addr, none op[5]: 0x00, read w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x00, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x00000a0b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b 0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x03ff0180 FREG1: BIOS region (0x00180000-0x003fffff) is read-write. 0x5C: 0x017f0001 FREG2: WARNING: Management Engine region (0x00001000-0x0017ffff) is locked. 0x60: 0x00000fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00000fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled for safety reasons. You can enforce write support with the ich_spi_force programmer option, but you will most likely harm your hardware! If you force flashrom you will get no support if something breaks. On a few mainboards it is possible to enable write access by setting a jumper (see its documentation or the board itself). 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf80000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 0x94: 0x0000 (PREOP) 0x96: 0x0000 (OPTYPE) 0x98: 0x00000000 (OPMENU) 0x9C: 0x00000000 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300023 FLILL 0x00000000 --- Details --- Component 1 density: 4 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x03ff0180 FLREG2 0x017f0001 FLREG3 0x00000fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00180000 - 0x003fffff Region 2 (ME ) 0x00001000 - 0x0017ffff Region 3 (GbE ) is unused. === Master Section === FLMSTR1 0x0a0b0000 FLMSTR2 0x0c0d0000 FLMSTR3 0x08080118 --- Details --- Descr. BIOS ME GbE Platf. BIOS r rw rw ME r rw rw GbE rw Enabling hardware sequencing because some important opcode is locked. SPI Read Configuration: prefetching enabled, caching enabled, OK. Super I/O ID 0x8518 is not on the list of flash capable controllers. The following protocols are supported: FWH, Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found 1 attached SPI flash chip with a density of 4096 kB. There is only one partition containing the whole address space (0x000000 - 0x3fffff). There are 1024 erase blocks with 4096 B each. Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific) at physical address 0x0. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xcc, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xcc, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific). Reading flash... Reading 4194304 bytes starting at 0x000000. Transaction error between offset 0x00001000 and 0x0000103f (= 0x00001000 + 63)! Read operation failed! HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 FAILED. Restoring MMIO space at 0x1078358a0 Restoring PCI config space for 00:1f:0 reg 0xdc

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Report: Intel HM67 read
by dpcimanager＠users.sourceforge.net Feb. 8, 2013

Feb. 8, 2013

flashrom v0.9.6.1-r1622 on Darwin 12.2.0 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.9, LLVM Clang 4.1 ((tags/Apple/clang-421.11.66)), little endian Command line (5 args): ~/Downloads/DPCIManager/DPCIManager.app/Contents/MacOS/flashrom -VV -r ~/Desktop/Kexts/bios.rom -p internal Calibrating delay loop... OS timer resolution is 1 usecs, 329M loops per second, 10 myus = 10 us, 100 myus = 104 us, 1000 myus = 1016 us, 10000 myus = 10062 us, 4 myus = 5 us, OK. Initializing internal programmer Mapping low megabyte at 0x00000400, unaligned size 0xffc00. Mapping low megabyte, 0xffc00 bytes at unaligned 0x00000400. No coreboot table found. sh: dmidecode: command not found dmidecode execution unsuccessful - continuing without DMI info W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 85. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found ITE EC, ID 0x8518,Rev 0x02 on port 0x4e. Found chipset "Intel HM67" with PCI ID 8086:1c4b. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x0 0xffe00000/0xffa00000 FWH IDSEL: 0x0 0xffd80000/0xff980000 FWH IDSEL: 0x0 0xffd00000/0xff900000 FWH IDSEL: 0x0 0xffc80000/0xff880000 FWH IDSEL: 0x0 0xffc00000/0xff800000 FWH IDSEL: 0xf 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x380000 bytes BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled Root Complex Register Block address = 0xfed1c000 GCS = 0xc20: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 WARNING: SPI Configuration Lockdown activated. Reading OPCODES... done OP Type Pre-OP op[0]: 0x00, read w/o addr, none op[1]: 0x00, read w/o addr, none op[2]: 0x00, read w/o addr, none op[3]: 0x00, read w/o addr, none op[4]: 0x00, read w/o addr, none op[5]: 0x00, read w/o addr, none op[6]: 0x00, read w/o addr, none op[7]: 0x00, read w/o addr, none Pre-OP 0: 0x00, Pre-OP 1: 0x00 0x06: 0x0000 (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x08: 0x00000000 (FADDR) 0x50: 0x00000a0b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b 0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region (0x00000000-0x00000fff) is read-only. 0x58: 0x03ff0180 FREG1: BIOS region (0x00180000-0x003fffff) is read-write. 0x5C: 0x017f0001 FREG2: WARNING: Management Engine region (0x00001000-0x0017ffff) is locked. 0x60: 0x00000fff FREG3: Gigabit Ethernet region is unused. 0x64: 0x00000fff FREG4: Platform Data region is unused. 0x74: 0x00000000 (PR0 is unused) 0x78: 0x00000000 (PR1 is unused) 0x7C: 0x00000000 (PR2 is unused) 0x80: 0x00000000 (PR3 is unused) 0x84: 0x00000000 (PR4 is unused) Please send a verbose log to flashrom(a)flashrom.org if this board is not listed on http://flashrom.org/Supported_hardware#Supported_mainboards yet. Writes have been disabled for safety reasons. You can enforce write support with the ich_spi_force programmer option, but you will most likely harm your hardware! If you force flashrom you will get no support if something breaks. On a few mainboards it is possible to enable write access by setting a jumper (see its documentation or the board itself). 0x90: 0x80 (SSFS) SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0 0x91: 0xf80000 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0 0x94: 0x0000 (PREOP) 0x96: 0x0000 (OPTYPE) 0x98: 0x00000000 (OPMENU) 0x9C: 0x00000000 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x00002005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0 0xD0: 0x00000000 (FPB) Reading flash descriptors mapped by the chipset via FDOC/FDOD... done. === Content Section === FLVALSIG 0x0ff0a55a FLMAP0 0x02040003 FLMAP1 0x12100206 FLMAP2 0x00210120 --- Details --- NR (Number of Regions): 3 FRBA (Flash Region Base Address): 0x040 NC (Number of Components): 1 FCBA (Flash Component Base Address): 0x030 ISL (ICH/PCH Strap Length): 18 FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100 NM (Number of Masters): 3 FMBA (Flash Master Base Address): 0x060 MSL/PSL (MCH/PROC Strap Length): 1 FMSBA (Flash MCH/PROC Strap Base Address): 0x200 === Component Section === FLCOMP 0x09300023 FLILL 0x00000000 --- Details --- Component 1 density: 4 MB Component 2 is not used. Read Clock Frequency: 20 MHz Read ID and Status Clock Freq.: 33 MHz Write and Erase Clock Freq.: 33 MHz Fast Read is supported. Fast Read Clock Frequency: 33 MHz No forbidden opcodes. === Region Section === FLREG0 0x00000000 FLREG1 0x03ff0180 FLREG2 0x017f0001 FLREG3 0x00000fff --- Details --- Region 0 (Descr.) 0x00000000 - 0x00000fff Region 1 (BIOS ) 0x00180000 - 0x003fffff Region 2 (ME ) 0x00001000 - 0x0017ffff Region 3 (GbE ) is unused. === Master Section === FLMSTR1 0x0a0b0000 FLMSTR2 0x0c0d0000 FLMSTR3 0x08080118 --- Details --- Descr. BIOS ME GbE Platf. BIOS r rw rw ME r rw rw GbE rw Enabling hardware sequencing because some important opcode is locked. SPI Read Configuration: prefetching enabled, caching enabled, OK. Super I/O ID 0x8518 is not on the list of flash capable controllers. The following protocols are supported: FWH, Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Found 1 attached SPI flash chip with a density of 4096 kB. There is only one partition containing the whole address space (0x000000 - 0x3fffff). There are 1024 erase blocks with 4096 B each. Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific) at physical address 0x0. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0x75, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xcc, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xcc, id2 0x06, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xfc, id2 0x51, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xc7, id2 0x1a, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content Found Programmer flash chip "Opaque flash chip" (4096 kB, Programmer-specific). Reading flash... Reading 4194304 bytes starting at 0x000000. Transaction error between offset 0x00001000 and 0x0000103f (= 0x00001000 + 63)! Read operation failed! HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0 FAILED. Restoring MMIO space at 0x1078358a0 Restoring PCI config space for 00:1f:0 reg 0xdc

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Re: [flashrom] flashrom ignoring ROM layout region
by Stefan Tauner Feb. 8, 2013

Feb. 8, 2013

On Tue, 5 Feb 2013 14:06:21 -0800 John Gainsborough <jgindc1(a)gmail.com> wrote: > With BusPirate (v3a, firmware 5.10) and flashrom (v0.9.5.2, little endian) > I am attempting to read a region of the flash ROM defined by a ROM layout > file as in: > > flashrom -p buspirate_spi:dev=/dev/ > ttyUSB0,spispeed=200k -l romlayout -i region1 -r read file > > Where file romlayout contains: > > 003f0000:003fffff region1 > > The flash ROM IC is correctly identified, and region1 is listed as being > used, however flashrom then proceeds to read all ROM memory, not just the > area defined by region1. > > I have run this procedure with flash ROMs: > Eon EN25Q32 and EN25Q64. also Micronix MX25L6445 > > Eventually I plan to use this procedure for writing to a defined region. > > Any help/suggestions gratefully received. Hello John, sorry for the confusion. What you see is perfectly ok and expected (at least to us, understandably not so much to the everyday user). The reason is this: the layout and image options are only taken into account for write operations(!) at the moment. I have created patches to use them for all other operations too but they were not merged yet (we really suck at merging stuff, sorry). If you can not or do not want to extract the required data from the complete image you can take a look at those patches: http://patchwork.coreboot.org/user/bundle/37/ They certainly won't apply to the current HEAD, but you can either use the old source or I can rebase them to the current one if you prefer it. Writing only a part should work though. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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ASUS M4N68T-M LE: flashrom -V
by Valery Kasaev Feb. 7, 2013

Feb. 7, 2013

flashrom v0.9.5.2-r1546 on Linux 3.2.0-4-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.6.2, little endian Command line (1 args): flashrom -V Calibrating delay loop... OS timer resolution is 1 usecs, 430M loops per second, delay more than 10% too short (got 30% of expected delay), recalculating... 441M loops per second, delay more than 10% too short (got 31% of expected delay), recalculating... 451M loops per second, delay more than 10% too short (got 31% of expected delay), recalculating... 432M loops per second, delay more than 10% too short (got 30% of expected delay), recalculating... 453M loops per second, 10 myus = 4 us, 100 myus = 31 us, 1000 myus = 311 us, 10000 myus = 5559 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "M4N68T-M LE" DMI string baseboard-version: "Rev X.0x" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8721 on port 0x2e Found chipset "NVIDIA MCP61" with PCI ID 10de:03e1. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Flash bus type is SPI SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 SPI control is 0x0002, req=0, gnt=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. WARNING: unexpected second chipset match: "NVIDIA MCP61" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. Super I/O ID 0x8721 is not on the list of flash capable controllers. The following protocols are supported: SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon EN25QH32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for GigaDevice GD25Q20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for GigaDevice GD25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for GigaDevice GD25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for GigaDevice GD25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for GigaDevice GD25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for GigaDevice GD25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for GigaDevice GD25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Numonyx N25Q064, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Chip status register is 00 Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address 0xfff00000. Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x13 Found Winbond flash chip "W25Q80" (1024 kB, SPI). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). No operations were specified.

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Re: [flashrom] flashrom OPCODES for SPI
by Николай Николаев Feb. 7, 2013

Feb. 7, 2013

Hi David thank for answer 2013/2/7 David Hendricks <dhendrix(a)google.com> > We usually use the .feature_bits member to distinguish these capabilities. > The feature you describe uses "FEATURE_ADDR_AAA" and corresponds to > spi_aai_write(). > I think adding an array of structs struct inside of the flashchip struct > would be more effort than it is worth. It would make working with the > flashchip data structure more complicated, and we'd need to add nested > loops whenever we iterate over the flashchip array. It would also require > flexible arrays which may cause problems with certain compilers. > Sorry but i don't see this "usually" in this code strings for example: { .vendor = "SST", .name = "SST25VF040B", .bustype = BUS_SPI, .manufacture_id = SST_ID, .model_id = SST_SST25VF040B, .total_size = 512, .page_size = 256, .feature_bits = FEATURE_WRSR_EWSR, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, }, { .eraseblocks = { {32 * 1024, 16} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 8} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, }, }, .printlock = spi_prettyprint_status_register_sst25vf040b, .unlock = spi_disable_blockprotect, .write = spi_aai_write, /* "FEATURE_ADDR_AAA" ? */ this is a fetch The software must will use spi_chip_write_256 function. .read = spi_chip_read, .voltage = {2700, 3600}, }, and i thinking that this struct is a little complicated because: 1. this struct has not used field like a voltage and this field can't uniquely define chip voltage because different chips can have a equivalent ID 2. this struct has a not informative field like a name for example that is that - SST25VF040B.REMS. Sorry but i can't understanding different SST25VF040B and that is REMS - is this a comment or other? and i can't found documentation on SST25VF040B.REMS chip. Next example EN25Q80(A) Is this a two chips EN25Q80 and EN25Q80A or other? Is this chip EN25Q80 real? I think adding an array of structs struct inside of the flashchip struct > would be more effort than it is worth. > I think adding an array of struct will be not effort, but testing a software will be effort. > It would make working with the flashchip data structure more complicated, > and we'd need to add nested loops whenever we iterate over the flashchip > array. It would also require flexible arrays which may cause problems with > certain compilers. > If we know chip ID that we can easy searching any chip parameters in other structure. And i think we can easy exclude this parameters from structure The MX25L25835E actually should look the same as MX25L12805D from a > software perspective. The difference is that MX25L25835E is stacked (two > 128Mbit flash memories). Each bank is selected by a different chip-select > line (referred to as CS#1 and CS#2 in the data sheet). > thanks. I'm understanding this is a simple stack but we have a one ID on two different chips..... Will user use flashrom software for program MX25L25835E if software didn't support this chip in list on wiki page, but support MX25L12805D? How will you distinguish chip MX25L25835E from MX25L12805D that chips have a equivalent chip ID. What do you think about link on chip Documentation on wiki page? -- With best regards Nikolay Nikolaev

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Re: [flashrom] flashrom OPCODES for SPI
by David Hendricks Feb. 6, 2013

Feb. 6, 2013

On Wed, Feb 6, 2013 at 4:35 AM, Николай Николаев <evrinoma(a)gmail.com> wrote: > Hi Stefan > > Sorry but i don't want disprove you, i just have a many free time and i > want to improve this project. But the dispute burning truth. 8) > All time from my last mail i'm searching spi flash chips documentation and > I found about 445 chips different brand and sorted them. > May be it will be useful for all community. We will made host with > SPI(Parallel and other) flash chips documentations and add link on wiki > page. > for example > Eon EN25Q64(link to pdf) 8192 SPI ? ? ? ? 2.700 3.600 > > Studied documentation i regularity see that all chips has a support > standard OPcodes like this > WR DATA 0X02 > READ DATA 0X03 > WR DIS 0X04 > READ STATUS 0X05 > WR ENA 0X06 > ... > exclude 10 Atmel chips from amount 445 and for him we will must write > special driver > > and special OPcodes like a > Fast Dual read 0x3B > Auto Address increment 0xAD > and others - that codes is a different fetches spi flash chips > > What does this mean. This mean that a spi controller has a standard > OPcodes for all flash chips and special OPcodes for each one flash chip. > But if we will change flash chip on other flash chip with different special > OPcodes that we will must replace special OPcodes. If we will not do it > that we can't use special OPcodes, but we can use standard OPcodes. > So, for more compatibility we will must verify - Does flash chip support > special OPcodes?. And if chip will support them that we will use them, but > if chip will not support them that we will use a standard OPcodes. > for example: > MX25L6405 > The function write chip used standard OPcodes flash chip called function > spi_chip_write_256 > SST25VF016B > The function write chip used fetches OPcodes flash chip called function > spi_aai_write > If we can't change OPcodes in registers our SPI controller that we will > not write data to chip if we replace them. > But we will make a program check supporting OPcodes and switch a function > from spi_aai_write on spi_chip_write_256 > After that we can easy write to flash > or fast - our SPI controller has supporting fetches OPcodes > or slow - our SPI controller hasn't supporting fetches OPcodes > We usually use the .feature_bits member to distinguish these capabilities. The feature you describe uses "FEATURE_ADDR_AAA" and corresponds to spi_aai_write(). > Also i want to suggest exclude from struct flashchip {} parameters > voltage, name and add array of struct like a chipdata. > The struct chipdata contains information about all possible chip names and > various parameters > Because looked chips documents i see chips that have a one model_id but > have a various chips name, various voltage and various capacity > for example > MX25U6435F and MX25L6439E MX25L12805D and MX25L25835E > You're correct about the naming of similar chips. We introduced a schema to work with this last year to try and deal with the naming: http://www.flashrom.org/pipermail/flashrom/2012-July/009598.html I think adding an array of structs struct inside of the flashchip struct would be more effort than it is worth. It would make working with the flashchip data structure more complicated, and we'd need to add nested loops whenever we iterate over the flashchip array. It would also require flexible arrays which may cause problems with certain compilers. The MX25L25835E actually should look the same as MX25L12805D from a software perspective. The difference is that MX25L25835E is stacked (two 128Mbit flash memories). Each bank is selected by a different chip-select line (referred to as CS#1 and CS#2 in the datasheet). HTH! -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

1 0

Fwd: msi windpad 110w
by Seryi Kuznecov Feb. 6, 2013

Feb. 6, 2013

Hello I want to flash the bios in msi windpad 110w. Russia stands for version 2.07. Around the world 1.06. How do I change the version to 1.06? Standard methods does not work, is an error "error: bios cannot be updated" (most likely defense costs). Protection to remove Bios can not. This option is not present. Help put the bios 1.06. chip MX25L1606E Thank you for your project A non-text attachment has been stripped: EN0E1AMS.106 It is available at http://paste.flashrom.org/view.php?id=1543 A non-text attachment has been stripped: EN0E1AMS.207 It is available at http://paste.flashrom.org/view.php?id=1544

1 0

Re: [flashrom] flashrom OPCODES for SPI
by Николай Николаев Feb. 6, 2013

Feb. 6, 2013

Hi Stefan Sorry but i don't want disprove you, i just have a many free time and i want to improve this project. But the dispute burning truth. 8) All time from my last mail i'm searching spi flash chips documentation and I found about 445 chips different brand and sorted them. May be it will be useful for all community. We will made host with SPI(Parallel and other) flash chips documentations and add link on wiki page. for example Eon EN25Q64(link to pdf) 8192 SPI ? ? ? ? 2.700 3.600 Studied documentation i regularity see that all chips has a support standard OPcodes like this WR DATA 0X02 READ DATA 0X03 WR DIS 0X04 READ STATUS 0X05 WR ENA 0X06 ... exclude 10 Atmel chips from amount 445 and for him we will must write special driver and special OPcodes like a Fast Dual read 0x3B Auto Address increment 0xAD and others - that codes is a different fetches spi flash chips What does this mean. This mean that a spi controller has a standard OPcodes for all flash chips and special OPcodes for each one flash chip. But if we will change flash chip on other flash chip with different special OPcodes that we will must replace special OPcodes. If we will not do it that we can't use special OPcodes, but we can use standard OPcodes. So, for more compatibility we will must verify - Does flash chip support special OPcodes?. And if chip will support them that we will use them, but if chip will not support them that we will use a standard OPcodes. for example: MX25L6405 The function write chip used standard OPcodes flash chip called function spi_chip_write_256 SST25VF016B The function write chip used fetches OPcodes flash chip called function spi_aai_write If we can't change OPcodes in registers our SPI controller that we will not write data to chip if we replace them. But we will make a program check supporting OPcodes and switch a function from spi_aai_write on spi_chip_write_256 After that we can easy write to flash or fast - our SPI controller has supporting fetches OPcodes or slow - our SPI controller hasn't supporting fetches OPcodes Also i want to suggest exclude from struct flashchip {} parameters voltage, name and add array of struct like a chipdata. The struct chipdata contains information about all possible chip names and various parameters Because looked chips documents i see chips that have a one model_id but have a various chips name, various voltage and various capacity for example MX25U6435F and MX25L6439E MX25L12805D and MX25L25835E

1 0

flashrom ignoring ROM layout region
by John Gainsborough Feb. 5, 2013

Feb. 5, 2013

With BusPirate (v3a, firmware 5.10) and flashrom (v0.9.5.2, little endian) I am attempting to read a region of the flash ROM defined by a ROM layout file as in: flashrom -p buspirate_spi:dev=/dev/ ttyUSB0,spispeed=200k -l romlayout -i region1 -r read file Where file romlayout contains: 003f0000:003fffff region1 The flash ROM IC is correctly identified, and region1 is listed as being used, however flashrom then proceeds to read all ROM memory, not just the area defined by region1. I have run this procedure with flash ROMs: Eon EN25Q32 and EN25Q64. also Micronix MX25L6445 Eventually I plan to use this procedure for writing to a defined region. Any help/suggestions gratefully received. John G

1 0

flashrom OPCODES for SPI
by Николай Николаев Feb. 5, 2013

Feb. 5, 2013

Hi Stefan Sorry but i don't want disprove you, i just have a many free time and i want to improve this project. But the dispute burning truth. 8) All time from my last mail i'm searching spi flash chips documentation and I found about 445 chips different brand and sorted them. May be it will be useful for all community. We will made host with SPI(Parallel and other) flash chips documentations and add link on wiki page. for example Eon EN25Q64(link to pdf) 8192 SPI ? ? ? ? 2.700 3.600 Studied documentation i regularity see that all chips has a support standard OPcodes like this WR DATA 0X02 READ DATA 0X03 WR DIS 0X04 READ STATUS 0X05 WR ENA 0X06 ... exclude 10 Atmel chips from amount 445 and for him we will must write special driver and special OPcodes like a Fast Dual read 0x3B Auto Address increment 0xAD and others - that codes is a different fetches spi flash chips What does this mean. This mean that a spi controller has a standard OPcodes for all flash chips and special OPcodes for each one flash chip. But if we will change flash chip on other flash chip with different special OPcodes that we will must replace special OPcodes. If we will not do it that we can't use special OPcodes, but we can use standard OPcodes. So, for more compatibility we will must verify - Does flash chip support special OPcodes?. And if chip will support them that we will use them, but if chip will not support them that we will use a standard OPcodes. for example: MX25L6405 The function write chip used standard OPcodes flash chip called function spi_chip_write_256 SST25VF016B The function write chip used fetches OPcodes flash chip called function spi_aai_write If we can't change OPcodes in registers our SPI controller that we will not write data to chip if we replace them. But we will make a program check supporting OPcodes and switch a function from spi_aai_write on spi_chip_write_256 After that we can easy write to flash or fast - our SPI controller has supporting fetches OPcodes or slow - our SPI controller hasn't supporting fetches OPcodes Also i want to suggest exclude from struct flashchip {} parameters voltage, name and add array of struct like a chipdata. The struct chipdata contains information about all possible chip names and various parameters Because looked chips documents i see chips that have a one model_id but have a various chips name, various voltage and various capacity for example MX25U6435F and MX25L6439E MX25L12805D and MX25L25835E .... -- With best regards Nikolay Nikolaev С Уважением Николаев Николай

1 0

Simple diagram for modern laptop booting flow
by Антон Кочков Feb. 4, 2013

Feb. 4, 2013

Hello! Here is simple diagram for booting flow of modern Intel laptops. Feel free to ask questions, request for improvements, giving hints. Why Intel? Just because it is more complex than modern AMD systems. Why laptop? Same reason - more complex than desktop. If you have an idea howto merge laptop and desktop booting in one diagram - please share. Attaching both png result and MS Visio 2010 source. Best regards, Anton Kochkov.

1 0

[commit] r1648 - trunk
by repository service Feb. 4, 2013

Feb. 4, 2013

Author: stefanct Date: Mon Feb 4 05:38:42 2013 New Revision: 1648 URL: http://flashrom.org/trac/flashrom/changeset/1648 Log: Fix building for MacOSX. - Add a new macro named IS_MACOSX to hwaccess.c and use it to enable iopl(). This was broken since r1638. This fix does *not* restore the very permissive concept where iopl() was activated in an #else branch that was inplace before r1638. - Make printing the image file's size in flashrom.c platform independent. Bonus: remove definitions of off64_t and lseek64 which are not necessary anymore for about 1000 commits. Thanks to SJ for reporting the issue and testing the solution. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashrom.c trunk/hwaccess.c trunk/hwaccess.h Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Sat Feb 2 16:35:44 2013 (r1647) +++ trunk/flashrom.c Mon Feb 4 05:38:42 2013 (r1648) @@ -1121,8 +1121,8 @@ return 1; } if (image_stat.st_size != size) { - msg_gerr("Error: Image size (%ld B) doesn't match the flash chip's size (%ld B)!\n", - image_stat.st_size, size); + msg_gerr("Error: Image size (%jd B) doesn't match the flash chip's size (%ld B)!\n", + (intmax_t)image_stat.st_size, size); fclose(image); return 1; } Modified: trunk/hwaccess.c ============================================================================== --- trunk/hwaccess.c Sat Feb 2 16:35:44 2013 (r1647) +++ trunk/hwaccess.c Mon Feb 4 05:38:42 2013 (r1648) @@ -28,7 +28,8 @@ #define IS_BSD (defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__OpenBSD__)) #define IS_LINUX (defined(__gnu_linux__) || defined(__linux__)) -#if !(IS_BSD || IS_LINUX || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined(__sun)) +#define IS_MACOSX (defined(__APPLE__) && defined(__MACH__)) +#if !(IS_BSD || IS_LINUX || IS_MACOSX || defined(__DJGPP__) || defined(__LIBPAYLOAD__) || defined(__sun)) #error "Unknown operating system" #endif @@ -72,7 +73,7 @@ sysi86(SI86V86, V86SC_IOPL, 0); #elif IS_BSD close(io_fd); -#elif IS_LINUX +#elif IS_LINUX || IS_MACOSX iopl(0); #endif return 0; @@ -87,7 +88,7 @@ if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { #elif IS_BSD if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#elif IS_LINUX +#elif IS_LINUX || IS_MACOSX if (iopl(3) != 0) { #endif msg_perr("ERROR: Could not get I/O privileges (%s).\n" Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Sat Feb 2 16:35:44 2013 (r1647) +++ trunk/hwaccess.h Mon Feb 4 05:38:42 2013 (r1648) @@ -189,8 +189,6 @@ * versions. Use machine/cpufunc.h only for plain FreeBSD/DragonFlyBSD. */ #include <machine/cpufunc.h> - #define off64_t off_t - #define lseek64 lseek #define OUTB(x, y) do { u_int outb_tmp = (y); outb(outb_tmp, (x)); } while (0) #define OUTW(x, y) do { u_int outw_tmp = (y); outw(outw_tmp, (x)); } while (0) #define OUTL(x, y) do { u_int outl_tmp = (y); outl(outl_tmp, (x)); } while (0) @@ -201,8 +199,6 @@ #if defined(__MACH__) && defined(__APPLE__) /* Header is part of the DirectHW library. */ #include <DirectHW/DirectHW.h> - #define off64_t off_t - #define lseek64 lseek #endif #if defined (__sun) && (defined(__i386) || defined(__amd64)) /* Note different order for outb */ @@ -241,8 +237,6 @@ #endif #if defined(__NetBSD__) || defined (__OpenBSD__) - #define off64_t off_t - #define lseek64 lseek #if defined(__i386__) || defined(__x86_64__) #include <sys/types.h> #include <machine/sysarch.h>

1 0

Flashrom ignoring ROM layout regions
by John Gainsborough Feb. 4, 2013

Feb. 4, 2013

With BusPirate (v3a, firmware 5.10) and flashrom (v0.9.5.2, little endian) I am attempting to read a region of the flash ROM defined by a ROM layout file as in: flashrom -p buspirate_spi:dev=/dev/ttyUSB0,spispeed=200k -l romlayout -i region1 -r read file Where file romlayout contains: 003f0000:003fffff region1 The flash ROM IC is correctly identified, and region1 is listed as being used, however flashrom then proceeds to read all ROM memory, not just the area defined by region1. I have run this procedure with flash ROMs: Eon EN25Q32 and EN25Q64. also Micronix MX25L6445 Eventually I plan to use this procedure for writing to a defined region. Any help/suggestions gratefully received. John G

1 0

chip W25Q80 chipset NVIDIA MCP61 motherboard Asrock N68C-S UCC
by Александр Трубицын Feb. 3, 2013

Feb. 3, 2013

Hello! i try to use flashrom with motherboard Asrock N68C-S UCC http://www.asrock.com/mb/manual.asp?Model=N68C-S%20UCC http://www.asrock.com/mb/overview.ru.asp?cat=Manual&Model=N68C-S%20UCC with NVIDIA MCP61 chipset and W25Q80 chip. It is a part of russian manufacture'r computer Depo Ego 9730 http://www.depo.ru/download/drivers/2010/User_Manual/DEPO_Ego_manual_2010.p… I don't find any switches to enabe/disable flash writing on motherboard and in the bios menu. i use OpenSuse 12.2 with this script #!/bin/bash # get information about flash chip & BIOS name="W25Q80_chipset_NVIDIA_MCP61_on_Asrock_N68C-S_UCC" sudo /usr/sbin/flashrom -V > $name.V.txt sudo /usr/sbin/flashrom -VVVr $name.flash > $name.Vr.txt sudo /usr/sbin/flashrom -VVVE > $name.VE.txt sudo /usr/sbin/lspci -nnvvxxx > $name.lspci_nnvvxxx.txt sudo /usr/sbin/superiotool -deV > $name.superiotool.txt and get some warnings from flashrom. There are script's output files in attachment.

2 1

ASUS M5A97: success
by Melchior FRANZ Feb. 3, 2013

Feb. 3, 2013

Hey, a few days ago I successfully flashed an ASUS M5A97 bios (version 0705 to 1605). No problems whatsoever, whereas the BIOS-builtin "AZ Flash 2" turned out to be useless: it didn't even recognize my FAT usb stick. $ sudo /usr/local/sbin/flashrom --programmer internal -w M5A97-ASUS-1605.ROM flashrom v0.9.6.1-r1646 on Linux 3.7.5 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "AMD SB7x0/SB8x0/SB9x0". Enabling flash write... OK. Found Winbond flash chip "W25Q32" (4096 kB, SPI) at physical address 0xffc00000. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. Output from "flashrom -V --programmer=internal" attached. W25Q32 ... chip already listed as supported AMD SB7x0/SB8x0/SB9x0 ... chipset already listed as supported -> ASUS M5A97 ... mainboard *NOT* listed yet Thanks for flashrom! m.

2 7

[PATCH] Fix evil twins of Macronix MX25L1605, MX25L3205, MX25L6405.
by Stefan Tauner Feb. 3, 2013

Feb. 3, 2013

Similarly to the previous patch this one updates the chips identified as above with references to and data about their respective twins. Unlike previously this one deals with the more evil details. Helge Wagner from GE discovered some problems with chips sharing IDs and proposed a patch to tackle (some of) them, see: http://patchwork.coreboot.org/patch/3709/ That patch was bitrotting in our mailboxes for a long time and it is still not ready for merge, but we increasingly get reports about problems (e.g. http://paste.flashrom.org/view.php?id=1525) regarding these chips and hence must act to ensure users' safety. This patch splits the chip definitions of evil twins into separate ones which correctly declare the respective attributes (the main problems are the erase block sizes for the 0x20 opcode and hence my changes combine different chips with partly different attributes apart from their names as long as the erasers layout it the same). This forces the user to select the (right) chip definition with the -c/--chip parameter and hence will break a number of previously perfectly working environments. 0x2015 is used by and split to - MX25L1605 (64kB sectors in 0x20 erases) - MX25L1605A (4kB in 0x20 erases and an additional 0x52 opcode with 64kB blocks) - MX25L1605D/MX25L1608D (4k sectors in 0x20 erases) 0x2016 is used by and split to - MX25L3205, MX25L3205A (64kB 0x20) - MX25L3205D/MX25L3208D (4kB 0x20) - MX25L3206E (4k 0x20, 64k 0x52) 0x2017 is used by and split to - MX25L6405 MX25L6405D (64k 0x20) - MX25L6406E/MX25L6436E (4k 0x20) - MX25L6445E (4k 0x20, 64k 0x52) Bonus: add some minor details to MX25L1635D, MX25L1635E, MX25L3235D, MX25L12805D. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- TODO after merging this: - implement probing methods that are able to distinguish at least some of the evil twins. - where this is not possible discuss alternatives like the somewhat fail-safe spi_block_erase_20_4or64k() by Helge - find and spank the ones reponsible for this whole mess. --- flashchips.c | 270 +++++++++++++++++++++++++++++++++++++++++++++++++++++----- flashchips.h | 8 +- 2 files changed, 252 insertions(+), 26 deletions(-) diff --git a/flashchips.c b/flashchips.c index b976ee6..1783fe7 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5270,10 +5270,45 @@ const struct flashchip flashchips[] = { .block_erasers = { { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_default_bp2, /* bit6: error flag */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX25L1605A", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L1605, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { .eraseblocks = { {4 * 1024, 512} }, - .block_erase = spi_block_erase_20, /* This erase function has 64k blocksize for eLiteFlash */ + .block_erase = spi_block_erase_20, }, { - .eraseblocks = { {64 * 1024, 32} }, /* Not supported in MX25L1605 (eLiteFlash) and MX25L1605D */ + .eraseblocks = { {64 * 1024, 32} }, .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 32} }, @@ -5286,10 +5321,45 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX25L1605D/MX25L1608D", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L1605, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6: CP mode */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ .voltage = {2700, 3600}, }, @@ -5301,7 +5371,8 @@ const struct flashchip flashchips[] = { .model_id = MACRONIX_MX25L1635D, .total_size = 2048, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 64B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5321,10 +5392,10 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, }, @@ -5336,7 +5407,8 @@ const struct flashchip flashchips[] = { .model_id = MACRONIX_MX25L1635E, .total_size = 2048, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 64B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5356,16 +5428,16 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, }, { .vendor = "Macronix", - .name = "MX25L3205", + .name = "MX25L3205(A)", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L3205, @@ -5378,12 +5450,87 @@ const struct flashchip flashchips[] = { .block_erasers = { { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_default_bp2, /* bit6: error flag */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX25L3205D/MX25L3208D", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L3205, + .total_size = 4096, + .page_size = 256, + /* OTP: 64B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { .eraseblocks = { {4 * 1024, 1024} }, .block_erase = spi_block_erase_20, }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6: CP mode */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX25L3206E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L3205, + .total_size = 4096, + .page_size = 256, + /* OTP: 64B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 64} }, .block_erase = spi_block_erase_d8, }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { .eraseblocks = { {4 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, }, { @@ -5391,10 +5538,10 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp3, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */ .voltage = {2700, 3600}, }, @@ -5406,7 +5553,8 @@ const struct flashchip flashchips[] = { .model_id = MACRONIX_MX25L3235D, .total_size = 4096, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* OTP: 256B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5426,7 +5574,7 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5435,13 +5583,14 @@ const struct flashchip flashchips[] = { { .vendor = "Macronix", - .name = "MX25L6405", + .name = "MX25L6405(D)", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L6405, .total_size = 8192, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* MX25L6405D has 64B of OTP; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5461,7 +5610,7 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 has different meanings */ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, @@ -5470,13 +5619,90 @@ const struct flashchip flashchips[] = { { .vendor = "Macronix", - .name = "MX25L12805", + .name = "MX25L6406E/MX25L6436E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L6405, + .total_size = 8192, + .page_size = 256, + /* OTP: 06E 64B/36E 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 for 36E is quad enable */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX25L6445E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L6405, + .total_size = 8192, + .page_size = 256, + /* supports SFDP */ + /* OTP: 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_default_bp3, /* bit6 is quad enable */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX25L12805(D)", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L12805, .total_size = 16384, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN, + /* MX25L12805D has 64B of OTP; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -5496,10 +5722,10 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp3, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* MX25L12805D: Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, diff --git a/flashchips.h b/flashchips.h index d123ab0..22af0e3 100644 --- a/flashchips.h +++ b/flashchips.h @@ -387,10 +387,10 @@ #define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C */ #define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C */ #define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */ -#define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */ -#define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */ -#define MACRONIX_MX25L6405 0x2017 /* MX25L6405{,D}, MX25L6406E, MX25L6436E */ -#define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */ +#define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D (4k 0x20) */ +#define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E (4k 0x20, 64k 0x52) */ +#define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6436E (4k 0x20); MX25L6445E (4k 0x20, 64k 0x52) */ +#define MACRONIX_MX25L12805 0x2018 /* Same as MX25L12805D */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ #define MACRONIX_MX25U1635E 0x2535 -- Kind regards, Stefan Tauner

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[commit] r1647 - trunk
by repository service Feb. 2, 2013

Feb. 2, 2013

Author: stefanct Date: Sat Feb 2 16:35:44 2013 New Revision: 1647 URL: http://flashrom.org/trac/flashrom/changeset/1647 Log: Update Macronix MX25L512, MX25L1005, MX25L2005, MX25L4005, MX25L8005. Update MX25L512 with references to and data about MX25L512E, MX25V512, MX25V512C. Update MX25L1005 with references to and data about MX25L1005C, MX25L1006E. Update MX25L2005 with references to and data about MX25L2005C. Update MX25L4005 with references to and data about MX25L4005A, MX25L4005C. Update MX25L8005 with references to and data about MX25V8005. Bonus: add chip IDs of MX25U1635E, MX25U3235E/F, MX25U6435E/F. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Tue Jan 15 18:37:48 2013 (r1646) +++ trunk/flashchips.c Sat Feb 2 16:35:44 2013 (r1647) @@ -5068,12 +5068,13 @@ { .vendor = "Macronix", - .name = "MX25L512", + .name = "MX25L512(E)/MX25V512(C)", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L512, .total_size = 64, .page_size = 256, + /* MX25L512E supports SFDP */ .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, @@ -5097,21 +5098,22 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp1, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, - .voltage = {2700, 3600}, + .read = spi_chip_read, /* Fast read (0x0B) supported, MX25L512E supports dual I/O */ + .voltage = {2700, 3600}, /* 2.35-3.6V for MX25V512(C) */ }, { .vendor = "Macronix", - .name = "MX25L1005", + .name = "MX25L1005(C)/MX25L1006E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L1005, .total_size = 128, .page_size = 256, + /* MX25L1006E supports SFDP */ .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, @@ -5132,16 +5134,16 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported, MX25L1006E supports dual I/O */ .voltage = {2700, 3600}, }, { .vendor = "Macronix", - .name = "MX25L2005", + .name = "MX25L2005(C)", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L2005, @@ -5170,16 +5172,16 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp1, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, { .vendor = "Macronix", - .name = "MX25L4005", + .name = "MX25L4005(A/C)", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L4005, @@ -5208,16 +5210,16 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, + .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, }, { .vendor = "Macronix", - .name = "MX25L8005", + .name = "MX25L8005/MX25V8005", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX25L8005, @@ -5246,11 +5248,11 @@ .block_erase = spi_block_erase_c7, }, }, - .printlock = spi_prettyprint_status_register_default_bp3, /* TODO: check */ + .printlock = spi_prettyprint_status_register_default_bp2, .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, - .read = spi_chip_read, - .voltage = {2700, 3600}, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, /* 2.35-3.6V for MX25V8005 */ }, { Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Tue Jan 15 18:37:48 2013 (r1646) +++ trunk/flashchips.h Sat Feb 2 16:35:44 2013 (r1647) @@ -382,10 +382,10 @@ * and use the same set of IDs. */ #define MACRONIX_ID 0xC2 /* Macronix (MX) */ -#define MACRONIX_MX25L512 0x2010 /* Same as MX25V512 */ -#define MACRONIX_MX25L1005 0x2011 -#define MACRONIX_MX25L2005 0x2012 -#define MACRONIX_MX25L4005 0x2013 /* MX25L4005{,A} */ +#define MACRONIX_MX25L512 0x2010 /* Same as MX25L512E, MX25V512, MX25V512C */ +#define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */ +#define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C */ +#define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C */ #define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */ #define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */ #define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */ @@ -393,6 +393,9 @@ #define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ +#define MACRONIX_MX25U1635E 0x2535 +#define MACRONIX_MX25U3235E 0x2536 /* Same as MX25U6435F */ +#define MACRONIX_MX25U6435E 0x2537 /* Same as MX25U6435F */ #define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ #define MACRONIX_MX29F001B 0x19 #define MACRONIX_MX29F001T 0x18

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Re: [flashrom] Fw: Appreciate for developing HM65 BIOS R\W tool SW
by zhuzhihui Feb. 1, 2013

Feb. 1, 2013

Dear Stefan Nice to hear from you,we follow your kindly suggestion to upgrade Flashrom from 0.9.4 to 0.9.6, and run command #flashrom -p internal –VV in mentioned Topstar TEB-H8100 manboard,but below the outputt information: flashrom v0.9.6.1-r1564 on Linux 2.6.35.6-45.fc14.i686 (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.5.1 20100924 (Red Hat 4.5.1-4), little endian Command line (3 args): flashrom -p internal -VV Calibrating delay loop... OS timer resolution is 6 usecs, 1096M loops per second, 10 myus = 11 us, 100 myus = 102 us, 1000 myus = 1001 us, 10000 myus = 10005 us, 24 myus = 24 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Topstar Corporation" DMI string system-product-name: "TEB-H8100" DMI string system-version: "0.1" DMI string baseboard-manufacturer: "Topstar Corp." DMI string baseboard-product-name: "TEB-H8100" DMI string baseboard-version: "FAB1" DMI string chassis-type: "Laptop" Laptop detected via DMI. Found ITE Super I/O, ID 0x8782 on port 0x2e Would you pls help analyze above info and give us more indication on restrictions? Thanks. Have a nice weekend! Brs\Jake zhu & David Du From: 杜新雷 Date: 2013-02-01 11:04 To: zhuzhihui Subject: Fw: Re: [flashrom] Appreciate for developing HM65 BIOS R\W tool SW 杜新雷 From: 杜新雷 Date: 2013-01-23 09:44 To: flashrom CC: 缪总; zhuzhihui Subject: Re: Re: [flashrom] Appreciate for developing HM65 BIOS R\W tool SW Hello Stefan , I am very pleased to receive your letter，depending on your tips flashrom version upgrade from 0.9.4 to 0.9.6 OS: FC14 Core Ver.2.6.35.6--45.fc14.i686 (i686) and used following command #flashrom -p internal –VV Following is the output information: flashrom v0.9.6.1-r1564 on Linux 2.6.35.6-45.fc14.i686 (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.5.1 20100924 (Red Hat 4.5.1-4), little endian Command line (3 args): flashrom -p internal -VV Calibrating delay loop... OS timer resolution is 6 usecs, 1096M loops per second, 10 myus = 11 us, 100 myus = 102 us, 1000 myus = 1001 us, 10000 myus = 10005 us, 24 myus = 24 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Topstar Corporation" DMI string system-product-name: "TEB-H8100" DMI string system-version: "0.1" DMI string baseboard-manufacturer: "Topstar Corp." DMI string baseboard-product-name: "TEB-H8100" DMI string baseboard-version: "FAB1" DMI string chassis-type: "Laptop" Laptop detected via DMI. Found ITE Super I/O, ID 0x8782 on port 0x2e we do appreciate for your great help to develop the mentioned tools SW within next week，thank you! Kind regards/David From: Stefan Tauner Date: 2013-01-19 10:03 To: 朱智会 CC: flashrom; 'duxinlei' Subject: Re: [flashrom] Appreciate for developing HM65 BIOS R\W tool SW On Thu, 17 Jan 2013 17:28:53 +0800 朱智会 <zhuzhihui(a)chinalotsynergy.com> wrote: > Dear Sir/Madam > > > > This is Jake zhu and David Du from China Lotsynergy, our company is an IPC > based system integrated provider located in Guangzhou, China. To meet our > customer’s requirement of providing a BIOS R\W tool (OS: FC14 Core Ver. 2. > 6.35.6--45.fc14.i686 (i686)), we tried to seek proper tool in internet and > found FlashRom at the first time. > > We downloaded FlashRom Ver L: v0.9.4-r1455 and used following command > #flashrom -r sysbios.bin, but fail with below error info: > > > > After double check the supported chipset list in website, we found the South > Bridge Chipset HM65 is not supported; however BIOS Flash Chip (W25Q32) is > supported (see below). > > > > So write to you for help to develop a BIOS R\W tools SW (/OS: FC14 Core Ver. > 2.6.35.6--45.fc14.i686 (i686), and below the necessary info for your > reference, due to tight schedule of project, we do appreciate for your great > help to develop the mentioned tools SW within next week. Hello David, in general the chipset as well as the flash chip are well supported by flashrom. The Intel chipsets can however be configured to restrict flash access very firmly. There are various ways to restrict it (forbidden opcodes, write- and read-protected addresses ranges of different kinds etc.). If the board does not set up too many restrictions, flashrom will work for you without problems. The "error" (it is a warning actually, and you can and should read about the details in the man page how to force flashrom to continue) is because the SMBIOS/DMI table in the firmware indicates that it is a mobile device and those sometimes behave in dangerous ways. This is especially the case if the flash chip is not attached to the southbridge but and EC which is sitting between the southbridge and the flash chip. You should also update to a newer version, 0.9.4 is pretty old and I have done quite some work on the intel-related code. When you found out how to tell flashrom to continue even though it thinks it is running on a laptop please send us the output of flashrom -p internal -VV I can then tell you some details about the restrictions set up in the current firmware. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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