October 2012 - flashrom - mail.coreboot.org

[PATCH] Remove exit call from sys_physmap_*
by Niklas Söderlund Sept. 13, 2013

Sept. 13, 2013

All callers are prepared to handle error if ERROR_PTR is returned. Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- physmap.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/physmap.c b/physmap.c index 5aa9874..adce315 100644 --- a/physmap.c +++ b/physmap.c @@ -173,12 +173,11 @@ static void *sys_physmap_rw_uncached(unsigned long phys_addr, size_t len) /* Open the memory device UNCACHED. Important for MMIO. */ if (-1 == (fd_mem = open(MEM_DEV, O_RDWR | O_SYNC))) { perror("Critical error: open(" MEM_DEV ")"); - exit(2); + return ERROR_PTR; } } - virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, - fd_mem, (off_t)phys_addr); + virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, fd_mem, (off_t)phys_addr); return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; } @@ -192,14 +191,12 @@ static void *sys_physmap_ro_cached(unsigned long phys_addr, size_t len) if (-1 == fd_mem_cached) { /* Open the memory device CACHED. */ if (-1 == (fd_mem_cached = open(MEM_DEV, O_RDWR))) { - msg_perr("Critical error: open(" MEM_DEV "): %s", - strerror(errno)); - exit(2); + msg_perr("Critical error: open(" MEM_DEV "): %s", strerror(errno)); + return ERROR_PTR; } } - virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED, - fd_mem_cached, (off_t)phys_addr); + virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED, fd_mem_cached, (off_t)phys_addr); return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; } @@ -209,7 +206,7 @@ void physunmap(void *virt_addr, size_t len) msg_pspew("Not unmapping zero size at %p\n", virt_addr); return; } - + munmap(virt_addr, len); } #endif -- 1.7.12.3

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[PATCH] Add git support to the Makefile
by Carl-Daniel Hailfinger Aug. 21, 2013

Aug. 21, 2013

flashrom relies on svn to export tarballs and only prints the last svn revision in the version message even if flashrom is in a git tree. Print extended version information (version, svn revision, git hash, repository URL). Allow exporting from git trees. This should make git users first-class citizens like svn users. Side note: If anyone has an idea how to make the export target more beautiful (80 column limit etc.), please tell me. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-gitfriendly/Makefile =================================================================== --- flashrom-gitfriendly/Makefile (Revision 1145) +++ flashrom-gitfriendly/Makefile (Arbeitskopie) @@ -97,13 +97,15 @@ # of the checked out flashrom files. # Note to packagers: Any tree exported with "make export" or "make tarball" # will not require subversion. The downloadable snapshots are already exported. -SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) +SCMVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) +SCMEXTVERSION := $(shell LC_ALL=C git rev-parse HEAD 2>/dev/null | sed 's/^./-\0/') +SCMURL := $(shell LC_ALL=C svn info 2>/dev/null | grep URL: | sed 's/.*URL:[[:blank:]]*//' | grep ^. || LC_ALL=C git remote show origin 2>/dev/null |grep URL: | sed 's/.*URL:[[:blank:]]*//' | grep ^. || echo unknown ) RELEASE := 0.9.2 -VERSION := $(RELEASE)-r$(SVNVERSION) +VERSION := $(RELEASE)-r$(SCMVERSION)$(SCMEXTVERSION) RELEASENAME ?= $(VERSION) -SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"' +SCMDEF := -D'FLASHROM_VERSION="$(VERSION)"' -D'FLASHROM_SCMURL="$(SCMURL)"' # Always enable internal/onboard support for now. CONFIG_INTERNAL ?= yes @@ -310,7 +312,7 @@ TAROPTIONS = $(shell LC_ALL=C tar --version|grep -q GNU && echo "--owner=root --group=root") %.o: %.c .features - $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FEATURE_CFLAGS) $(SVNDEF) -o $@ -c $< + $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FEATURE_CFLAGS) $(SCMDEF) -o $@ -c $< # Make sure to add all names of generated binaries here. # This includes all frontends and libflashrom. @@ -420,9 +422,12 @@ export: @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) - @svn export -r BASE . $(EXPORTDIR)/flashrom-$(RELEASENAME) - @sed "s/^SVNVERSION.*/SVNVERSION := $(SVNVERSION)/" Makefile >$(EXPORTDIR)/flashrom-$(RELEASENAME)/Makefile - @LC_ALL=C svn log >$(EXPORTDIR)/flashrom-$(RELEASENAME)/ChangeLog + @svn export -r BASE . $(EXPORTDIR)/flashrom-$(RELEASENAME) 2>/dev/null || git checkout-index -a -f --prefix=$(EXPORTDIR)/flashrom-$(RELEASENAME)/ + @# If SCMVERSION or SCMEXTVERSION contain a slash or SCMURL contains a hash, this will explode + @sed "s/^SCMVERSION.*/SCMVERSION := $(SCMVERSION)/;s/^SCMEXTVERSION.*/SCMEXTVERSION := $(SCMEXTVERSION)/;s#^SCMURL.*#SCMURL := $(SCMURL)#" Makefile >$(EXPORTDIR)/flashrom-$(RELEASENAME)/Makefile + @# ChangeLog should be in English, but we want UTF-8 for names. + @( LC_ALL=en_US.UTF-8 svn log 2>/dev/null || LC_ALL=en_US.UTF-8 git log 2>/dev/null || echo "Unable to extract log from SCM" ) >$(EXPORTDIR)/flashrom-$(RELEASENAME)/ChangeLog + @rm -f $(EXPORTDIR)/flashrom-$(RELEASENAME)/.gitignore $(EXPORTDIR)/flashrom-$(RELEASENAME)/.gitattributes $(EXPORTDIR)/flashrom-$(RELEASENAME)/.gitmodules @echo Exported $(EXPORTDIR)/flashrom-$(RELEASENAME)/ tarball: export Index: flashrom-gitfriendly/flashrom.c =================================================================== --- flashrom-gitfriendly/flashrom.c (Revision 1145) +++ flashrom-gitfriendly/flashrom.c (Arbeitskopie) @@ -1355,6 +1355,7 @@ void print_version(void) { msg_ginfo("flashrom v%s", flashrom_version); + msg_ginfo(" from " FLASHROM_SCMURL ","); print_sysinfo(); } @@ -1362,7 +1363,6 @@ { msg_ginfo("flashrom is free software, get the source code at " "http://www.flashrom.org\n"); - msg_ginfo("\n"); } int selfcheck(void) -- http://www.hailfinger.org/

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Re: [flashrom] [coreboot] Dualbios on GA-MA770-UD3
by Carl-Daniel Hailfinger Aug. 10, 2013

Aug. 10, 2013

Hi Vadim, thanks for your mail. I have added the flashrom mailing list in CC: because we should develop a generic way to handle DualBIOS and similar techniques. On 09.04.2010 08:12, Vadim Girlin wrote: > I'm going to try coreboot on Gigabyte GA-MA770-UD3. > It's AMD 770 (RX780 / SB700). > > My motherboard supports hardware dual bios - with two chips on it. > I'm going to try flashing backup chip and boot from it. It seems to be > possible - I've tested it (flashing at least). Chips on this board could > be switched by changing bit 0 at undocumented register EF on LDN 7 of > IT8720. I can use slightly patched flashrom for accessing any chip I > want without any problems. And this is tested many times. > > My idea is to use backup chip for debugging - that always keeps my > chance to reboot from main bios chip. And removes the need for > desoldering etc. > > And second problem is that original bios is checking second chip - and > trying to recover it by flashing the bios from main chip on reboot? > rewriting coreboot. AFAICS this could be solved by including some > signatures etc. It seems to be easy to find out. May be someone is > working on this? > > BTW I can send the patch for flashrom - but I think that with > information I mentioned above somebody could make it much better than my > ugly hack. I hope the regs should be the same for all latest Gigabyte > MBs using IT8720/18 > It would be great if you could send that patch. It will help us make a flashrom design decision that works for all boards with multiple flash chips. By the way, some of us have good contacts at ITE, so we can ask ITE for details about the undocumented registers. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[RFC] Layout handling...
by Carl-Daniel Hailfinger July 12, 2013

July 12, 2013

Hi, before we change flashrom to work with current layout requirements, we should summarize the features we need/want, and then decide how to handle the individual layout regions internally. Terms: "write strategy" describes a combination of erase+write commands with a given block size, touching some blocks. "read protected" describes a region which can not be read. "write protected" describes a region which can not be written. "write once" describes a region which can be written exactly once in the chip lifetime. If you add a feature to the list, please give it a nickname so we know which feature people are referring to. Some of the features below might not be desirable, but I want to list them anyway so we can explicitly declare them as unsupported if needed. fullwrite-unrestricted: Write a chip-sized image, no special read/write restrictions of the chip, no layout file needs to be specified. Default write case right now. fullwrite-noread: Write a chip-sized image, reading anything from the chip is not possible. Many DVD writers fall in that category. No verification, violates our reliability guarantees. fullwrite-postread: Write a chip-sized image, reading anything from the chip is only possible after write. Chips which are read-locked until a full erase/write fall in that category. Do those exist as standalone flash chips or only integrated into processors? fullwrite-partialread: Write a chip-sized image, reading is only possible in some chip regions. Only partial verification, violates our reliability guarantees. fullwrite-partialwrite: Write a chip-sized image, but writing is only possible in some regions. This is obviously a conflict unless the image has the same contents as the chip in the write-protected regions and there is a possible write strategy for the whole image which does not touch the write-protected regions. Should flashrom always refuse this scenario, or only refuse it in case of conflicts? partialwrite-unrestricted: Write only parts of an image, the rest of the chip contents is kept, no special read/write restrictions. partialwrite-partialread: Write only parts of an image, the rest of the chip contents is kept, reading is only possible in some chip regions. If no read-protected regions are written and a suitable write strategy exists, should flashrom warn? If a read-protected region is written, should flashrom warn/refuse due to reliability requirements? partialwrite-partialwrite: Write only parts of an image, the rest of the chip contents is kept, writing is only possible in some chip regions. If no write-protected regions are written and a suitable write strategy exists, should flashrom warn? flashrom will refuse to write a write-protected region. fullread-unrestricted: Read the full chip, no special read restrictions of the chip. partialread-unrestricted: Read only parts of a chip, no special read restrictions of the chip. partialread-partialread: Read only parts of a chip, some regions are read-protected. flashrom should refuse to read any read-protected regions. partialread-imagefiller: If only parts of a chip are read and the read image has full chip size, what should be used as filler for unread regions? 0x00 or 0xff? partialread-layout-imagesize: If only parts of a chip are read, should the read image still have full chip size with all read regions filled in at the respective locations? partialread-layout-split: If only parts of a chip are read, should it be possible to write each region (or a combination thereof) to a separate image file, and would that mapping be specified in the layout file? partialwrite-layout-split: If only parts of a chip are written, should it be possible to collect each part of the new image from a separate image file, and would that mapping be specified in the layout file? readwrite-protection-time: Which read protection and write protection times exist? Temporary lock until unlock, temporary lock until chip soft reset, temporary lock until chip/programmer hard reset (powerdown or reset line), permanent eternal lock. readwrite-protection-type: Which read protection and write protection types exist? Programmer lock (e.g. Intel SPI), hardware chip lock (WP pin), software chip lock (chip command). readwrite-protection-interaction: How should we express this situation: A region is write-locked with a software chip lock, but to remove that software chip lock, a hardware chip lock has to be disabled first, then the software chip lock can be disabled. partialaccess-crash: Some regions in the chip are really off-limits and will cause an unrecoverable error (system crash) when accessed (read or write). That seems to be the case for some EC/flash interactions. Comments? Any forks of flashrom (e.g. chromium) which need infrastructure features not mentioned above? Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] Intel C602 support
by Stefan Tauner March 13, 2013

March 13, 2013

On Mon, 6 Aug 2012 12:07:47 -0700 Greg Schardt <gschardt(a)ddn.com> wrote: > Can you explain why doing a read operation failed? I expected that reads would work and writes would fail. each region can have 4 different access states: read/write, read-only, write-only (never seen in practice), locked (neither read nor write allowed) (see FREG in the public datasheets for any newer intel southbridge >ICH8). flashrom disables writes by default if it detects locked or read-only regions as a safety measurement and still allows reads because they can not lead to the same severe damage. in case of locked regions reads of addresses inside those regions will of course fail. there are some patches available that are not merged yet that allow to specify the addresses to be read/written, which allow to read/write the readable/writable address ranges. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashrom -p gfxnvidia detect my atheros ath9k wifi card
by Denis 'GNUtoo' Carikli Jan. 6, 2013

Jan. 6, 2013

Hi, Here are the logs: # ./flashrom -p gfxnvidia -VVV flashrom v0.9.5.2-r1546 on Linux 3.0.0-19-generic-pae (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.6.1, little endian Command line (3 args): ./flashrom -p gfxnvidia -VVV Calibrating delay loop... OS timer resolution is 1 usecs, 1503M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10007 us, 4 myus = 4 us, OK. Initializing gfxnvidia programmer Found "NVIDIA RIVA TNT2 Ultra" (168c:0029, BDF 03:06.0). PCI header type 0x00 Requested BAR is MEM, 32bit, not prefetchable === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Detected NVIDIA I/O base address: 0xd8600000. The following protocols are supported: Parallel. Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Eon EN29LV640B, 8192 kB: probe_en29lv640b: id1 0xffff, id2 0x00ff Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm39LV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring PCI config space for 03:06:0 reg 0x50 # lspci -n 00:00.0 0600: 1022:9601 00:01.0 0604: 1022:9602 00:0a.0 0604: 1022:9609 00:11.0 0106: 1002:4390 00:12.0 0c03: 1002:4397 00:12.1 0c03: 1002:4398 00:12.2 0c03: 1002:4396 00:13.0 0c03: 1002:4397 00:13.1 0c03: 1002:4398 00:13.2 0c03: 1002:4396 00:14.0 0c05: 1002:4385 (rev 3c) 00:14.1 0101: 1002:439c 00:14.2 0403: 1002:4383 00:14.3 0601: 1002:439d 00:14.4 0604: 1002:4384 00:14.5 0c03: 1002:4399 00:18.0 0600: 1022:1200 00:18.1 0600: 1022:1201 00:18.2 0600: 1022:1202 00:18.3 0600: 1022:1203 00:18.4 0600: 1022:1204 01:05.0 0300: 1002:9710 01:05.1 0403: 1002:970f 02:00.0 0200: 10ec:8168 (rev 03) 03:06.0 0280: 168c:0029 (rev 01) # lspci 00:00.0 Host bridge: Advanced Micro Devices [AMD] RS880 Host Bridge 00:01.0 PCI bridge: Advanced Micro Devices [AMD] RS780/RS880 PCI to PCI bridge (int gfx) 00:0a.0 PCI bridge: Advanced Micro Devices [AMD] RS780/RS880 PCI to PCI bridge (PCIE port 5) 00:11.0 SATA controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 SATA Controller [IDE mode] 00:12.0 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB OHCI0 Controller 00:12.1 USB Controller: ATI Technologies Inc SB7x0 USB OHCI1 Controller 00:12.2 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB EHCI Controller 00:13.0 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB OHCI0 Controller 00:13.1 USB Controller: ATI Technologies Inc SB7x0 USB OHCI1 Controller 00:13.2 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB EHCI Controller 00:14.0 SMBus: ATI Technologies Inc SBx00 SMBus Controller (rev 3c) 00:14.1 IDE interface: ATI Technologies Inc SB7x0/SB8x0/SB9x0 IDE Controller 00:14.2 Audio device: ATI Technologies Inc SBx00 Azalia (Intel HDA) 00:14.3 ISA bridge: ATI Technologies Inc SB7x0/SB8x0/SB9x0 LPC host controller 00:14.4 PCI bridge: ATI Technologies Inc SBx00 PCI to PCI Bridge 00:14.5 USB Controller: ATI Technologies Inc SB7x0/SB8x0/SB9x0 USB OHCI2 Controller 00:18.0 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor HyperTransport Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor Miscellaneous Control 00:18.4 Host bridge: Advanced Micro Devices [AMD] Family 10h Processor Link Control 01:05.0 VGA compatible controller: ATI Technologies Inc RS880 [Radeon HD 4200] 01:05.1 Audio device: ATI Technologies Inc RS880 Audio Device [Radeon HD 4200] 02:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 03) 03:06.0 Network controller: Atheros Communications Inc. AR922X Wireless Network Adapter (rev 01) Denis.

4 18

[PATCH] remove exit call from pcidev_init
by Niklas Söderlund Jan. 5, 2013

Jan. 5, 2013

If the function fails it returns 0. All callers have been made aware of this and are prepared to handle it. Signed-off-by: Niklas Söderlund <niso(a)kth.se> --- atahpt.c | 2 ++ drkaiser.c | 2 ++ gfxnvidia.c | 2 ++ nic3com.c | 2 ++ nicintel.c | 7 +++---- nicintel_spi.c | 2 ++ nicnatsemi.c | 2 ++ nicrealtek.c | 2 ++ ogp_spi.c | 2 ++ pcidev.c | 6 +++--- satamv.c | 5 ++--- satasii.c | 3 ++- 12 files changed, 26 insertions(+), 11 deletions(-) diff --git a/atahpt.c b/atahpt.c index b692b88..4c1b13e 100644 --- a/atahpt.c +++ b/atahpt.c @@ -71,6 +71,8 @@ int atahpt_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); + if (!io_base_addr) + return 1; /* Enable flash access. */ reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); diff --git a/drkaiser.c b/drkaiser.c index d4b6120..ffabf9b 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -71,6 +71,8 @@ int drkaiser_init(void) return 1; addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); + if (!addr) + return 1; /* Write magic register to enable flash write. */ rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, diff --git a/gfxnvidia.c b/gfxnvidia.c index 457172d..fe2362a 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -95,6 +95,8 @@ int gfxnvidia_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); + if (!io_base_addr) + return 1; io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); diff --git a/nic3com.c b/nic3com.c index 4df720f..27d9506 100644 --- a/nic3com.c +++ b/nic3com.c @@ -91,6 +91,8 @@ int nic3com_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); + if (!io_base_addr) + return 1; id = pcidev_dev->device_id; diff --git a/nicintel.c b/nicintel.c index f2d4529..7d6fa94 100644 --- a/nicintel.c +++ b/nicintel.c @@ -77,11 +77,10 @@ int nicintel_init(void) if (get_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case - * of errors. - * FIXME: BAR2 is not available if the device uses the CardBus function. - */ + /* FIXME: BAR2 is not available if the device uses the CardBus function. */ addr = pcidev_init(PCI_BASE_ADDRESS_2, nics_intel); + if (!addr) + return 1; nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) diff --git a/nicintel_spi.c b/nicintel_spi.c index 7eb3af3..af7347b 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -171,6 +171,8 @@ int nicintel_spi_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); + if (!io_base_addr) + return 1; nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, 4096); diff --git a/nicnatsemi.c b/nicnatsemi.c index c39637a..d16984d 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -63,6 +63,8 @@ int nicnatsemi_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi); + if (!io_base_addr) + return 1; if (register_shutdown(nicnatsemi_shutdown, NULL)) return 1; diff --git a/nicrealtek.c b/nicrealtek.c index f808e06..17a3172 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -65,6 +65,8 @@ int nicrealtek_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); + if (!io_base_addr) + return 1; if (register_shutdown(nicrealtek_shutdown, NULL)) return 1; diff --git a/ogp_spi.c b/ogp_spi.c index 8502847..dc62d7d 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -132,6 +132,8 @@ int ogp_spi_init(void) return 1; io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); + if (!io_base_addr) + return 1; ogp_spibar = physmap("OGP registers", io_base_addr, 4096); diff --git a/pcidev.c b/pcidev.c index e8b4dc1..c32027c 100644 --- a/pcidev.c +++ b/pcidev.c @@ -207,7 +207,7 @@ uintptr_t pcidev_init(int bar, const struct pcidev_status *devs) if (pcidev_bdf != NULL) { if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) { msg_perr("Error: %s\n", msg); - exit(1); + return 0; } } free(pcidev_bdf); @@ -228,13 +228,13 @@ uintptr_t pcidev_init(int bar, const struct pcidev_status *devs) /* Only continue if exactly one supported PCI dev has been found. */ if (found == 0) { msg_perr("Error: No supported PCI device found.\n"); - exit(1); + return 0; } else if (found > 1) { msg_perr("Error: Multiple supported PCI devices found. " "Use 'flashrom -p xxxx:pci=bb:dd.f' \n" "to explicitly select the card with the given BDF " "(PCI bus, device, function).\n"); - exit(1); + return 0; } return curaddr; diff --git a/satamv.c b/satamv.c index 0b83a14..f23af3b 100644 --- a/satamv.c +++ b/satamv.c @@ -89,10 +89,9 @@ int satamv_init(void) return 1; /* BAR0 has all internal registers memory mapped. */ - /* No need to check for errors, pcidev_init() will not return in case - * of errors. - */ addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv); + if (!addr) + return 1; mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) diff --git a/satasii.c b/satasii.c index 75378be..ac70129 100644 --- a/satasii.c +++ b/satasii.c @@ -73,7 +73,8 @@ int satasii_init(void) if (get_io_perms()) return 1; - pcidev_init(PCI_BASE_ADDRESS_0, satas_sii); + if (!pcidev_init(PCI_BASE_ADDRESS_0, satas_sii)) + return 1; id = pcidev_dev->device_id; -- 1.7.11.1

2 1

[PATCH] Automatic programmer driver writer
by Carl-Daniel Hailfinger Jan. 3, 2013

Jan. 3, 2013

Run ./build_new_driver.sh and recompile. You have a new driver, and it's linked in at the appropriate places. Patch needs work for anything which is not a bitbang SPI driver. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-programmer_template/build_new_driver.sh =================================================================== --- flashrom-programmer_template/build_new_driver.sh (Revision 0) +++ flashrom-programmer_template/build_new_driver.sh (Revision 0) @@ -0,0 +1,232 @@ +#!/bin/bash +# flashrom programmer driver skeleton builder. +# Copyright 2012 Carl-Daniel Hailfinger +# Licensed under the GNU GPL v2 + +# Fill in all info in the block below, and don't touch anything else. +PROGRAMMERNAME=ezo +PROGRAMMERDESCR="EZo+Willem Programmer" +PROGRAMMERMANUF="EZo and Willem" +PROGRAMMERURL="http://www.$PROGRAMMERNAMEflash.com/" +AUTHORNAME="Carl-Daniel Hailfinger" +# Does the programmer need a map/unmap function? +HAVE_MAP=no +# Does the programmer have its own delay function? +HAVE_DELAY=no +# Does the programmer need some sort of direct hardware access? +NEED_PCI=yes +# Does the programmer need some sort of serial port access? +NEED_SERIAL=no +# Does the programmer use Parallel/LPC/FWH functionality? +NEED_PARLPCFWH=no +# Does the programmer use the bitbanging SPI infrastructure? +NEED_BITBANG_SPI=yes + +# No user serviceable parts below. +if test $HAVE_MAP = yes; then MAPNAME=$PROGRAMMERNAME; else MAPNAME=fallback; fi +if test $HAVE_DELAY = yes; then DELAYNAME=$PROGRAMMERNAME; else DELAYNAME=internal; fi +PROGRAMMERNAMECAPS=$(echo -n $PROGRAMMERNAME|tr "[[:lower:]]" "[[:upper:]]") +CONFIGNAME=CONFIG_$PROGRAMMERNAMECAPS +ENUMNAME=PROGRAMMER_$PROGRAMMERNAMECAPS +BITBANG_SPI_ENUMNAME=BITBANG_SPI_MASTER_$PROGRAMMERNAMECAPS +if test $NEED_PCI = yes; then NEEDS="NEED_PCI := yes\n"; fi +if test $NEED_SERIAL = yes; then NEEDS+="NEED_SERIAL := yes\n"; fi + +sed "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY-\ +#if $CONFIGNAME == 1\n\ + {\n\ + .name = \"${PROGRAMMERNAME}\",\n\ + .init = ${PROGRAMMERNAME}_init,\n\ + .map_flash_region = ${MAPNAME}_map,\n\ + .unmap_flash_region = ${MAPNAME}_unmap,\n\ + .delay = ${DELAYNAME}_delay,\n\ + },\n\ +#endif\n\ +\n\0-" flashrom.c >flashrom.c.mine + +sed -e "s/^#PLACEHOLDER_NEWPROG_DEFAULTCONFIG/\ +# Enable $PROGRAMMERDESCR for now.\n\ +$CONFIGNAME ?= yes\n\ +\n\0/" \ +-e "s/^#PLACEHOLDER_NEWPROG_COMPILERULE/\ +ifeq (\$($CONFIGNAME), yes)\n\ +FEATURE_CFLAGS += -D'$CONFIGNAME=1'\n\ +PROGRAMMER_OBJS += $PROGRAMMERNAME.o\n\ +${NEEDS}\ +endif\n\ +\n\0/" Makefile >Makefile.mine1 + +if test $NEED_BITBANG_SPI = yes; then +sed -e "s/^#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG1/\ +ifeq (\$($CONFIGNAME), yes)\n\ +override CONFIG_BITBANG_SPI = yes\n\ +else\n\ +\0/" \ +-e "s/^#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG2/\ +\0\n\ +endif/;" Makefile.mine1 >Makefile.mine +rm Makefile.mine1 +else +mv Makefile.mine1 Makefile.mine +fi + +sed -e "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUM-\ +#if $CONFIGNAME == 1\n\ + $ENUMNAME,\n\ +#endif\n\ +\0-" \ +-e "s-//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS-\ +/* $PROGRAMMERNAME.c */\n\ +#if $CONFIGNAME == 1\n\ +int ${PROGRAMMERNAME}_init(void);\n\ +#endif\n\ +\n\0-" programmer.h >programmer.h.mine1 + +if test $NEED_BITBANG_SPI = yes; then +sed -e "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_BITBANG_ENUM-\ +#if $CONFIGNAME == 1\n\ + $BITBANG_SPI_ENUMNAME,\n\ +#endif\n\ +\0-" \ +-e "s-//PLACEHOLDER_NEWPROG_SELECT_SPI_BITBANG\$-\ +|| $CONFIGNAME == 1 \0-" programmer.h.mine1 >programmer.h.mine +rm programmer.h.mine1 +else +mv programmer.h.mine1 programmer.h.mine +fi + +sed -e "s-PLACEHOLDER_NEWPROG_CHECK_PROGRAMMERCOUNT-\ +$CONFIGNAME+\0-" \ +-e "s-^//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUMDEFAULT-\ +#if $CONFIGNAME == 1\n\ + $ENUMNAME\n\ +#endif\n\ +\0-" cli_classic.c >cli_classic.c.mine + +cat >$PROGRAMMERNAME.c <<EOF +/* + * This file is part of the flashrom project. + * + * Copyright (C) $(date +%Y) $AUTHORNAME + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Driver for the $PROGRAMMERDESCR hardware by $PROGRAMMERMANUF. + * See $PROGRAMMERURL for more info. + */ + +#include "flash.h" +#include "programmer.h" + +EOF + +if test $NEED_PARLPCFWH = yes; then +cat >>$PROGRAMMERNAME.c <<EOF +static const struct par_programmer par_programmer_${PROGRAMMERNAME} = { + .chip_readb = ${PROGRAMMERNAME}_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = ${PROGRAMMERNAME}_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +EOF +fi + +if test $NEED_BITBANG_SPI = yes; then +cat >>$PROGRAMMERNAME.c <<EOF +static void ${PROGRAMMERNAME}_bitbang_set_cs(int val) +{ + /* Set/clear the CS# line. */ +} + +static void ${PROGRAMMERNAME}_bitbang_set_sck(int val) +{ + /* Set/clear the SCLK line. */ +} + +static void ${PROGRAMMERNAME}_bitbang_set_mosi(int val) +{ + /* Set/clear the MOSI line. */ +} + +static int ${PROGRAMMERNAME}_bitbang_get_miso(void) +{ + /* Get the state of the MISO line and return it. */ + /* Set it to 1 to get the template to compile. */ + int misoval = 0; + + return misoval; +} + +static void ${PROGRAMMERNAME}_request_spibus(void) +{ +} + +static void ${PROGRAMMERNAME}_release_spibus(void) +{ +} + +static const struct bitbang_spi_master bitbang_spi_master_$PROGRAMMERNAME = { + .type = $BITBANG_SPI_ENUMNAME, + .set_cs = ${PROGRAMMERNAME}_bitbang_set_cs, + .set_sck = ${PROGRAMMERNAME}_bitbang_set_sck, + .set_mosi = ${PROGRAMMERNAME}_bitbang_set_mosi, + .get_miso = ${PROGRAMMERNAME}_bitbang_get_miso, + .request_bus = ${PROGRAMMERNAME}_request_spibus, + .release_bus = ${PROGRAMMERNAME}_release_spibus, + .half_period = 1, +}; + +EOF +fi + +cat >>$PROGRAMMERNAME.c <<EOF +static int ${PROGRAMMERNAME}_shutdown(void *data) +{ + /* Shutdown stuff. */ + return 0; +} + +int ${PROGRAMMERNAME}_init(void) +{ + /* Init stuff (i.e. parameter parsing) here which does not need to be + * undone. + */ + + /* If your shutdown function takes a parameter, replace NULL with it. */ + register_shutdown(${PROGRAMMERNAME}_shutdown, NULL); + + /* Init stuff which needs to be undone on shutdown. */ + +EOF + +if test $NEED_BITBANG_SPI = yes; then +cat >>$PROGRAMMERNAME.c <<EOF + /* 1 usec halfperiod delay, change as needed. */ + if (bitbang_spi_init(&bitbang_spi_master_${PROGRAMMERNAME})) + return 1; + +EOF +fi + +cat >>$PROGRAMMERNAME.c <<EOF + return 0; +} +EOF + EigenschaftsÃ¤nderungen: flashrom-programmer_template/build_new_driver.sh ___________________________________________________________________ HinzugefÃ¼gt: svn:executable + * Index: flashrom-programmer_template/Makefile =================================================================== --- flashrom-programmer_template/Makefile (Revision 1539) +++ flashrom-programmer_template/Makefile (Arbeitskopie) @@ -344,6 +344,8 @@ # Enable Linux spidev interface by default. We disable it on non-Linux targets. CONFIG_LINUX_SPI ?= yes +#PLACEHOLDER_NEWPROG_DEFAULTCONFIG + # Disable wiki printing by default. It is only useful if you have wiki access. CONFIG_PRINT_WIKI ?= no @@ -363,7 +365,9 @@ ifeq ($(CONFIG_OGP_SPI), yes) override CONFIG_BITBANG_SPI = yes else +#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG1 CONFIG_BITBANG_SPI ?= no +#PLACEHOLDER_NEWPROG_BITBANGSPICONFIG2 endif endif endif @@ -503,6 +507,8 @@ PROGRAMMER_OBJS += linux_spi.o endif +#PLACEHOLDER_NEWPROG_COMPILERULE + ifeq ($(NEED_SERIAL), yes) LIB_OBJS += serial.o endif Index: flashrom-programmer_template/cli_classic.c =================================================================== --- flashrom-programmer_template/cli_classic.c (Revision 1539) +++ flashrom-programmer_template/cli_classic.c (Arbeitskopie) @@ -41,7 +41,7 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV > 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_FT2232_SPI+CONFIG_SERPROG+CONFIG_BUSPIRATE_SPI+CONFIG_DEDIPROG+CONFIG_RAYER_SPI+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV+PLACEHOLDER_NEWPROG_CHECK_PROGRAMMERCOUNT > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all programmers except one. #endif static enum programmer default_programmer = @@ -96,6 +96,7 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUMDEFAULT ; #endif Index: flashrom-programmer_template/flashrom.c =================================================================== --- flashrom-programmer_template/flashrom.c (Revision 1539) +++ flashrom-programmer_template/flashrom.c (Arbeitskopie) @@ -261,6 +261,7 @@ }, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ARRAY {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; Index: flashrom-programmer_template/programmer.h =================================================================== --- flashrom-programmer_template/programmer.h (Revision 1539) +++ flashrom-programmer_template/programmer.h (Arbeitskopie) @@ -87,6 +87,7 @@ #if CONFIG_LINUX_SPI == 1 PROGRAMMER_LINUX_SPI, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_ENUM PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -127,6 +128,7 @@ #if CONFIG_OGP_SPI == 1 BITBANG_SPI_MASTER_OGP, #endif +//PLACEHOLDER_NEWPROG_PROGRAMMER_BITBANG_ENUM }; struct bitbang_spi_master { @@ -461,6 +463,8 @@ int dediprog_init(void); #endif +//PLACEHOLDER_NEWPROG_PUBLICFUNCTIONS + /* flashrom.c */ struct decode_sizes { uint32_t parallel; @@ -505,7 +509,7 @@ #if CONFIG_DEDIPROG == 1 SPI_CONTROLLER_DEDIPROG, #endif -#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) +#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) //PLACEHOLDER_NEWPROG_SELECT_SPI_BITBANG SPI_CONTROLLER_BITBANG, #endif #if CONFIG_LINUX_SPI == 1 -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] automatically round address ranges requested from physmap_common to page boundaries
by Stefan Tauner Dec. 31, 2012

Dec. 31, 2012

On Mon, 30 May 2011 02:45:44 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > this patch also changes the display width of all addresses in physmap.c to 16 hex characters. > > FIXME: what about unmappings? > munmap is safe. > djgpp's __dpmi_free_physical_address_mapping: unknown. > DirectHW's unmap_physical: unknown. > > FIXME: jakllsch suggested using PRIx64 instead of x, because it's more portable FIXME: in the case we can not map and 'mayfail' is true we should return ERROR_PTR instead of ERROR_PTR + diff -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] Reading EPROM on RTL8139
by Stefan Tauner Nov. 1, 2012

Nov. 1, 2012

On Wed, 31 Oct 2012 20:58:36 +0300 Dmitry the Zuryanovich <dreadbit(a)gmail.com> wrote: > I'm tryng to read some old UV-erased 28 pin 27xx hi! which one? is it known to work with flashrom? please also include a verbose log (i.e. add -V to the command line). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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