May 2011 - flashrom - mail.coreboot.org

Re: [flashrom] [PATCH] Board enable for ASUS P5LP-LE
by Uwe Hermann Aug. 24, 2011

Aug. 24, 2011

On Wed, Aug 18, 2010 at 06:27:15PM +0200, Michael Karcher wrote: > + * - ASUS P5LP-LE (Epson/HP OEM) OK, this one is going to be interesting. The board is made by ASUS for HP, it seems. HP calls it "Leonite" or "Leonite-GL8E". http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&dlc=en&cc=us&docname=c008… But that would have been too easy. There are a bunch of other boards on the HP site which are also called P5LP-LE, but have different HP code names. From a quick glance I see at least: P5LP-LE (Leonite) P5LP-LE (Leonite2) P5LP-LE (Lithium) P5LP-LE (Limestone) P5LP-LE (Emery) Fun! I don't know how to differ between them, the dmidecode from Leon Zhang <leoncamel(a)gmail.com> said: DMI string system-manufacturer: "EPSON DIRECT CORP." DMI string system-product-name: "Endeavor MT7700" DMI string system-version: "" DMI string baseboard-manufacturer: "ASUSTek Computer INC." DMI string baseboard-product-name: "P5LP-LE" We don't know if other "P5LP-LE" might have the "Leonite" (or other) HP code name in there or not. Maybe something is printed as silkscreen on the board? An then one of these HP OEM boards is built into the Epson "Endeavor MT7700" system/PC. So it's a bit unclear which vendor/board name we should use in this case. It's probably best to mention all of them for better googling results. Attached is a slightly updated patch for review, let me know what you think. Uwe. -- http://hermann-uwe.de | http://sigrok.org http://randomprojects.org | http://unmaintained-free-software.org

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[Patch] Added SST25LF080A Flash Chip
by Zeus Castro Aug. 17, 2011

Aug. 17, 2011

Added support for SST25LF080A flash chip, based on public datasheet available here: http://www.sst.com/dotAsset/40316.pdf

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[patch] Include "flash.h" and <inttypes.h> in chipdrivers.h
by David Hendricks Aug. 16, 2011

Aug. 16, 2011

This patch is intended to avoid compilation issues caused by the ordering of #includes in source files that use chipdrivers.h. Signed-off-by: David Hendricks <dhendrix(a)google.com> -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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[PATCH] internal dmi decoder
by Sean Nelson Aug. 16, 2011

Aug. 16, 2011

Here is a new version of the internal dmi decoding. To use the new decoder, the user needs to use "-p internal:dmi=new", to cross-check with the external dmidecode use "-p internal:dmi=check". Hopefully if this is comitted, it will make it easier for people to test the new internal decoder. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

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[PATCH] Always read chip before writing, avoid emergency messages
by Carl-Daniel Hailfinger Aug. 14, 2011

Aug. 14, 2011

Always read the flash chip before writing. This will allow flashrom to skip erase of already-erased blocks and to skip write of blocks which already have the wanted contents. Avoid emergency messages by checking if the chip contents after a failed write operation (erase/write) are unchanged. Keep the emergency messages after a failed pure erase. That part is debatable because if someone wants erase, he pretty sure doesn't care about the flash contents anymore. Please note that this introduces additional overhead of a full chip read before write. This is frowned upon by people with slow programmers. Maybe we should make this configurable. Either way, this patch needs a review to make sure I'm not going in the wrong direction. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-always_read_no_scary_warning/flash.h =================================================================== --- flashrom-always_read_no_scary_warning/flash.h (Revision 1212) +++ flashrom-always_read_no_scary_warning/flash.h (Arbeitskopie) @@ -239,7 +239,7 @@ /* layout.c */ int read_romlayout(char *name); int find_romentry(char *name); -int handle_romentries(uint8_t *buffer, struct flashchip *flash); +int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents); /* spi.c */ struct spi_command { Index: flashrom-always_read_no_scary_warning/layout.c =================================================================== --- flashrom-always_read_no_scary_warning/layout.c (Revision 1212) +++ flashrom-always_read_no_scary_warning/layout.c (Arbeitskopie) @@ -205,7 +205,7 @@ return -1; } -int handle_romentries(uint8_t *buffer, struct flashchip *flash) +int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents) { int i; @@ -225,13 +225,12 @@ // normal will be updated and the rest will be kept. for (i = 0; i < romimages; i++) { - if (rom_entries[i].included) continue; - flash->read(flash, buffer + rom_entries[i].start, - rom_entries[i].start, - rom_entries[i].end - rom_entries[i].start + 1); + memcpy(newcontents + rom_entries[i].start, + oldcontents + rom_entries[i].start, + rom_entries[i].end - rom_entries[i].start + 1); } return 0; Index: flashrom-always_read_no_scary_warning/flashrom.c =================================================================== --- flashrom-always_read_no_scary_warning/flashrom.c (Revision 1212) +++ flashrom-always_read_no_scary_warning/flashrom.c (Arbeitskopie) @@ -1343,6 +1343,19 @@ return ret; } +void nonfatal_help_message(void) +{ + msg_gerr("Writing to the flash chip apparently didn't do anything.\n" + "This means we have to add special support for your board, " + "programmer or flash chip.\n" + "Please report this on IRC at irc.freenode.net (channel " + "#flashrom) or\n" + "mail flashrom(a)flashrom.org!\n" + "-------------------------------------------------------------" + "------------------\n" + "You may now reboot or simply leave the machine running.\n"); +} + void emergency_help_message(void) { msg_gerr("Your flash chip is in an unknown state.\n" @@ -1602,9 +1615,10 @@ */ int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it) { - uint8_t *buf; + uint8_t *oldcontents; + uint8_t *newcontents; int ret = 0; - unsigned long size; + unsigned long size = flash->total_size * 1024; if (chip_safety_check(flash, force, filename, read_it, write_it, erase_it, verify_it)) { msg_cerr("Aborting.\n"); @@ -1612,9 +1626,6 @@ return 1; } - size = flash->total_size * 1024; - buf = (uint8_t *) calloc(size, sizeof(char)); - /* Given the existence of read locks, we want to unlock for read, * erase and write. */ @@ -1627,6 +1638,12 @@ return ret; } if (erase_it) { + /* FIXME: Do we really want the scary warning if erase failed? + * After all, after erase the chip is either blank or partially + * blank or it has the old contents. A blank chip won't boot, + * so if the user wanted erase and reboots afterwards, the user + * knows very well that booting won't work. + */ if (erase_flash(flash)) { emergency_help_message(); programmer_shutdown(); @@ -1634,33 +1651,71 @@ } } + newcontents = (uint8_t *) calloc(size, sizeof(char)); + if (write_it || verify_it) { - if (read_buf_from_file(buf, flash->total_size * 1024, filename)) { + if (read_buf_from_file(newcontents, size, filename)) { programmer_shutdown(); return 1; } #if CONFIG_INTERNAL == 1 - show_id(buf, size, force); + if (programmer == PROGRAMMER_INTERNAL) + show_id(newcontents, size, force); #endif } + oldcontents = (uint8_t *) calloc(size, sizeof(char)); + + /* Read the whole chip to be able to check whether regions need to be + * erased and to give better diagnostics in case write fails. + * The alternative would be to read only the regions which are to be + * preserved, but in that case we might perform unneeded erase which + * takes time as well. + */ + msg_cdbg("Reading old flash chip contents...\n"); + if (flash->read(flash, oldcontents, 0, size)) { + programmer_shutdown(); + return 1; + } + // This should be moved into each flash part's code to do it // cleanly. This does the job. - handle_romentries(buf, flash); + handle_romentries(flash, oldcontents, newcontents); // //////////////////////////////////////////////////////////// if (write_it) { if (erase_flash(flash)) { + msg_cerr("Uh oh. Erase failed. Checking if anything " + "changed.\n"); + if (!flash->read(flash, newcontents, 0, size)) { + if (!memcmp(oldcontents, newcontents, size)) { + msg_cinfo("Good. It seems nothing was " + "changed.\n"); + nonfatal_help_message(); + programmer_shutdown(); + return 1; + } + } emergency_help_message(); programmer_shutdown(); return 1; } msg_cinfo("Writing flash chip... "); - ret = flash->write(flash, buf, 0, flash->total_size * 1024); + ret = flash->write(flash, newcontents, 0, size); if (ret) { - msg_cerr("FAILED!\n"); + msg_cerr("Uh oh. Write failed. Checking if anything " + "changed.\n"); + if (!flash->read(flash, newcontents, 0, size)) { + if (!memcmp(oldcontents, newcontents, size)) { + msg_cinfo("Good. It seems nothing was " + "changed.\n"); + nonfatal_help_message(); + programmer_shutdown(); + return 1; + } + } emergency_help_message(); programmer_shutdown(); return 1; @@ -1673,7 +1728,7 @@ /* Work around chips which need some time to calm down. */ if (write_it) programmer_delay(1000*1000); - ret = verify_flash(flash, buf); + ret = verify_flash(flash, newcontents); /* If we tried to write, and verification now fails, we * might have an emergency situation. */ -- http://www.hailfinger.org/

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[PATCH] [1/n] SPI FAST READ infrastructure
by Carl-Daniel Hailfinger Aug. 14, 2011

Aug. 14, 2011

SPI FAST READ infrastructure. Add feature bits to allow annotation of SPI flash chips with possible read methods. This includes the not-yet-supported Dual and Quad I/O read operations just in case we ever encounter programmer hardware which can use that feature. An alternative design would be to create a separate spi_chip_fast_read function and have a per-chip array of allowable read functions similar to what we have for erase functions. A similar design problem exists for chips supporting multiple write functions (e.g. classic SPI write and SPI AAI write). Thorough design review appreciated. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_fast_read/flash.h =================================================================== --- flashrom-spi_fast_read/flash.h (Revision 1249) +++ flashrom-spi_fast_read/flash.h (Arbeitskopie) @@ -92,6 +92,11 @@ #define FEATURE_WRSR_EWSR (1 << 6) #define FEATURE_WRSR_WREN (1 << 7) #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) +#define FEATURE_SPI_FAST_READ (1 << 8) +#define FEATURE_SPI_FAST_READ_DUAL_O (1 << 9) +#define FEATURE_SPI_FAST_READ_DUAL_IO (1 << 10) +#define FEATURE_SPI_FAST_READ_QUAD_O (1 << 11) +#define FEATURE_SPI_FAST_READ_QUAD_IO (1 << 12) struct flashchip { const char *vendor; Index: flashrom-spi_fast_read/dediprog.c =================================================================== --- flashrom-spi_fast_read/dediprog.c (Revision 1249) +++ flashrom-spi_fast_read/dediprog.c (Arbeitskopie) @@ -220,8 +220,15 @@ /* Round down. */ bulklen = (len - residue) / chunksize * chunksize; - ret = dediprog_spi_bulk_read(flash, buf + residue, start + residue, - bulklen); + if (flash->feature_bits & FEATURE_SPI_FAST_READ) { + ret = dediprog_spi_bulk_read(flash, buf + residue, + start + residue, bulklen); + } else { + msg_pdbg("Using slow read because your flash chip is not " + "listed as supporting fast read (yet).\n"); + ret = spi_read_chunked(flash, buf + residue, start + residue, + bulklen, 16); + } if (ret) return ret; Index: flashrom-spi_fast_read/flashchips.c =================================================================== --- flashrom-spi_fast_read/flashchips.c (Revision 1249) +++ flashrom-spi_fast_read/flashchips.c (Arbeitskopie) @@ -282,6 +282,7 @@ .model_id = AMIC_A25L05PT, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_SPI_FAST_READ | FEATURE_SPI_FAST_READ_DUAL_O | FEATURE_SPI_FAST_READ_DUAL_IO, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -313,6 +314,7 @@ .model_id = AMIC_A25L05PU, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_SPI_FAST_READ | FEATURE_SPI_FAST_READ_DUAL_O | FEATURE_SPI_FAST_READ_DUAL_IO, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -344,6 +346,7 @@ .model_id = AMIC_A25L10PT, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_SPI_FAST_READ | FEATURE_SPI_FAST_READ_DUAL_O | FEATURE_SPI_FAST_READ_DUAL_IO, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -376,6 +379,7 @@ .model_id = AMIC_A25L10PU, .total_size = 128, .page_size = 256, + .feature_bits = FEATURE_SPI_FAST_READ | FEATURE_SPI_FAST_READ_DUAL_O | FEATURE_SPI_FAST_READ_DUAL_IO, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -408,6 +412,7 @@ .model_id = AMIC_A25L20PT, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_SPI_FAST_READ | FEATURE_SPI_FAST_READ_DUAL_O | FEATURE_SPI_FAST_READ_DUAL_IO, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, @@ -440,6 +445,7 @@ .model_id = AMIC_A25L20PU, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_SPI_FAST_READ | FEATURE_SPI_FAST_READ_DUAL_O | FEATURE_SPI_FAST_READ_DUAL_IO, .tested = TEST_UNTESTED, .probe = probe_spi_rdid4, .probe_timing = TIMING_ZERO, -- http://www.hailfinger.org/

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[PATCH] Warn about unhandled one-time programmable memory
by Daniel Lenski Aug. 13, 2011

Aug. 13, 2011

Added feature bit FEATURE_UNHANDLED_OTP, and a warning for chips like AMIC A25L032 and A25LQ032 which contain small regions of one-time programmable memory that flashrom can neither read, nor write, nor erase. Signed-off-by: Daniel Lenski <dlenski(a)gmail.com> --- flash.h | 1 + flashchips.c | 2 ++ flashrom.c | 8 ++++++++ 3 files changed, 11 insertions(+), 0 deletions(-) diff --git a/flash.h b/flash.h index 6f0d7c0..6db4c48 100644 --- a/flash.h +++ b/flash.h @@ -85,6 +85,7 @@ enum chipbustype { #define FEATURE_ADDR_SHIFTED (1 << 5) #define FEATURE_WRSR_EWSR (1 << 6) #define FEATURE_WRSR_WREN (1 << 7) +#define FEATURE_UNHANDLED_OTP (1 << 8) #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) struct flashchip { diff --git a/flashchips.c b/flashchips.c index efd7599..07b9635 100644 --- a/flashchips.c +++ b/flashchips.c @@ -817,6 +817,7 @@ struct flashchip flashchips[] = { .model_id = AMIC_A25L032, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_UNHANDLED_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -852,6 +853,7 @@ struct flashchip flashchips[] = { .model_id = AMIC_A25LQ032, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_UNHANDLED_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, diff --git a/flashrom.c b/flashrom.c index 2690151..a7471a6 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1434,6 +1434,14 @@ void check_chip_supported(struct flashchip *flash) "Thanks for your help!\n" "===\n"); } + if (flash->feature_bits & FEATURE_UNHANDLED_OTP) { + msg_cinfo("===\n" + "This flash part contains a region of one-time programmable memory\n" + "which flashrom cannot read, and may never be able to write or\n" + "erase. flashrom may not be able to completely backup and rewrite\n" + "the contents of this chip.\n" + "===\n"); + } } int main(int argc, char *argv[]) -- 1.7.0.4

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Problems with flashrom
by Benjamin Z. Gregorian Aug. 11, 2011

Aug. 11, 2011

Hi Guys I run into trouble using flashrom. first I downloaded the ROM to flash then I downloaded flashrom and run the following command ---------- sudo flashrom ---------- Result: flashrom v0.9.1-r946 No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. This chipset supports the following protocols: FWH. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. No operations were specified. --------- I assumed that flashrom can burn my BIOS (since there was no warning given) Then I tried --------- sudo flashrom -wv Desktop/Downloads/P5LD2-2002.ROM --------- Result was that two opperations are not permittet or so After studying the man page I ran the following command --------- sudo flashrom -w Desktop/Downloads/P5LD2-2002.ROM --------- and got panic!!!!!!! -------- flashrom v0.9.1-r946 No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. This chipset supports the following protocols: FWH. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... ERASE FAILED at 0x000002c8! Expected=0xff, Read=0x4c, failed byte count from 0x00000000-0x00000fff: 0xd12 ERASE FAILED! ERASE FAILED at 0x000002c8! Expected=0xff, Read=0x4c, failed byte count from 0x00000000-0x0000ffff: 0xfc2b ERASE FAILED! FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! ----------------------------------- PLEASE ADVICE what to do next. LOOKING EAGERLY FORWARD to YOUR REPLY Regards Benjamin -- Neu: GMX De-Mail - Einfach wie E-Mail, sicher wie ein Brief! Jetzt De-Mail-Adresse reservieren: http://portal.gmx.net/de/go/demail

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[PATCH] add support for AT49F040
by David Borg Aug. 10, 2011

Aug. 10, 2011

Hi, I was adding support for the AT49F040 parallel flash chip, but have some questions. This chip has a boot block which once locked cannot be erased / rewritten. Should I add erase functions for both cases? Currently the erase function handles unlocked chips only. In addition, the datasheet specifies no command timings, is the timing something I can infer from the read / program cycle characteristics tables? Regards, David Signed-off-by: David Borg <borg.db(a)gmail.com> datasheet: http://pdf1.alldatasheet.com/datasheet-pdf/view/56184/ATMEL/AT49F040.html Index: flashchips.c =================================================================== --- flashchips.c (revision 1145) +++ flashchips.c (working copy) @@ -1985,6 +1985,29 @@ }, { + .vendor = "Atmel", + .name = "AT49F040", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = ATMEL_ID, + .model_id = AT_49F040, + .total_size = 512, + .page_size = 512, + .feature_bits = FEATURE_EITHER_RESET | FEATURE_ADDR_FULL, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ + .block_erasers = + { + { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + } + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { .vendor = "EMST", .name = "F49B002UA", .bustype = CHIP_BUSTYPE_PARALLEL, Index: flashchips.h =================================================================== --- flashchips.h (revision 1145) +++ flashchips.h (working copy) @@ -174,6 +174,7 @@ #define AT_49F020 0x0B #define AT_49F002N 0x07 /* for AT49F002(N) */ #define AT_49F002NT 0x08 /* for AT49F002(N)T */ +#define AT_49F040 0x13 #define CATALYST_ID 0x31 /* Catalyst */

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Re: [flashrom] [PATCH 8/8] Added (N) to the name of MX29F002B/T devices.
by Idwer Vollering Aug. 7, 2011

Aug. 7, 2011

2011/3/15 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer(a)gmail.com> But *only* if the probe/read/erase/write status is not affected. > --- > flashchips.c | 4 ++-- > flashchips.h | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/flashchips.c b/flashchips.c > index 7cb7d39..97aafef 100644 > --- a/flashchips.c > +++ b/flashchips.c > @@ -4209,7 +4209,7 @@ struct flashchip flashchips[] = { > > { > .vendor = "Macronix", > - .name = "MX29F002B", > + .name = "MX29F002(N)B", > .bustype = CHIP_BUSTYPE_PARALLEL, > .manufacture_id = MACRONIX_ID, > .model_id = MACRONIX_MX29F002B, > @@ -4240,7 +4240,7 @@ struct flashchip flashchips[] = { > > { > .vendor = "Macronix", > - .name = "MX29F002T", > + .name = "MX29F002(N)T", > .bustype = CHIP_BUSTYPE_PARALLEL, > .manufacture_id = MACRONIX_ID, > .model_id = MACRONIX_MX29F002T, > diff --git a/flashchips.h b/flashchips.h > index 9b08d25..9782188 100644 > --- a/flashchips.h > +++ b/flashchips.h > @@ -361,8 +361,8 @@ > #define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ > #define MACRONIX_MX29F001B 0x19 > #define MACRONIX_MX29F001T 0x18 > -#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB */ > -#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT */ > +#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB; N has reset pin n/c. */ > +#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT; N has reset pin n/c. */ > #define MACRONIX_MX29F004B 0x46 > #define MACRONIX_MX29F004T 0x45 > #define MACRONIX_MX29F022T 0x36 /* Same as MX29F022NT */ > -- > 1.7.1 > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom >

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