August 2009 - flashrom - mail.coreboot.org

#1: flashRom doesn't work on MotherBoard with ICH9 + MP2532
by flashrom Oct. 26, 2010

Oct. 26, 2010

#1: flashRom doesn't work on MotherBoard with ICH9 + MP2532 --------------------------------------------------+------------------------- Reporter: annyvonne.le_coq@… | Owner: hailfinger Type: defect | Status: new Priority: major | Milestone: flashrom 0.9.1 Component: flashrom | Version: Keywords: | Dependencies: Patchstatus: there is no patch | --------------------------------------------------+------------------------- Hi all, I have a mother board equipped with ICH9 chipset and M25P32 flash device. I can't use flashrom to re-program my BIOS. 1) The ICH9 is not recognized. So, I add its device ID (2910) in chipset_enable.c file. 2) Then, M25P32 flash device is recognized, but OPCODE 06 is not in the list OPCODESS OS_ST_M25P. ich_spi_command try to find the command 06 in the list, The list contains only following values: 2, 3, 216, 5, 171, 1, 159, 199. The M25P32 has been tested with flashrom. So, I imagine that the problem is due to the caller. Have you got an idea about this issue. Thanks Anne -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/1> flashrom <http://www.flashrom.org/>

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[PATCH] new windows port
by Stefan Reinauer June 4, 2010

June 4, 2010

Hi, I separated the direct io access code from the flashrom changes, to make this code easily available for the other coreboot utilities, too. The remaining windows patch is rather small. I'll clean up the directio code some more and make a release asap. Best regards, Stefan -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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[patch] add intel_piix4_gpo_set()
by Luc Verhaegen Dec. 14, 2009

Dec. 14, 2009

This is code from a an old board enable that i sent in 3 weeks ago. This board enable was not necessary (as flashing worked just fine without it too). But this function was also used to clean up the board enable for the epox ep bx3. I have tracked down the person for whom i wrote this board enable 2 years ago: irc user nyu, aka Robert Millan. Robert, can you verify that this code is not a regression for you? Uwe, in the original mail thread (http://www.coreboot.org/pipermail/coreboot/2009-June/049789.html) you had several suggestions. I have taken over unsigned int and the bitshift, but i do mot like to put "PIIX4{,E,M}" everywhere. "PIIX4{,E,M}" all over clutters up the place, and i fear that printing this to the user will generate more confusion than it will ever remove. Instead i have adjusted the initial function comment to mention this so that developers can rest assured in future that this will also be valid for their future board enables. Luc Verhaegen.

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[Patch] Shuttle AK31
by Luc Verhaegen Dec. 14, 2009

Dec. 14, 2009

Resending this patch to the newly formed flashrom ml. Ron already kindly acked this patch. Mateusz, the owner of this board gave me a brief comment on irc stating that it didn't work. Which is also the last i heard from him. Mateusz, get back to us and get us at least the flashrom output. Luc Verhaegen.

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[PATCH] Totally generic SPI chip match
by Carl-Daniel Hailfinger Nov. 20, 2009

Nov. 20, 2009

If a chip is not on the RDID generic vendor list nor on the REMS specific ID list, flashrom will claim that no chip is there. Handle these cases gracefully. flashrom will ignore generic matches if a specific chip was found, so this will have no impact on supported chips, but help a lot for a first quick analysis by the user or developer. The only drawback is that unknown chips may be recognized multiple times until they are added to flashchips.[ch]. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_totally_generic_probe/flashchips.c =================================================================== --- flashrom-spi_totally_generic_probe/flashchips.c (Revision 664) +++ flashrom-spi_totally_generic_probe/flashchips.c (Arbeitskopie) @@ -3167,5 +3167,32 @@ .read = NULL, }, + { + .vendor = "Generic", + .name = "unknown SPI chip (RDID)", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rdid, + .erase = NULL, + .write = NULL, + }, + { + .vendor = "Generic", + .name = "unknown SPI chip (REMS)", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = GENERIC_MANUF_ID, + .model_id = GENERIC_DEVICE_ID, + .total_size = 0, + .page_size = 256, + .tested = TEST_BAD_PREW, + .probe = probe_spi_rems, + .erase = NULL, + .write = NULL, + }, + { NULL } }; Index: flashrom-spi_totally_generic_probe/flashchips.h =================================================================== --- flashrom-spi_totally_generic_probe/flashchips.h (Revision 664) +++ flashrom-spi_totally_generic_probe/flashchips.h (Arbeitskopie) @@ -34,6 +34,7 @@ * SPI parts have 16-bit device IDs if they support RDID. */ +#define GENERIC_MANUF_ID 0xffff /* Check if there is a vendor ID */ #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */ #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ Index: flashrom-spi_totally_generic_probe/spi.c =================================================================== --- flashrom-spi_totally_generic_probe/spi.c (Revision 664) +++ flashrom-spi_totally_generic_probe/spi.c (Arbeitskopie) @@ -274,6 +274,11 @@ GENERIC_DEVICE_ID == flash->model_id) return 1; + /* Test if there is any vendor ID. */ + if (GENERIC_MANUF_ID == flash->manufacture_id && + id1 != 0xff) + return 1; + return 0; } @@ -329,6 +334,11 @@ GENERIC_DEVICE_ID == flash->model_id) return 1; + /* Test if there is any vendor ID. */ + if (GENERIC_MANUF_ID == flash->manufacture_id && + id1 != 0xff) + return 1; + return 0; } -- http://www.hailfinger.org/

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Fix feature detection when fdti requires libusb for linking
by Joerg Mayer Nov. 16, 2009

Nov. 16, 2009

see attached patch. patch is too small to be copyrightable... ciao Joerg -- Joerg Mayer <jmayer(a)loplof.de> We are stuck with technology when what we really want is just stuff that works. Some say that should read Microsoft instead of technology.

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flashing results for the MS-7094 board
by Jelle Geerts Oct. 5, 2009

Oct. 5, 2009

Hello, I've ran flashrom -v {-E,-r,-v,-w} on my MS-7094 board. For more info regarding the board, please see http://www.msi.com/index.php?func=proddesc&maincat_no=1&cat2_no=&cat3_no=&p… I've attached the results to this e-mail. Reading/verifying/writing worked fine. Erasing however, didn't go so well, as you can see in the attached log. BTW, two thumbs up to the flashrom developers: the Award flash utility did not work (kept saying 'Unknown flash type'), but flashrom did. ;) HTH, Jelle Geerts

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Non-working board submission: Asrock K7VT4A+
by Putlinuxonit Oct. 4, 2009

Oct. 4, 2009

Hi, I've tested this board with flashrom-0.9.0-r695 as well as superiotool r4424. Also contained are dumps from* #lspci -vvnnxxxx*, *#dmidecode* and *#lshw*. i tried a forced read via *#flashrom -f -r -c SST39SF020A oldfirmware.bin*and provide the dumps as well though that maybe useless as i was warned. A lot of the info is probably duplicated but is provided for the sake of completeness. Bios: AMI > Board: Asrock K7VT4A+ > Flash Chip: SST39SF020A (PLCC) > Chipset: Via VT8235 > Enjoy!, Udu E. Ogah .~~~~~~~~~~.

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[PATCH] Bitbanging SPI driver
by Carl-Daniel Hailfinger Oct. 1, 2009

Oct. 1, 2009

This is a bitbanging SPI driver without hardware support. If you want support for a particular piece of hardware, just fill in a few functions. That's it. Tested, trace looks OK. Not 0.9.1 material. If I get an ack, I'll commit after 0.9.1. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-bitbang_spi/flash.h =================================================================== --- flashrom-bitbang_spi/flash.h (Revision 682) +++ flashrom-bitbang_spi/flash.h (Arbeitskopie) @@ -90,6 +90,7 @@ #if SERPROG_SUPPORT == 1 PROGRAMMER_SERPROG, #endif + PROGRAMMER_BITBANGSPI, PROGRAMMER_INVALID /* This must always be the last entry. */ }; @@ -390,6 +391,12 @@ int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf); +/* bitbang_spi.c */ +int bitbang_spi_init(void); +int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); +int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); +int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); + /* flashrom.c */ extern char *programmer_param; extern int verbose; @@ -428,6 +435,7 @@ SPI_CONTROLLER_WBSIO, SPI_CONTROLLER_FT2232, SPI_CONTROLLER_DUMMY, + SPI_CONTROLLER_BITBANG, }; struct spi_command { unsigned int writecnt; Index: flashrom-bitbang_spi/bitbang_spi.c =================================================================== --- flashrom-bitbang_spi/bitbang_spi.c (Revision 0) +++ flashrom-bitbang_spi/bitbang_spi.c (Revision 0) @@ -0,0 +1,183 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdio.h> +#include <stdint.h> +#include <string.h> +#include <stdlib.h> +#include <ctype.h> +#include "flash.h" +#include "spi.h" + +#if BITBANG_SPI_SUPPORT == 1 + +/* Length of half a clock period in usecs */ +int bitbang_half_period = 0; + +/* Empty functions, need to be replaced with actual driver implementation. */ +void bitbang_set_cs(int val) +{ +} + +void bitbang_set_sck(int val) +{ +} + +void bitbang_set_mosi(int val) +{ +} + +int bitbang_get_miso(void) +{ + return 1; +} + +int bitbang_spi_init(void) +{ + bitbang_set_cs(1); + bitbang_set_sck(0); + + buses_supported = CHIP_BUSTYPE_SPI; + spi_controller = SPI_CONTROLLER_BITBANG; + + return 0; +} + +uint8_t bitbang_spi_readwrite_byte(uint8_t val) +{ + uint8_t ret = 0; + int i; + + for (i = 7; i >= 0; i--) { + bitbang_set_mosi((val >> i) & 1); + programmer_delay(bitbang_half_period); + bitbang_set_sck(1); + ret <<= 1; + ret |= bitbang_get_miso(); + programmer_delay(bitbang_half_period); + bitbang_set_sck(0); + } + return ret; +} + +int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + static unsigned char *bufout = NULL; + static unsigned char *bufin = NULL; + static int oldbufsize = 0; + int bufsize = max(writecnt + readcnt, 260); + int i; + + /* Arbitrary size limitation here. We're only constrained by memory. */ + if (writecnt > 65536 || readcnt > 65536) + return SPI_INVALID_LENGTH; + + if (bufsize != oldbufsize) { + bufout = realloc(bufout, bufsize); + if (!bufout) { + fprintf(stderr, "Out of memory!\n"); + if (bufin) + free(bufin); + exit(1); + } + bufin = realloc(bufout, bufsize); + if (!bufin) { + fprintf(stderr, "Out of memory!\n"); + if (bufout) + free(bufout); + exit(1); + } + } + + memcpy(bufout, writearr, writecnt); + /* Shift out 0x00 while reading data. */ + memset(bufout + writecnt, 0x00, readcnt); + /* Make sure any non-read data is 0xff. */ + memset(bufin + writecnt, 0xff, readcnt); + + bitbang_set_cs(0); + for (i = 0; i < readcnt + writecnt; i++) { + bufin[i] = bitbang_spi_readwrite_byte(bufout[i]); + } + programmer_delay(bitbang_half_period); + bitbang_set_cs(1); + programmer_delay(bitbang_half_period); + memcpy(readarr, bufin + writecnt, readcnt); + + return 0; +} + +int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + /* Maximum read length is unlimited, use 64k bytes. */ + return spi_read_chunked(flash, buf, start, len, 64 * 1024); +} + +int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf) +{ + int total_size = 1024 * flash->total_size; + int i; + + printf_debug("total_size is %d\n", total_size); + for (i = 0; i < total_size; i += 256) { + int l, r; + if (i + 256 <= total_size) + l = 256; + else + l = total_size - i; + + if ((r = spi_nbyte_program(i, &buf[i], l))) { + fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r); + return 1; + } + + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + /* loop */; + } + + return 0; +} + +#else +int bitbang_spi_init(void) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} + +int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} + +int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} + +int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf) +{ + fprintf(stderr, "Bitbanging SPI support was not compiled in\n"); + exit(1); +} +#endif Index: flashrom-bitbang_spi/spi.c =================================================================== --- flashrom-bitbang_spi/spi.c (Revision 682) +++ flashrom-bitbang_spi/spi.c (Arbeitskopie) @@ -95,6 +95,13 @@ .read = NULL, .write_256 = NULL, }, + + { /* SPI_CONTROLLER_BITBANG */ + .command = bitbang_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = bitbang_spi_read, + .write_256 = bitbang_spi_write_256, + }, }; Index: flashrom-bitbang_spi/Makefile =================================================================== --- flashrom-bitbang_spi/Makefile (Revision 682) +++ flashrom-bitbang_spi/Makefile (Arbeitskopie) @@ -67,11 +67,19 @@ # Always enable serprog for now. Needs to be disabled on Windows. CONFIG_SERPROG = yes +# Bitbanging SPI is not yet ready. +CONFIG_BITBANG_SPI = yes + ifeq ($(CONFIG_SERPROG), yes) FEATURE_CFLAGS += -D'SERPROG_SUPPORT=1' OBJS += serprog.o endif +ifeq ($(CONFIG_BITBANG_SPI), yes) +FEATURE_CFLAGS += -D'BITBANG_SPI_SUPPORT=1' +OBJS += bitbang_spi.o +endif + FEATURE_CFLAGS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-D'FT2232_SPI_SUPPORT=1'") FEATURE_LIBS += $(shell LC_ALL=C grep -q "FTDISUPPORT := yes" .features && printf "%s" "-lftdi") Index: flashrom-bitbang_spi/flashrom.c =================================================================== --- flashrom-bitbang_spi/flashrom.c (Revision 682) +++ flashrom-bitbang_spi/flashrom.c (Arbeitskopie) @@ -158,6 +158,23 @@ }, #endif + { + .name = "bitbangspi", + .init = bitbang_spi_init, + .shutdown = fallback_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = dummy_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = fallback_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, + {}, /* This entry corresponds to PROGRAMMER_INVALID. */ }; @@ -512,7 +529,7 @@ " -z | --list-supported-wiki: print supported devices in wiki syntax\n" " -p | --programmer <name>: specify the programmer device\n" " (internal, dummy, nic3com, satasii,\n" - " it87spi, ft2232spi, serprog)\n" + " it87spi, ft2232spi, serprog, bitbangspi)\n" " -h | --help: print this help text\n" " -R | --version: print the version (release)\n" "\nYou can specify one of -E, -r, -w, -v or no operation. If no operation is\n" -- http://www.hailfinger.org/

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[PATCH] Add -p gfxnvidia for flashing NVIDIA graphics cards
by Uwe Hermann Sept. 30, 2009

Sept. 30, 2009

See patch. Please do NOT try write/erase on any important cards yet, it doesn't seem to fully work properly yet and you could "brick" your card. I tested a "RIVA TNT2 Model 64/Model 64 Pro", which successfully identified and read a Winbond W29C011 chip, but erase and write behaved incorrect and I finally bricked the card. Will look into recovery soon (likely will work via software I assume, no hardware hacking strictly required I think/hope, we'll see). As for the list of supported cards: I have no idea which of those may work (i.e. have the same flash programming interface), maybe none, maybe all of them (and lots more NVIDIA cards), we'll see as soon as others test more cards. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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