October 2009 - flashrom - mail.coreboot.org

[commit] r745 - trunk
by svn＠flashrom.org Oct. 5, 2009

Oct. 5, 2009

Author: libv Date: 2009-10-05 18:07:00 +0200 (Mon, 05 Oct 2009) New Revision: 745 Modified: trunk/board_enable.c Log: Board enable for ASUS P5ND2-SLI Deluxe. This patch reorganises the board_ga_k8n_sli to create nvidia_mcp_gpio_raise, a more general routine to set these bits. Without docs, i can only assume that these memory area are gpio lines. Then it becomes easy to add support for this nForce4 SLI board. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Martin Szulecki <opensuse(a)sukimashita.com> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-10-05 16:04:47 UTC (rev 744) +++ trunk/board_enable.c 2009-10-05 16:07:00 UTC (rev 745) @@ -400,13 +400,30 @@ } /** + * No docs, so we are just guessing that these might be individual gpio lines. + */ +static void nvidia_mcp_gpio_raise(struct pci_dev *dev, uint8_t offset) +{ + uint16_t base; + uint8_t tmp; + + base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */ + + base += 0xC0; + + /* if anyone knows more about nvidia mcps, feel free to explain this */ + tmp = INB(base + offset); + tmp &= ~0x0F; + tmp |= 0x05; + OUTB(tmp, base + offset); +} + +/** * Suited for the Gigabyte GA-K8N-SLI: CK804 southbridge. */ static int board_ga_k8n_sli(const char *name) { struct pci_dev *dev; - uint32_t base; - uint8_t tmp; dev = pci_dev_find(0x10DE, 0x0050); /* NVIDIA CK804 LPC */ if (!dev) { @@ -414,16 +431,30 @@ return -1; } - base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */ + nvidia_mcp_gpio_raise(dev, 0x21); - /* if anyone knows more about nvidia lpcs, feel free to explain this */ - tmp = INB(base + 0xE1); - tmp |= 0x05; - OUTB(tmp, base + 0xE1); + return 0; +} +/** + * Suited for ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04. + */ +static int board_asus_p5nd2_sli(const char *name) +{ + struct pci_dev *dev; + + dev = pci_dev_find(0x10DE, 0x0030); /* NVIDIA nForce4 ISA Bridge */ + if (!dev) { + fprintf(stderr, "\nERROR: NVIDIA ISA bridge not found.\n"); + return -1; + } + + nvidia_mcp_gpio_raise(dev, 0x10); + return 0; } + static int board_hp_dl145_g3_enable(const char *name) { /* Set GPIO lines in the Broadcom HT-1000 southbridge. */ @@ -1002,6 +1033,7 @@ {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS", "P4B266", ich2_gpio22_raise}, {0x8086, 0x2570, 0x1043, 0x80F2, 0x105A, 0x3373, 0x1043, 0x80F5, NULL, NULL, "ASUS", "P4P800-E Deluxe", board_asus_p4p800}, {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS", "P5A", board_asus_p5a}, + {0x10DE, 0x0030, 0x1043, 0x818a, 0x8086, 0x100E, 0x1043, 0x80EE, NULL, NULL, "ASUS", "P5ND2-SLI Deluxe", board_asus_p5nd2_sli}, {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "Biostar", "P4M80-M4", it8705_rom_write_enable}, {0x8086, 0x3590, 0x1028, 0x016c, 0x1000, 0x0030, 0x1028, 0x016c, NULL, NULL, "Dell", "S1850", ich5_gpio23_raise}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, "Elitegroup", "K7VTA3", it8705f_write_enable_2e},

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Chipset enable for nVidia nForce4/MCP4.
by Luc Verhaegen Oct. 5, 2009

Oct. 5, 2009

Please test whether your board is matched correctly. When the board enable gets provided, please apply that on top of this patch, and if both work correctly, reply to both mails with Acked-by: Martin ##DeineRichtigeNachname## <info(a)sukimashita.com> Also, the pci id matched here is not in the pciids.sf.net database. You might want to work with them to get your pciids in their list (my guess is that they need you to dig through some windows driver .inf files.) Thanks, Luc Verhaegen.

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[commit] r744 - trunk
by svn＠flashrom.org Oct. 5, 2009

Oct. 5, 2009

Author: libv Date: 2009-10-05 18:04:47 +0200 (Mon, 05 Oct 2009) New Revision: 744 Modified: trunk/chipset_enable.c Log: Chipset support for the nVidia nForce 4. Add pciids for the new isa bridge, and hook it to the nforce2 chipset enable. Signed-off-by: Luc Verhaegen <libv(a)skynet.be> Acked-by: Martin Szulecki <opensuse(a)sukimashita.com> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-10-03 17:08:02 UTC (rev 743) +++ trunk/chipset_enable.c 2009-10-05 16:04:47 UTC (rev 744) @@ -1018,6 +1018,7 @@ {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x10de, 0x0030, NT, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ {0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2},

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"ERASED FAILED!" messages for ICH2 / SST49LF0002A/B
by Allan Bjorklund Oct. 5, 2009

Oct. 5, 2009

Hello, I'm wanting to upgrade the BIOS on an older machine that I have. A Sony Vaio (PCV-RX650(UC)), with an ASUSTeK mother board (P4B266LM Rev: 1.xx), running Linux kernel 2.6.28. Running flashrom (today's trunk version) with no arguments gives this: flashrom v0.9.1-runknown No coreboot table found. Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000. No operations were specified. I saved a copy of my existing BIOS image with: flashrom -r original_bios.bin That appears to work, as the file is the same size as the updated BIOS .bin file I downloaded from the vendor's site. To test writing, I attempted to write the original BIOS image back with flashrom -w original_bios.bin, and here is the output: flashrom v0.9.1-runknown No coreboot table found. Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x25, failed byte count from 0x00000000-0x00003fff: 0x3fa4 ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! If I do a flashrom -v original_bios.bin, I get: flashrom v0.9.1-runknown No coreboot table found. Found chipset "Intel ICH2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF002A/B" (256 KB, FWH) at physical address 0xfffc0000. Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. And reading a second copy and doing a binary diff shows no differences, so my BIOS checks out as not being damaged. (At least, I think so.) So, any advice on what to look for/change to make this work? Thanks. --Allan

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Board support for ASUS P5ND2-SLI Deluxe.
by Luc Verhaegen Oct. 5, 2009

Oct. 5, 2009

Can you attach the output of lspci -vvnnxxx? I will soon send in a patch for the chipset enable. When the full lspci is provided, i will be able to quickly provide you with a board enable for your board. Oh, and about your blog entry: my first linux box was a SuSE 6.0, but undoubtedly Stepan can easily trump that as i believe he was working for SuSE (already/still) at the time. Also, please use your real and full name for acknowledging patches later on. Luc Verhaegen.

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Re: [flashrom] [coreboot] #131: New flashrom motherboard support
by Martin S. Oct. 5, 2009

Oct. 5, 2009

On Mon, 2009-10-05 at 01:45 +0000, coreboot wrote: > #131: New flashrom motherboard support > ---------------------------------+------------------------------------------ > Reporter: anonymous | Owner: somebody > Type: enhancement | Status: new > Priority: trivial | Milestone: flashrom v1.0 > Component: flashrom | Version: > Keywords: flashrom asus | Dependencies: > Patchstatus: there is no patch | > ---------------------------------+------------------------------------------ > > Comment(by hailfinger): > > Please send a short mail to flashrom(a)flashrom.org which has a link to this > ticket and mentions that you're the person with the "ASUS P5ND2-SLI > Deluxe". This will make it easier for us to stay in touch with you. > Thanks. > Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/131#comment:4> It's me. ;) Cheers. --- Martin S.

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Data regarding GA-MA790GP-UD4H board
by Yair K. Oct. 4, 2009

Oct. 4, 2009

Hi, Per discussion in IRC, I'm attaching "flashrom -V" and "lspci -nnvx" output. Flashrom 0.9.0 flashing works. Hopefully the attached files will help with autodetection. Yours, Yair K.

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flashing results for the MS-7094 board
by Jelle Geerts Oct. 4, 2009

Oct. 4, 2009

Hello, I've ran flashrom -v {-E,-r,-v,-w} on my MS-7094 board. For more info regarding the board, please see http://www.msi.com/index.php?func=proddesc&maincat_no=1&cat2_no=&cat3_no=&p… I've attached the results to this e-mail. Reading/verifying/writing worked fine. Erasing however, didn't go so well, as you can see in the attached log. BTW, two thumbs up to the flashrom developers: the Award flash utility did not work (kept saying 'Unknown flash type'), but flashrom did. ;) HTH, Jelle Geerts

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Non-working board submission: Asrock K7VT4A+
by Putlinuxonit Oct. 4, 2009

Oct. 4, 2009

Hi, I've tested this board with flashrom-0.9.0-r695 as well as superiotool r4424. Also contained are dumps from* #lspci -vvnnxxxx*, *#dmidecode* and *#lshw*. i tried a forced read via *#flashrom -f -r -c SST39SF020A oldfirmware.bin*and provide the dumps as well though that maybe useless as i was warned. A lot of the info is probably duplicated but is provided for the sake of completeness. Bios: AMI > Board: Asrock K7VT4A+ > Flash Chip: SST39SF020A (PLCC) > Chipset: Via VT8235 > Enjoy!, Udu E. Ogah .~~~~~~~~~~.

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Asus M4A79T deluxe
by Sander Sweers Oct. 4, 2009

Oct. 4, 2009

Hello Flashrom people, I just successfully did a flash from linux for the first time ever, yeah :-) Attached are the logs (bzipped) for flashrom -V -rV and flashrom -V -wV. I hope this help you guys adding official support for this motherboards. If you need more info please let me know. Greets Sander

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