[S] Change in flashrom[master]: jedec.c: Rename func to jedec_write_page()
Thomas Heijligen has submitted this change. ( https://review.coreboot.org/c/flashrom/+/73282 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: jedec.c: Rename func to jedec_write_page() ...................................................................... jedec.c: Rename func to jedec_write_page() Change-Id: I1be83d5974e305bddceaa34b64e982b774ade0d2 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73282 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> --- M jedec.c 1 file changed, 16 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved Thomas Heijligen: Looks good to me, approved diff --git a/jedec.c b/jedec.c index f9442ec..2cdde61 100644 --- a/jedec.c +++ b/jedec.c @@ -396,7 +396,7 @@ return failed; } -static int write_page_write_jedec_common(struct flashctx *flash, const uint8_t *src, +static int jedec_write_page(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int page_size) { int tries = 0, failed; @@ -471,7 +471,7 @@ /* Length of bytes in the range in this page. */ lenhere = min(start + len, (i + 1) * page_size) - starthere; - if (write_page_write_jedec_common(flash, buf + starthere - start, starthere, lenhere)) + if (jedec_write_page(flash, buf + starthere - start, starthere, lenhere)) return 1; update_progress(flash, FLASHROM_PROGRESS_WRITE, i + 1, nwrites + 1); } -- To view, visit https://review.coreboot.org/c/flashrom/+/73282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1be83d5974e305bddceaa34b64e982b774ade0d2 Gerrit-Change-Number: 73282 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer@coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src@posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: merged
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Thomas Heijligen (Code Review)