Gaggery Tsai has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37677 ) Change subject: chipset_enable.c: Add CMP-H IDs ...................................................................... chipset_enable.c: Add CMP-H IDs This patch adds CMP-H support. They are HM470, WM490, QM480, W480, H470, Z490 and Q470. TEST=build flashrom and run on CML-S with CMP-H flashrom -p internal -w ./coreboot.rom reboot and check the code is flashed correctly Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f --- M chipset_enable.c 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/37677/1 diff --git a/chipset_enable.c b/chipset_enable.c index b55852c..62a19af 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2046,6 +2046,13 @@ {0x8086, 0xa30c, B_S, NT, "Intel", "QM370", enable_flash_pch300}, {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, + {0x8086, 0x068d, B_S, NT, "Intel", "HM470", enable_flash_pch300}, + {0x8086, 0x068e, B_S, NT, "Intel", "WM490", enable_flash_pch300}, + {0x8086, 0x068c, B_S, NT, "Intel", "QM480", enable_flash_pch300}, + {0x8086, 0x0697, B_S, NT, "Intel", "W480", enable_flash_pch300}, + {0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch300}, + {0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch300}, + {0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch300}, #endif {0}, }; -- To view, visit https://review.coreboot.org/c/flashrom/+/37677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f Gerrit-Change-Number: 37677 Gerrit-PatchSet: 1 Gerrit-Owner: Gaggery Tsai <gaggery.tsai@intel.com> Gerrit-MessageType: newchange