April 2026 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: print.c: Fix alignment in print_supported_boards_helper()
by David Hendricks (Code Review) July 2, 2026

July 2, 2026

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37407 ) Change subject: print.c: Fix alignment in print_supported_boards_helper() ...................................................................... print.c: Fix alignment in print_supported_boards_helper() Commit 61e16e5 eliminated some duplicate logic for printing test status, but in doing so introduced a regression where some entries in `flashrom -L` output became unaligned. Up until then, it was assumed that the status field will always be 8-wide, including space for padding. This patch fixes alignment when using test_state_to_text() by making the padding consistent with other fields where a for-loop is used to pad the field up to a maximum width. Change-Id: Ie0a0b45c6466d14447aca443c2697e2048c6ef14 Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M flash.h M print.c 2 files changed, 29 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/07/37407/1 diff --git a/flash.h b/flash.h index 1a9bd9f..e7b1c89 100644 --- a/flash.h +++ b/flash.h @@ -145,10 +145,11 @@ enum test_state { OK = 0, - NT = 1, /* Not tested */ - BAD, /* Known to not work */ - DEP, /* Support depends on configuration (e.g. Intel flash descriptor) */ - NA, /* Not applicable (e.g. write support on ROM chips) */ + NT = 1, /* Not tested */ + BAD, /* Known to not work */ + DEP, /* Support depends on configuration (e.g. Intel flash descriptor) */ + NA, /* Not applicable (e.g. write support on ROM chips) */ + TEST_STATE_END, /* Not a test state, just an indicator of how many are defined. */ }; #define TEST_UNTESTED (struct tested){ .probe = NT, .read = NT, .erase = NT, .write = NT } diff --git a/print.c b/print.c index 6a7ff5d..e5be6b6 100644 --- a/print.c +++ b/print.c @@ -35,6 +35,20 @@ } } +static size_t max_test_state_len(void) +{ + int i; + size_t max_len; + + for (i = max_len = 0; i < TEST_STATE_END; i++) { + size_t len = strlen(test_state_to_text(i)); + if (len > max_len) + max_len = len; + } + + return max_len; +} + static int print_supported_chips(void) { const char *delim = "/"; @@ -388,8 +402,12 @@ for (i = strlen("Board"); i < maxboardlen; i++) msg_ginfo(" "); - msg_ginfo("Status Required value for\n"); - for (i = 0; i < maxvendorlen + maxboardlen + strlen("Status "); i++) + msg_ginfo("Status"); + for (i = strlen("Status"); i < max_test_state_len(); i++) + msg_ginfo(" "); + + msg_ginfo("Required value for\n"); + for (i = 0; i < maxvendorlen + maxboardlen + max_test_state_len(); i++) msg_ginfo(" "); msg_ginfo("-p internal:mainboard=\n"); @@ -401,14 +419,10 @@ for (i = 0; i < maxboardlen - strlen(b->name); i++) msg_ginfo(" "); - switch (b->working) { - case OK: msg_ginfo("OK "); break; - case NT: msg_ginfo("NT "); break; - case DEP: msg_ginfo("DEP "); break; - case NA: msg_ginfo("N/A "); break; - case BAD: - default: msg_ginfo("BAD "); break; - } + const char *test_state = test_state_to_text(b->working); + msg_ginfo("%s", test_state); + for (i = 0; i < max_test_state_len() - strlen(test_state); i++) + msg_ginfo(" "); for (e = board_matches; e->vendor_name != NULL; e++) { if (strcmp(e->vendor_name, b->vendor) -- To view, visit https://review.coreboot.org/c/flashrom/+/37407 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie0a0b45c6466d14447aca443c2697e2048c6ef14 Gerrit-Change-Number: 37407 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-MessageType: newchange

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[L] Change in flashrom[main]: cli_classic: add options for managing OTP regions
by Florian Eckert (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk, Sergii Dmytruk. Florian Eckert has posted comments on this change by Florian Eckert. ( https://review.coreboot.org/c/flashrom/+/92264?usp=email ) Change subject: cli_classic: add options for managing OTP regions ...................................................................... Patch Set 5: (1 comment) File doc/classic_cli_manpage.rst: https://review.coreboot.org/c/flashrom/+/92264/comment/1b6bde84_213c1be7?us… : PS3, Line 339: ATTENTION: This action cannot be undone. > There are two other places: SYNOPSIS and a warning about OTP not being supported. […] I don't understand what you mean. Sorry. -- To view, visit https://review.coreboot.org/c/flashrom/+/92264?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ia024fe630004dd8a328135243354842e7a1a463d Gerrit-Change-Number: 92264 Gerrit-PatchSet: 5 Gerrit-Owner: Florian Eckert <Eckert.Florian(a)googlemail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Thu, 30 Apr 2026 14:20:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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[L] Change in flashrom[main]: spi: add functions to interact with OTP registers
by Florian Eckert (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk, Sergii Dmytruk. Hello Anastasia Klimchuk, Sergii Dmytruk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/92261?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: spi: add functions to interact with OTP registers ...................................................................... spi: add functions to interact with OTP registers Some SPI chips have an OTP (one-time programmable) non-volatile memory area that can be programmed normaly exactly once. To program this area, different steps must be done depending on which SPI chip and manufacturer is used. This commit is a preparation commit to add the backend to program the OTP security registers, that can be found on Winbond SPI flashs. Change-Id: I3406c2ebf6f06cf954ac84bd5f6a9934684b690a Co-Developed-by: Hatim Kanchwala <hatim(a)hatimak.me> Co-Developed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Signed-off-by: Florian Eckert <fe(a)dev.tdt.de> --- M include/chipdrivers.h M include/spi.h M spi25.c 3 files changed, 262 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/61/92261/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/92261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I3406c2ebf6f06cf954ac84bd5f6a9934684b690a Gerrit-Change-Number: 92261 Gerrit-PatchSet: 4 Gerrit-Owner: Florian Eckert <Eckert.Florian(a)googlemail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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[L] Change in flashrom[main]: libflashrom: add OTP regions management API
by Florian Eckert (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk, Peter Marheine, Sergii Dmytruk. Hello Anastasia Klimchuk, Peter Marheine, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/92262?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: libflashrom: add OTP regions management API ...................................................................... libflashrom: add OTP regions management API This commit adds OTP secure register handling. Not all SPI chips implement OTP handling via a security register. For this reason, a new 'otp' struct has been added, which allows the handling to be extended so that other access methods can also be implemented. So far, only the method that uses a special SPI command to access the security registers has been implemented. This is used in Winbond SPI chips. Change-Id: Ife6a6adc3668bd128e9fc2b37bbde74b2072e1b6 Co-Developed-by: Hatim Kanchwala <hatim(a)hatimak.me> Co-Developed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Signed-off-by: Florian Eckert <fe(a)dev.tdt.de> --- M include/flash.h M include/libflashrom.h M meson.build A otp.c 4 files changed, 363 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/92262/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/92262?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ife6a6adc3668bd128e9fc2b37bbde74b2072e1b6 Gerrit-Change-Number: 92262 Gerrit-PatchSet: 5 Gerrit-Owner: Florian Eckert <Eckert.Florian(a)googlemail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>

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[S] Change in flashrom[main]: flashchips: add OTP security registers support for W25Q64_V
by Florian Eckert (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Peter Marheine, Stefan Reinauer. Hello Anastasia Klimchuk, Nikolai Artemiev, Peter Marheine, Stefan Reinauer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/92263?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: flashchips: add OTP security registers support for W25Q64_V ...................................................................... flashchips: add OTP security registers support for W25Q64_V * Winbond W25Q64BV/W25Q64CV/W25Q64FV Datasheet(BV): https://www.winbond.com/hq/support/documentation/levelOne.jsp?__locale=en&D… Datasheet(CV): https://www.winbond.com/hq/support/documentation/levelOne.jsp?__locale=en&D… Datasheet(FV): https://www.winbond.com/hq/support/documentation/levelOne.jsp?__locale=en&D… * Winbond W25Q64JV-.Q Datasheet(JV): https://www.winbond.com/hq/support/documentation/levelOne.jsp?__locale=en&D… Change-Id: Ic9ea3763cb4c6837733eabf945642b29a8ff6483 Co-Developed-by: Hatim Kanchwala <hatim(a)hatimak.me> Co-Developed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Signed-off-by: Florian Eckert <fe(a)dev.tdt.de> --- M flashchips/winbond.c M include/flash.h M otp.c 3 files changed, 34 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/63/92263/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/92263?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ic9ea3763cb4c6837733eabf945642b29a8ff6483 Gerrit-Change-Number: 92263 Gerrit-PatchSet: 5 Gerrit-Owner: Florian Eckert <Eckert.Florian(a)googlemail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org>

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[L] Change in flashrom[main]: cli_classic: add options for managing OTP regions
by Florian Eckert (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk. Hello Anastasia Klimchuk, Sergii Dmytruk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/92264?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: cli_classic: add options for managing OTP regions ...................................................................... cli_classic: add options for managing OTP regions Use the new OTP regions management API by adding new command line options. This commit also updates the manpage with information about all new OTP command line options. Change-Id: Ia024fe630004dd8a328135243354842e7a1a463d Co-Developed-by: Hatim Kanchwala <hatim(a)hatimak.me> Co-Developed-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Signed-off-by: Florian Eckert <fe(a)dev.tdt.de> --- M cli_classic.c M doc/classic_cli_manpage.rst 2 files changed, 296 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/64/92264/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/92264?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ia024fe630004dd8a328135243354842e7a1a463d Gerrit-Change-Number: 92264 Gerrit-PatchSet: 5 Gerrit-Owner: Florian Eckert <Eckert.Florian(a)googlemail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>

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[L] Change in flashrom[main]: libflashrom: add OTP regions management API
by Florian Eckert (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk, Peter Marheine, Sergii Dmytruk. Florian Eckert has posted comments on this change by Florian Eckert. ( https://review.coreboot.org/c/flashrom/+/92262?usp=email ) Change subject: libflashrom: add OTP regions management API ...................................................................... Patch Set 4: (1 comment) File include/libflashrom.h: https://review.coreboot.org/c/flashrom/+/92262/comment/95b13729_7f302e61?us… : PS1, Line 723: #define FLASHROM_OTP_MAX_REGIONS 4 > I don't mind the constant, I was wondering is it enough, could it be some vendor having 8 regions? If it is for array, it can be larger number just in case, like 8 ? I haven’t seen that many chips yet, but the ones I have seen all have a maximum of three regions. It’s quite possible that there are chips that have more than that. In that case, we’d just have to make it bigger. -- To view, visit https://review.coreboot.org/c/flashrom/+/92262?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ife6a6adc3668bd128e9fc2b37bbde74b2072e1b6 Gerrit-Change-Number: 92262 Gerrit-PatchSet: 4 Gerrit-Owner: Florian Eckert <Eckert.Florian(a)googlemail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Thu, 30 Apr 2026 12:21:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Comment-In-Reply-To: Florian Eckert <Eckert.Florian(a)googlemail.com>

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[S] Change in flashrom[main]: flashchips: Add write protect bits for XM25QU256C/XM25QU256D
by Hsuan-ting Chen (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk, Hsuan-ting Chen, Nikolai Artemiev, Stefan Reinauer. Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/92475?usp=email to look at the new patch set (#2). Change subject: flashchips: Add write protect bits for XM25QU256C/XM25QU256D ...................................................................... flashchips: Add write protect bits for XM25QU256C/XM25QU256D Update .feature_bits and add .reg_bits for write protection. Datasheets: https://www.icbase.com/File/News/download/XM25QU256D_Ver1.0.pdf https://www.xmcwh.com/uploads/539/XM25QU256C_Ver1.2.pdf BUG=b:500519405 TEST=Compiled successfully using Meson Change-Id: I7d22abc5572f3dbabc70434ca6c09e4464cfef9e Signed-off-by: Hsuan Ting Chen <roccochen(a)google.com> --- M flashchips/xmc.c 1 file changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/92475/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/92475?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I7d22abc5572f3dbabc70434ca6c09e4464cfef9e Gerrit-Change-Number: 92475 Gerrit-PatchSet: 2 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org>

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[S] Change in flashrom[main]: flashchips: Add write protect bits for XM25QU256C/XM25QU256D
by Hsuan-ting Chen (Code Review) April 30, 2026

April 30, 2026

Hsuan-ting Chen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/92475?usp=email ) Change subject: flashchips: Add write protect bits for XM25QU256C/XM25QU256D ...................................................................... flashchips: Add write protect bits for XM25QU256C/XM25QU256D Update .feature_bits and add .reg_bits for write protection. Datasheets: https://www.icbase.com/File/News/download/XM25QU256D_Ver1.0.pdf https://www.xmcwh.com/uploads/539/XM25QU256C_Ver1.2.pdf BUG=b:500519405 TEST=Compiled successfully using Meson Change-Id: I7d22abc5572f3dbabc70434ca6c09e4464cfef9e --- M flashchips/xmc.c 1 file changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/92475/1 diff --git a/flashchips/xmc.c b/flashchips/xmc.c index 72bf425..05b45be 100644 --- a/flashchips/xmc.c +++ b/flashchips/xmc.c @@ -611,7 +611,7 @@ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ - | FEATURE_4BA_WRITE, + | FEATURE_4BA_WRITE | FEATURE_WRSR2 | FEATURE_WRSR3 | FEATURE_WRSR_EXT2, .tested = TEST_OK_PREW, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, @@ -639,6 +639,15 @@ .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, .voltage = {1650, 1950}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .srl = {STATUS2, 0, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {STATUS1, 6, RW}, + .cmp = {STATUS2, 6, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { -- To view, visit https://review.coreboot.org/c/flashrom/+/92475?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I7d22abc5572f3dbabc70434ca6c09e4464cfef9e Gerrit-Change-Number: 92475 Gerrit-PatchSet: 1 Gerrit-Owner: Hsuan-ting Chen <roccochen(a)google.com>

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[M] Change in flashrom[main]: flashchips: add OTP security registers support for W25Q64_V
by Florian Eckert (Code Review) April 30, 2026

April 30, 2026

Attention is currently required from: Anastasia Klimchuk, Nikolai Artemiev, Peter Marheine, Stefan Reinauer. Florian Eckert has posted comments on this change by Florian Eckert. ( https://review.coreboot.org/c/flashrom/+/92263?usp=email ) Change subject: flashchips: add OTP security registers support for W25Q64_V ...................................................................... Patch Set 4: (1 comment) File otp_layouts.c: https://review.coreboot.org/c/flashrom/+/92263/comment/20ae0a9a_0b3b4ebf?us… : PS1, Line 21: .regions = : { : { : .addr = 0x001000, : .size = 256, : .user_lock = {STATUS2, 3, OTP}, : }, { : .addr = 0x002000, : .size = 256, : .user_lock = {STATUS2, 4, OTP}, : }, { : .addr = 0x003000, : .size = 256, : .user_lock = {STATUS2, 5, OTP}, : }, : }, > > But many chips share the same struct layout for OTP. […] Sorry to ask, but I didn't quite understand that. Am I supposed to leave it as it is now? I’d say yes, as these entries can be retrieved again, since the chips are constructed in a similar way. -- To view, visit https://review.coreboot.org/c/flashrom/+/92263?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Ic9ea3763cb4c6837733eabf945642b29a8ff6483 Gerrit-Change-Number: 92263 Gerrit-PatchSet: 4 Gerrit-Owner: Florian Eckert <Eckert.Florian(a)googlemail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Thu, 30 Apr 2026 10:26:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Florian Eckert <Eckert.Florian(a)googlemail.com>

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