January 2026 - flashrom-gerrit

[M] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: Anastasia Klimchuk, David Schneider, Eugene Goubine. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/90827?usp=email to look at the new patch set (#11). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: flashrom: adding support for die-size in chips ...................................................................... flashrom: adding support for die-size in chips Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Signed-off-by: Evgeni Goubine Bricker <egoubine(a)winbond.com> --- M doc/release_notes/devel.rst M flashrom.c M include/flash.h 3 files changed, 72 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/90827/11 -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 11 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org>

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[M] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: Anastasia Klimchuk, David Schneider, Eugene Goubine. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/90827?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: flashrom: adding support for die-size in chips ...................................................................... flashrom: adding support for die-size in chips Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Signed-off-by: Evgeni Goubine Bricker <egoubine(a)winbond.com> --- M doc/release_notes/devel.rst M flashrom.c M include/flash.h 3 files changed, 71 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/90827/10 -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 10 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org>

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[S] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: Anastasia Klimchuk, David Schneider, Eugene Goubine. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/90827?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: flashrom: adding support for die-size in chips ...................................................................... flashrom: adding support for die-size in chips Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Signed-off-by: Evgeni Goubine Bricker <egoubine(a)winbond.com> --- M doc/release_notes/devel.rst M flashrom.c M include/flash.h 3 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/90827/9 -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 9 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org>

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[S] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: Anastasia Klimchuk, David Schneider, Eugene Goubine. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/90827?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: flashrom: adding support for die-size in chips ...................................................................... flashrom: adding support for die-size in chips Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Signed-off-by: Evgeni Goubine Bricker <egoubine(a)winbond.com> --- M doc/release_notes/devel.rst M flashrom.c M include/flash.h 3 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/90827/8 -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 8 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org>

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[S] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: Anastasia Klimchuk, David Schneider, Eugene Goubine. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/90827?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: flashrom: adding support for die-size in chips ...................................................................... flashrom: adding support for die-size in chips Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Signed-off-by: Evgeni Goubine Bricker <egoubine(a)winbond.com> --- M doc/release_notes/devel.rst M flashrom.c M include/flash.h 3 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/90827/7 -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 7 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org>

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[S] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: Anastasia Klimchuk, David Schneider. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/90827?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: flashrom: adding support for die-size in chips ...................................................................... flashrom: adding support for die-size in chips Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Signed-off-by: Evgeni Goubine Bricker <egoubine(a)winbond.com> --- M doc/release_notes/devel.rst M flashrom.c M include/flash.h 3 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/90827/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 6 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org>

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[S] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: Anastasia Klimchuk, David Schneider. Eugene Goubine has posted comments on this change by Eugene Goubine. ( https://review.coreboot.org/c/flashrom/+/90827?usp=email ) Change subject: flashrom: adding support for die-size in chips ...................................................................... Patch Set 5: (3 comments) Patchset: PS2: > also just to check: what you said as "bother legacy code" was that the change in spi. […] I realized that since flashrom writes/reads in pages this is not needed eventually for multi-die chips. Generic code will need only to "prepare address" by switching to specific die for spiStacked chips ( David's patch ) Patchset: PS5: Hi Anastasia, thanks you for your comments. Guess this patch is ready. I will try to provide you patches on top, though since they require real hw checks it will be not that fast File include/flash.h: https://review.coreboot.org/c/flashrom/+/90827/comment/f1f6c387_9866f3fb?us… : PS3, Line 431: /* Die selection function for multi-die chips */ : typedef int (die_selectfunc_t)(struct flashctx* flash, unsigned int die_num); > And now you can also add lookup_dieselect_func_ptr function with this enum! (it will be small bit st […] Acknowledged -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 5 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org> Gerrit-Comment-Date: Sat, 31 Jan 2026 12:19:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eugene Goubine <egoubine(a)winbond.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[S] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Eugene Goubine (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: David Schneider, Eugene Goubine. Hello Anastasia Klimchuk, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/90827?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: flashrom: adding support for die-size in chips ...................................................................... flashrom: adding support for die-size in chips Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Signed-off-by: Evgeni Goubine Bricker <egoubine(a)winbond.com> --- M doc/release_notes/devel.rst M flashrom.c M include/flash.h 3 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/27/90827/5 -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 5 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org>

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[S] Change in flashrom[main]: flashrom: adding support for die-size in chips
by Anastasia Klimchuk (Code Review) Jan. 31, 2026

Jan. 31, 2026

Attention is currently required from: David Schneider, Eugene Goubine. Anastasia Klimchuk has posted comments on this change by Eugene Goubine. ( https://review.coreboot.org/c/flashrom/+/90827?usp=email ) Change subject: flashrom: adding support for die-size in chips ...................................................................... Patch Set 4: (3 comments) Patchset: PS2: > thanks done. also just to check: what you said as "bother legacy code" was that the change in spi.c that you reverted in the later version? Do you plan to do this later, in further commit(s)? I re-read the conversation, you said this was needed to "ensure die is not crossed in generic code" , would it still be useful eventually? Patchset: PS3: > Sure I plan to use this multi-die infrastructure for 1) some errata on second die for w77q128nw 2) f […] I see, the idea looks good, and yes sometimes multiple people work on the same feature. This initial patch can be easily downloaded (by anyone) and then further work (further commits) can be done on top. The reason I don't want to merge this one patch by itself, is we need to make sure the new fields are doing what you want to do, and work for the scenarios you plan. For this, the best thing is to write the code, and upload few more commits on top! I am very interested to have a look! the doc about download https://flashrom.org/dev_guide/development_guide.html#downloading-patch-fro… File include/flash.h: https://review.coreboot.org/c/flashrom/+/90827/comment/db63ecf3_57bfd7c3?us… : PS3, Line 431: /* Die selection function for multi-die chips */ : typedef int (die_selectfunc_t)(struct flashctx* flash, unsigned int die_num); > Acknowledged And now you can also add lookup_dieselect_func_ptr function with this enum! (it will be small bit still) -- To view, visit https://review.coreboot.org/c/flashrom/+/90827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idb56e335e8fd3459aa9a68fd8c807098c4840f4e Gerrit-Change-Number: 90827 Gerrit-PatchSet: 4 Gerrit-Owner: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Schneider <dnschneid(a)chromium.org> Gerrit-Attention: Eugene Goubine <egoubine(a)winbond.com> Gerrit-Attention: David Schneider <dnschneid(a)chromium.org> Gerrit-Comment-Date: Sat, 31 Jan 2026 08:50:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eugene Goubine <egoubine(a)winbond.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org>

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[M] Change in flashrom[main]: tests/probe_spi: Add test for probe_spi_res1 function
by Anastasia Klimchuk (Code Review) Jan. 31, 2026

Jan. 31, 2026

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/89087?usp=email ) ( 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: tests/probe_spi: Add test for probe_spi_res1 function ...................................................................... tests/probe_spi: Add test for probe_spi_res1 function Adds tests for probe_spi_res1 function, probing for chip model M25P05, because this model defined with probe_spi_res1. Change-Id: Idfeadda3d46201bc8209791d9469a4766200e9de Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/89087 Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M tests/probe_spi.c M tests/tests.c M tests/tests.h 3 files changed, 81 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Peter Marheine: Looks good to me, approved diff --git a/tests/probe_spi.c b/tests/probe_spi.c index 36ac847..8430261 100644 --- a/tests/probe_spi.c +++ b/tests/probe_spi.c @@ -293,9 +293,86 @@ assert_int_equal(3, probe_io_state.counter); } +void probe_jedec_res1_try_all_flashchips(void **state) +{ + struct probe_io_state probe_io_state = { + .opcode = JEDEC_RES, + .readcount = JEDEC_RES_INSIZE, + .writecount = JEDEC_RES_OUTSIZE, + /* readarr[0] is used as chip model ID for probe_spi_res1, + * unlike other probing functions which use readarr[0] as vendor ID. */ + .vendor_id = 0x05, /* ST_M25P05_RES */ + .model_id_left_byte = 0xff, /* Not used for M25P05 */ + .model_id_right_byte = 0xff, /* Not used for M25P05 */ + }; + struct io_mock_fallback_open_state linux_spi_fallback_open_state = { + .noc = 0, + .paths = { "/dev/null", NULL }, + .flags = { O_RDWR }, + }; + const struct io_mock linux_spi_io = { + .state = &probe_io_state, + .iom_fgets = linux_spi_fgets, + .iom_ioctl = probe_handler, + .fallback_open_state = &linux_spi_fallback_open_state, + }; + + const char *expected_matched_names[1] = {"M25P05"}; + run_probe_v2_lifecycle(state, &linux_spi_io, &programmer_linux_spi, "dev=/dev/null", + NULL, /* no fixed name, go through all flashchips */ + expected_matched_names, 1); + + print_probing_results(probe_io_state); + + // FIXME: change to assert_int_equal after caching is fully implemented. + // At the moment the number of opcode calls are greater than, because not all + // probing functions are using cache. + assert_in_range(probe_io_state.opcode_counter, PROBE_COUNT_JEDEC_RES_1, flashchips_size); + assert_in_range(probe_io_state.counter, PROBE_COUNT_ALL_SPI_OPCODES, flashchips_size); +} + +void probe_jedec_res1_no_matches_found(void **state) +{ + struct probe_io_state probe_io_state = { + .opcode = JEDEC_RES, + .readcount = JEDEC_RES_INSIZE, + .writecount = JEDEC_RES_OUTSIZE, + /* The values below represent non-existent chip. */ + .vendor_id = 0x00, + .model_id_left_byte = 0xff, + .model_id_right_byte = 0xff, + }; + struct io_mock_fallback_open_state linux_spi_fallback_open_state = { + .noc = 0, + .paths = { "/dev/null", NULL }, + .flags = { O_RDWR }, + }; + const struct io_mock linux_spi_io = { + .state = &probe_io_state, + .iom_fgets = linux_spi_fgets, + .iom_ioctl = probe_handler, + .fallback_open_state = &linux_spi_fallback_open_state, + }; + + run_probe_v2_lifecycle(state, &linux_spi_io, &programmer_linux_spi, "dev=/dev/null", + NULL, /* no fixed name, go through all flashchips */ + NULL, 0); + + print_probing_results(probe_io_state); + + /* No matches, but we need to go through everything to find that out. */ + // FIXME: change to assert_int_equal after caching is fully implemented. + // At the moment the number of opcode calls are greater than, because not all + // probing functions are using cache. + assert_in_range(probe_io_state.opcode_counter, PROBE_COUNT_JEDEC_RES_1, flashchips_size); + assert_in_range(probe_io_state.counter, PROBE_COUNT_ALL_SPI_OPCODES, flashchips_size); +} + #else SKIP_TEST(probe_jedec_rdid3_fixed_chipname) SKIP_TEST(probe_jedec_rdid3_try_all_flashchips) SKIP_TEST(probe_jedec_rdid3_no_matches_found) SKIP_TEST(probe_jedec_res1_fixed_chipname) + SKIP_TEST(probe_jedec_res1_try_all_flashchips) + SKIP_TEST(probe_jedec_res1_no_matches_found) #endif /* CONFIG_LINUX_SPI */ diff --git a/tests/tests.c b/tests/tests.c index 33a1a7c..63571bc 100644 --- a/tests/tests.c +++ b/tests/tests.c @@ -500,6 +500,8 @@ cmocka_unit_test(probe_jedec_rdid3_try_all_flashchips), cmocka_unit_test(probe_jedec_rdid3_no_matches_found), cmocka_unit_test(probe_jedec_res1_fixed_chipname), + cmocka_unit_test(probe_jedec_res1_try_all_flashchips), + cmocka_unit_test(probe_jedec_res1_no_matches_found), }; ret |= cmocka_run_group_tests_name("probe_spi.c tests", probe_spi_tests, NULL, NULL); diff --git a/tests/tests.h b/tests/tests.h index 6fc8397..4019866 100644 --- a/tests/tests.h +++ b/tests/tests.h @@ -49,6 +49,8 @@ void probe_jedec_rdid3_try_all_flashchips(void **state); void probe_jedec_rdid3_no_matches_found(void **state); void probe_jedec_res1_fixed_chipname(void **state); +void probe_jedec_res1_try_all_flashchips(void **state); +void probe_jedec_res1_no_matches_found(void **state); /* lifecycle.c */ void dummy_basic_lifecycle_test_success(void **state); -- To view, visit https://review.coreboot.org/c/flashrom/+/89087?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: Idfeadda3d46201bc8209791d9469a4766200e9de Gerrit-Change-Number: 89087 Gerrit-PatchSet: 5 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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