October 2024 - flashrom-gerrit

Change in flashrom[master]: pcidev: On arm64 we are not getting a valid BAR0 address
by Martijn Berger (Code Review) Sept. 13, 2025

Sept. 13, 2025

Martijn Berger has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/39965 ) Change subject: pcidev: On arm64 we are not getting a valid BAR0 address ...................................................................... pcidev: On arm64 we are not getting a valid BAR0 address It seems that there is some code to work around a possible bug in old versions of libpci. This trusts libpci if it is new enough Change-Id: I8bd32c6344b0831a949c3853abeb84905420922a Signed-off-by: Martijn Berger <martijn.berger(a)gmail.com> --- M pcidev.c M programmer.h 2 files changed, 30 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/39965/1 diff --git a/pcidev.c b/pcidev.c index 54c1fd3..973acde 100644 --- a/pcidev.c +++ b/pcidev.c @@ -30,20 +30,47 @@ TYPE_UNKNOWN }; +int pci_bar_nuber_from_offset(int offset) +{ + switch (offset) { + case PCI_BASE_ADDRESS_0: + return 0; + case PCI_BASE_ADDRESS_1: + return 1; + case PCI_BASE_ADDRESS_2: + return 2; + case PCI_BASE_ADDRESS_3: + return 3; + case PCI_BASE_ADDRESS_4: + return 4; + case PCI_BASE_ADDRESS_5: + return 5; + default: + return -1; + } + return -1; +} + uintptr_t pcidev_readbar(struct pci_dev *dev, int bar) { uint64_t addr; uint32_t upperaddr; uint8_t headertype; uint16_t supported_cycles; + int bar_number; enum pci_bartype bartype = TYPE_UNKNOWN; headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f; msg_pspew("PCI header type 0x%02x\n", headertype); + bar_number = pci_bar_nuber_from_offset(bar); - /* Don't use dev->base_addr[x] (as value for 'bar'), won't work on older libpci. */ - addr = pci_read_long(dev, bar); + if (PCI_LIB_VERSION >= 0x030500 && bar_number > -1) { + addr = dev->base_addr[bar_number]; + } else { + /* Don't use dev->base_addr[x] (as value for 'bar'), won't work on older libpci. */ + addr = pci_read_long(dev, bar); + } /* Sanity checks. */ switch (headertype) { diff --git a/programmer.h b/programmer.h index 9a41be1..5d4c1d7 100644 --- a/programmer.h +++ b/programmer.h @@ -190,6 +190,7 @@ // FIXME: This needs to be local, not global(?) extern struct pci_access *pacc; int pci_init_common(void); +int pci_bar_nuber_from_offset(int offset); uintptr_t pcidev_readbar(struct pci_dev *dev, int bar); struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar); /* rpci_write_* are reversible writes. The original PCI config space register -- To view, visit https://review.coreboot.org/c/flashrom/+/39965 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I8bd32c6344b0831a949c3853abeb84905420922a Gerrit-Change-Number: 39965 Gerrit-PatchSet: 1 Gerrit-Owner: Martijn Berger Gerrit-MessageType: newchange

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Change in flashrom[master]: cli_classic.c: Add runtime measurement
by Simon Buhrow (Code Review) Aug. 20, 2025

Aug. 20, 2025

Simon Buhrow has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/47805 ) Change subject: cli_classic.c: Add runtime measurement ...................................................................... cli_classic.c: Add runtime measurement To get an fast and easy feedback on how parameters effect runtime (e.g. clock setting, polling delays, ...). Signed-off-by: Simon Buhrow <simon.buhrow(a)posteo.de> Change-Id: I2238b3f3e6c2ab7745994662a88787fa2e86d480 --- M cli_classic.c 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/47805/1 diff --git a/cli_classic.c b/cli_classic.c index ae7f6ef..0d5381f 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -24,6 +24,7 @@ #include <string.h> #include <stdlib.h> #include <getopt.h> +#include <time.h> #include "flash.h" #include "flashchips.h" #include "fmap.h" @@ -142,6 +143,7 @@ /* Probe for up to eight flash chips. */ struct flashctx flashes[8] = {{0}}; struct flashctx *fill_flash; + struct timespec time_start, time_end; const char *name; int namelen, opt, i, j; int startchip = -1, chipcount = 0, option_index = 0, force = 0, ifd = 0, fmap = 0; @@ -528,6 +530,8 @@ /* FIXME: Delay calibration should happen in programmer code. */ myusec_calibrate_delay(); + timespec_get(&time_start, TIME_UTC); + if (programmer_init(prog, pparam)) { msg_perr("Error: Programmer initialization failed.\n"); ret = 1; @@ -806,6 +810,9 @@ for (i = 0; i < chipcount; i++) free(flashes[i].chip); + timespec_get(&time_end, TIME_UTC); + msg_gdbg("Runtime: %d:%2d min:s\n", (int)((time_end.tv_sec-time_start.tv_sec) / 60), (int)(time_end.tv_sec-time_start.tv_sec) % 60); + layout_cleanup(&include_args); free(filename); free(fmapfile); -- To view, visit https://review.coreboot.org/c/flashrom/+/47805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2238b3f3e6c2ab7745994662a88787fa2e86d480 Gerrit-Change-Number: 47805 Gerrit-PatchSet: 1 Gerrit-Owner: Simon Buhrow Gerrit-MessageType: newchange

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Change in flashrom[master]: libflashrom.map: Add missing symbols
by Edward O'Callaghan (Code Review) April 7, 2025

April 7, 2025

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38993 ) Change subject: libflashrom.map: Add missing symbols ...................................................................... libflashrom.map: Add missing symbols The following symbols were missing at link-time from libflashrom: supported_flash_chips; supported_boards; supported_chipsets; Change-Id: I299928d62788c0abfe7f6cdd3e8ad8be0c49e45e Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M libflashrom.map 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/93/38993/1 diff --git a/libflashrom.map b/libflashrom.map index d6dd24d..9430775 100644 --- a/libflashrom.map +++ b/libflashrom.map @@ -25,6 +25,9 @@ flashrom_set_log_callback; flashrom_shutdown; flashrom_supported_programmers; + flashrom_supported_flash_chips; + flashrom_supported_boards; + flashrom_supported_chipsets; flashrom_system_info; flashrom_version_info; local: *; -- To view, visit https://review.coreboot.org/c/flashrom/+/38993 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I299928d62788c0abfe7f6cdd3e8ad8be0c49e45e Gerrit-Change-Number: 38993 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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[L] Change in flashrom[main]: rpmc: add rpmc commands feature
by Peter Marheine (Code Review) Oct. 31, 2024

Oct. 31, 2024

Attention is currently required from: Anastasia Klimchuk, Matti Finder. Peter Marheine has posted comments on this change by Matti Finder. ( https://review.coreboot.org/c/flashrom/+/84934?usp=email ) Change subject: rpmc: add rpmc commands feature ...................................................................... Patch Set 2: (1 comment) File include/rpmc.h: https://review.coreboot.org/c/flashrom/+/84934/comment/5b67ddf3_b8ad00be?us… : PS1, Line 37: uint8_t status; > Within JESD260 there is a specific 8-bit extended status register defined. […] I don't mind returning 0x80 on success, but the documentation comments should be clear on how to interpret the return value. -- To view, visit https://review.coreboot.org/c/flashrom/+/84934?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Gerrit-Change-Number: 84934 Gerrit-PatchSet: 2 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com> Gerrit-Comment-Date: Thu, 31 Oct 2024 22:36:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matti Finder <matti.finder(a)gmail.com> Comment-In-Reply-To: Peter Marheine <pmarheine(a)chromium.org>

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[L] Change in flashrom[main]: rpmc: add rpmc commands feature
by Matti Finder (Code Review) Oct. 31, 2024

Oct. 31, 2024

Attention is currently required from: Anastasia Klimchuk, Peter Marheine. Matti Finder has posted comments on this change by Matti Finder. ( https://review.coreboot.org/c/flashrom/+/84934?usp=email ) Change subject: rpmc: add rpmc commands feature ...................................................................... Patch Set 2: (3 comments) File include/rpmc.h: https://review.coreboot.org/c/flashrom/+/84934/comment/d7912236_6d9d1418?us… : PS1, Line 37: uint8_t status; > It looks like you use status values in the CLI and 0x80 always indicates success, but that's not a v […] Within JESD260 there is a specific 8-bit extended status register defined. The status for last command success is 0b10000000, hence the 0x80. The status 0 is only used as the state immideatly after reboot, so it should never happen after one of our transmissions. So we could also use it as a return value without losing valuable data. What would you prefer keeping it close to JESD260 and returning the status register value, and documenting it better (maybe adding a enum for the values). Or cheating a bit and returning 0 on success instead of 0x80. I currently prefer the second option, with some additional defines for the bits. File meson.build: https://review.coreboot.org/c/flashrom/+/84934/comment/aa3c01a9_54dc9fd4?us… : PS1, Line 177: enabled > `enabled` is only true if the feature is set to `enabled` (not `auto`). […] Done File rpmc.c: https://review.coreboot.org/c/flashrom/+/84934/comment/794bd7c8_11441024?us… : PS1, Line 287: unsigned char msg[RPMC_UPDATE_HMAC_KEY_MSG_LENGTH]; > I'd prefer to use initializers for arrays like this (throughout this file), to make it less prone to […] Done -- To view, visit https://review.coreboot.org/c/flashrom/+/84934?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Gerrit-Change-Number: 84934 Gerrit-PatchSet: 2 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Thu, 31 Oct 2024 16:21:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Peter Marheine <pmarheine(a)chromium.org>

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[L] Change in flashrom[main]: rpmc: add rpmc commands feature
by Matti Finder (Code Review) Oct. 31, 2024

Oct. 31, 2024

Attention is currently required from: Anastasia Klimchuk, Matti Finder. Hello Anastasia Klimchuk, Peter Marheine, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/84934?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: rpmc: add rpmc commands feature ...................................................................... rpmc: add rpmc commands feature Added optional support for all the commands specified in JESD260. Added a new optional dependency to openssls libcrypto. Added parsing for the rpmc parameter sfdp table. Added necessary rpmc parameter information to flashchips struct and the flash hardening feature to enable rpmc commands. Enables future use of these commands in the cli_client and also libflashrom. Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Signed-off-by: Matti Finder <matti.finder(a)gmail.com> --- M include/flash.h A include/rpmc.h M meson.build M meson_options.txt A rpmc.c M sfdp.c 6 files changed, 670 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/84934/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/84934?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Gerrit-Change-Number: 84934 Gerrit-PatchSet: 2 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com>

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[M] Change in flashrom[main]: Display progress for what is actually erased/written
by Sergii Dmytruk (Code Review) Oct. 31, 2024

Oct. 31, 2024

Attention is currently required from: Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change by Anastasia Klimchuk. ( https://review.coreboot.org/c/flashrom/+/84439?usp=email ) Change subject: Display progress for what is actually erased/written ...................................................................... Patch Set 17: Code-Review+2 (2 comments) Patchset: PS16: > Just out of curiosity I ran the test case from here https://review.coreboot. […] Read also reaches 50% for the second command: ``` Found Winbond flash chip "W25Q128.V" (16384 kB, SPI) on dummy. Reading old flash chip contents... [READ: 100%]...done. Updating flash chip contents... [READ: 50%][ERASE: 50%][WRITE: 100%]...Erase/write done from 0 to ffffff Verifying flash... [READ: 100%]...VERIFIED. ``` Erasure is probably the result of selecting more fine-grained erasure functions in `erasure_layout.c`. Not sure about reads. File flashrom.c: https://review.coreboot.org/c/flashrom/+/84439/comment/a8f29ee5_d947e26b?us… : PS13, Line 1270: // FIXME: round up to granularity? > Okay so I will close this (and the other one). […] Sure. -- To view, visit https://review.coreboot.org/c/flashrom/+/84439?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I88ac4d40f1b6ccc1636b1efb690d8d68bdebec08 Gerrit-Change-Number: 84439 Gerrit-PatchSet: 17 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 31 Oct 2024 14:44:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Comment-In-Reply-To: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>

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[S] Change in flashrom[main]: flashchips: add GD25F128F
by Anastasia Klimchuk (Code Review) Oct. 31, 2024

Oct. 31, 2024

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84827?usp=email ) Change subject: flashchips: add GD25F128F ...................................................................... flashchips: add GD25F128F GD25F128F: 3V 128Mbit, high performance Tested on ch347 with erase, write, read, and protection Corrected the OTP statement. Change-Id: I14c0905f50e92492287d50f8377790b997c4acfe Signed-off-by: Victor <vlim(a)gigadevice.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84827 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M flashchips.c M include/flashchips.h 2 files changed, 46 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index f480078..c32159d 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8188,6 +8188,51 @@ .decode_range = DECODE_RANGE_SPI25, }, +{ + .vendor = "GigaDevice", + .name = "GD25F128F", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25F128F, + .total_size = 16384, + .page_size = 256, + /* OTP: 3x2048B; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2 | FEATURE_WRSR3, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */ + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + .reg_bits = + { + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */ + }, + .decode_range = DECODE_RANGE_SPI25, + }, + { .vendor = "GigaDevice", .name = "GD25F256F", diff --git a/include/flashchips.h b/include/flashchips.h index 886ddc9..719486e 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -402,6 +402,7 @@ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25F64F 0x4317 +#define GIGADEVICE_GD25F128F 0x4318 #define GIGADEVICE_GD25F256F 0x4319 #define GIGADEVICE_GD25LQ40 0x6013 #define GIGADEVICE_GD25LQ80 0x6014 -- To view, visit https://review.coreboot.org/c/flashrom/+/84827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I14c0905f50e92492287d50f8377790b997c4acfe Gerrit-Change-Number: 84827 Gerrit-PatchSet: 3 Gerrit-Owner: Victor Lim <vlim(a)gigadevice.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in flashrom[main]: doc: Add chip models support into recent development
by Anastasia Klimchuk (Code Review) Oct. 30, 2024

Oct. 30, 2024

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84870?usp=email ) Change subject: doc: Add chip models support into recent development ...................................................................... doc: Add chip models support into recent development Change-Id: I9b96902a02b83d35f0a0f221bd1678b7edf99dad Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/84870 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Peter Marheine <pmarheine(a)chromium.org> --- M doc/release_notes/devel.rst 1 file changed, 45 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Peter Marheine: Looks good to me, approved diff --git a/doc/release_notes/devel.rst b/doc/release_notes/devel.rst index c542bea..f54b5f1 100644 --- a/doc/release_notes/devel.rst +++ b/doc/release_notes/devel.rst @@ -26,6 +26,7 @@ New Feature =========== + Libpci 3.13.0 and onwards support ECAM to access pci registers. Flashrom will be moved to ECAM from IO port 0xcf8/0xcfc if the libpci version is >= 3.13.0. The ECAM has been supported for a very long time, most platforms should support @@ -39,4 +40,48 @@ Chipset support =============== + Added Raptor Point PCH support. + +Chip model support added +======================== + +* FM25Q04 +* FM25Q64 +* FM25Q128 + +* GD25B128E +* GD25B256E +* GD25B512MF +* GD25F64F +* GD25F256F +* GD25R128E +* GD25R256E +* GD25R512MF +* GD25LB256F +* GD25LB512ME +* GD25LB512MF +* GD25LR256F +* GD25LR512MF +* GD25LF256F +* GD25LF512MF + +* MX25U25645G +* MX77U51250F + +* W25Q32JV_M + +* XM25LU64C +* XM25QH32C +* XM25QH32D +* XM25QH64D +* XM25QH128D +* XM25QH256D +* XM25QH512C +* XM25QH512D +* XM25QU16C +* XM25QU32C +* XM25QU128D +* XM25QU256D +* XM25QU512C +* XM25QU512D -- To view, visit https://review.coreboot.org/c/flashrom/+/84870?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I9b96902a02b83d35f0a0f221bd1678b7edf99dad Gerrit-Change-Number: 84870 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in flashrom[main]: rpmc: add rpmc commands feature
by Peter Marheine (Code Review) Oct. 30, 2024

Oct. 30, 2024

Attention is currently required from: Anastasia Klimchuk, Matti Finder. Peter Marheine has posted comments on this change by Matti Finder. ( https://review.coreboot.org/c/flashrom/+/84934?usp=email ) Change subject: rpmc: add rpmc commands feature ...................................................................... Patch Set 1: (1 comment) File include/rpmc.h: https://review.coreboot.org/c/flashrom/+/84934/comment/38966ef0_ec9b0810?us… : PS1, Line 37: uint8_t status; It looks like you use status values in the CLI and 0x80 always indicates success, but that's not a value I would expect to indicate success. Can you add a little documentation here and perhaps also explain better what the function return values mean (even if it's just referring to an explanation attached to this field)? -- To view, visit https://review.coreboot.org/c/flashrom/+/84934?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: flashrom Gerrit-Branch: main Gerrit-Change-Id: I6ab3d0446e9fd674b20550fdbfaf499b8d4a9b38 Gerrit-Change-Number: 84934 Gerrit-PatchSet: 1 Gerrit-Owner: Matti Finder <matti.finder(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Matti Finder <matti.finder(a)gmail.com> Gerrit-Comment-Date: Wed, 30 Oct 2024 22:35:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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