October 2021 - flashrom-gerrit

Change in flashrom[master]: tests: Extract setup and teardown for chip tests
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/57436 ) Change subject: tests: Extract setup and teardown for chip tests ...................................................................... tests: Extract setup and teardown for chip tests Steps to setup and teardown for a chip test are repeated for every test, so they can be extracted into their own functions. BUG=b:181803212 TEST=builds and ninja test Change-Id: If59315646f06344664df08b145866d9ce846d751 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57436 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M tests/chip.c 1 file changed, 47 insertions(+), 55 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved diff --git a/tests/chip.c b/tests/chip.c index 0cb05ad..4a61ff8 100644 --- a/tests/chip.c +++ b/tests/chip.c @@ -86,6 +86,45 @@ return 0; } +static void setup_chip(struct flashrom_flashctx *flash, struct flashrom_layout **layout, + struct flashchip *chip, const char *programmer_param) +{ + flash->chip = chip; + + g_chip_state.unlock_calls = 0; + + printf("Creating layout with one included region... "); + assert_int_equal(0, flashrom_layout_new(layout)); + /* One region which covers total size of chip. */ + assert_int_equal(0, flashrom_layout_add_region(*layout, 0, chip->total_size * 1024 - 1, "region")); + assert_int_equal(0, flashrom_layout_include_region(*layout, "region")); + + flashrom_layout_set(flash, *layout); + printf("done\n"); + + /* + * We need some programmer (any), and dummy is a very good one, + * because it doesn't need any mocking. So no extra complexity + * from a programmer side, and test can focus on working with the chip. + */ + printf("Dummyflasher initialising with param=\"%s\"... ", programmer_param); + assert_int_equal(0, programmer_init(&programmer_dummy, programmer_param)); + /* Assignment below normally happens while probing, but this test is not probing. */ + flash->mst = &registered_masters[0]; + printf("done\n"); +} + +static void teardown(struct flashrom_layout **layout) +{ + printf("Dummyflasher shutdown... "); + assert_int_equal(0, programmer_shutdown()); + printf("done\n"); + + printf("Releasing layout... "); + flashrom_layout_release(*layout); + printf("done\n"); +} + void erase_chip_test_success(void **state) { (void) state; /* unused */ @@ -108,43 +147,17 @@ .block_erase = block_erase_chip, }}, }; - struct flashrom_flashctx flash = { - .chip = &chip, - }; - + struct flashrom_flashctx flash = { 0 }; struct flashrom_layout *layout; + const char *param = ""; /* Default values for all params. */ - printf("Creating layout with one included region... "); - assert_int_equal(0, flashrom_layout_new(&layout)); - /* One region which covers total size of chip. */ - assert_int_equal(0, flashrom_layout_add_region(layout, 0, chip.total_size * 1024 - 1, "region")); - assert_int_equal(0, flashrom_layout_include_region(layout, "region")); - - flashrom_layout_set(&flash, layout); - printf("done\n"); - - /* - * We need some programmer (any), and dummy is a very good one, - * because it doesn't need any mocking. So no extra complexity - * from a programmer side, and test can focus on the code which - * erases the chip. - */ - const char *param = ""; /* default values for all params */ - printf("Dummyflasher initialising... "); - assert_int_equal(0, programmer_init(&programmer_dummy, param)); - printf("done\n"); + setup_chip(&flash, &layout, &chip, param); printf("Erase chip operation started.\n"); assert_int_equal(0, do_erase(&flash)); printf("Erase chip operation done.\n"); - printf("Dummyflasher shutdown... "); - assert_int_equal(0, programmer_shutdown()); - printf("done\n"); - - printf("Releasing layout... "); - flashrom_layout_release(layout); - printf("done\n"); + teardown(&layout); } void erase_chip_with_dummyflasher_test_success(void **state) @@ -184,43 +197,22 @@ } }, }; - struct flashrom_flashctx flash = { - .chip = &chip, - }; + struct flashrom_flashctx flash = { 0 }; struct flashrom_layout *layout; - - printf("Creating layout with one included region... "); - assert_int_equal(0, flashrom_layout_new(&layout)); - /* One region which covers total size of chip. */ - assert_int_equal(0, flashrom_layout_add_region(layout, 0, chip.total_size * 1024 - 1, "region")); - assert_int_equal(0, flashrom_layout_include_region(layout, "region")); - - flashrom_layout_set(&flash, layout); - printf("done\n"); - /* * Dummyflasher is capable to emulate a chip, so we ask it to do this. * Nothing to mock, dummy is taking care of this already. */ char *param_dup = strdup("bus=spi,emulate=W25Q128FV"); - printf("Dummyflasher initialising to emulate W25Q128FV... "); - assert_int_equal(0, programmer_init(&programmer_dummy, param_dup)); - /* Assignment below normally happens while probing, but this test is not probing. */ - flash.mst = &registered_masters[0]; - printf("done\n"); + + setup_chip(&flash, &layout, &chip, param_dup); printf("Erase chip operation started.\n"); assert_int_equal(0, do_erase(&flash)); printf("Erase chip operation done.\n"); - printf("Dummyflasher shutdown... "); - assert_int_equal(0, programmer_shutdown()); - printf("done\n"); - - printf("Releasing layout... "); - flashrom_layout_release(layout); - printf("done\n"); + teardown(&layout); free(param_dup); } 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/flashrom/+/57436 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If59315646f06344664df08b145866d9ce846d751 Gerrit-Change-Number: 57436 Gerrit-PatchSet: 5 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in flashrom[master]: nicintel_spi.c: Implement `set_sck_set_mosi` and `set_sck_get_miso`
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/49267 ) Change subject: nicintel_spi.c: Implement `set_sck_set_mosi` and `set_sck_get_miso` ...................................................................... nicintel_spi.c: Implement `set_sck_set_mosi` and `set_sck_get_miso` Tested on a 8086:1533 (i210 GbE), reads still return the same data. This cuts the time to read a Winbond W25Q80.V (1 MiB, SPI) from 66 seconds down to 48 seconds, i.e. a 37.5% increase in speed. Change-Id: I52a0ae5ff331ee2ed41652eb5c2ed7ebe7253d74 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/49267 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M nicintel_spi.c 1 file changed, 27 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/nicintel_spi.c b/nicintel_spi.c index 2f4fd10..5dcdf7d 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -165,6 +165,19 @@ pci_mmio_writel(tmp, data->spibar + FLA); } +static void nicintel_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data) +{ + struct nicintel_spi_data *data = spi_data; + uint32_t tmp; + + tmp = pci_mmio_readl(data->spibar + FLA); + tmp &= ~BIT(FL_SCK); + tmp &= ~BIT(FL_SI); + tmp |= (sck << FL_SCK); + tmp |= (mosi << FL_SI); + pci_mmio_writel(tmp, data->spibar + FLA); +} + static int nicintel_bitbang_get_miso(void *spi_data) { struct nicintel_spi_data *data = spi_data; @@ -175,10 +188,24 @@ return tmp; } +static int nicintel_bitbang_set_sck_get_miso(int sck, void *spi_data) +{ + struct nicintel_spi_data *data = spi_data; + uint32_t tmp; + + tmp = pci_mmio_readl(data->spibar + FLA); + tmp &= ~BIT(FL_SCK); + tmp |= (sck << FL_SCK); + pci_mmio_writel(tmp, data->spibar + FLA); + return (tmp >> FL_SO) & 0x1; +} + static const struct bitbang_spi_master bitbang_spi_master_nicintel = { .set_cs = nicintel_bitbang_set_cs, .set_sck = nicintel_bitbang_set_sck, .set_mosi = nicintel_bitbang_set_mosi, + .set_sck_set_mosi = nicintel_bitbang_set_sck_set_mosi, + .set_sck_get_miso = nicintel_bitbang_set_sck_get_miso, .get_miso = nicintel_bitbang_get_miso, .request_bus = nicintel_request_spibus, .release_bus = nicintel_release_spibus, -- To view, visit https://review.coreboot.org/c/flashrom/+/49267 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I52a0ae5ff331ee2ed41652eb5c2ed7ebe7253d74 Gerrit-Change-Number: 49267 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-CC: Xiang W <wxjstz(a)126.com> Gerrit-MessageType: merged

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Change in flashrom[master]: mcp6x_spi.c: Implement `set_sck_set_mosi`
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Attention is currently required from: Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49266 ) Change subject: mcp6x_spi.c: Implement `set_sck_set_mosi` ...................................................................... Patch Set 3: -Code-Review (1 comment) Patchset: PS3: Meh, made the same mistake as in the parent commit... -- To view, visit https://review.coreboot.org/c/flashrom/+/49266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie86cc9d4df6c7f0609c30ff00d6f2d77fbb8b836 Gerrit-Change-Number: 49266 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-CC: Xiang W <wxjstz(a)126.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 01 Oct 2021 11:26:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: mcp6x_spi.c: Implement `set_sck_set_mosi`
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Attention is currently required from: Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49266 ) Change subject: mcp6x_spi.c: Implement `set_sck_set_mosi` ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/49266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie86cc9d4df6c7f0609c30ff00d6f2d77fbb8b836 Gerrit-Change-Number: 49266 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Shawn C <citypw(a)hardenedlinux.org> Gerrit-CC: Xiang W <wxjstz(a)126.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 01 Oct 2021 11:25:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: ch341a: use better english in the debug message
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/58037 ) Change subject: ch341a: use better english in the debug message ...................................................................... ch341a: use better english in the debug message Change-Id: Ib7f15aa36fedc6af990c3ca45e81547cbfde24a1 Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58037 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M ch341a_spi.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved diff --git a/ch341a_spi.c b/ch341a_spi.c index 48642f3..bc4112b 100644 --- a/ch341a_spi.c +++ b/ch341a_spi.c @@ -450,7 +450,7 @@ ret = libusb_set_auto_detach_kernel_driver(handle, 1); if (ret != 0) { msg_pwarn("Platform does not support detaching of USB kernel drivers.\n" - "If an unsupported driver is active, claiming of the interface may fail.\n"); + "If an unsupported driver is active, claiming the interface may fail.\n"); } ret = libusb_claim_interface(handle, 0); -- To view, visit https://review.coreboot.org/c/flashrom/+/58037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib7f15aa36fedc6af990c3ca45e81547cbfde24a1 Gerrit-Change-Number: 58037 Gerrit-PatchSet: 2 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in flashrom[master]: dediprog.c: Split up compound conditional and swap two operations
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/51706 ) Change subject: dediprog.c: Split up compound conditional and swap two operations ...................................................................... dediprog.c: Split up compound conditional and swap two operations register_spi_master now becomes the last operation in init function, which is consistent with other spi masters. In addition, the patch fixes propagation of register_spi_master return values, which is also consistent with other spi masters. TEST=ninja test Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51706 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M dediprog.c 1 file changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve diff --git a/dediprog.c b/dediprog.c index a1d9972..85b78c8 100644 --- a/dediprog.c +++ b/dediprog.c @@ -1300,10 +1300,10 @@ if (protocol(dp_data) >= PROTOCOL_V2) spi_master_dediprog.features |= SPI_MASTER_4BA; - if (register_spi_master(&spi_master_dediprog, dp_data) || dediprog_set_leds(LED_NONE, dp_data)) - return 1; /* shutdown function does cleanup */ + if (dediprog_set_leds(LED_NONE, dp_data)) + goto init_err_cleanup_exit; - return 0; + return register_spi_master(&spi_master_dediprog, dp_data); init_err_cleanup_exit: dediprog_shutdown(dp_data); -- To view, visit https://review.coreboot.org/c/flashrom/+/51706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8 Gerrit-Change-Number: 51706 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in flashrom[master]: dediprog.c: Split up compound conditional and swap two operations
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Attention is currently required from: Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/51706 ) Change subject: dediprog.c: Split up compound conditional and swap two operations ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/51706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8 Gerrit-Change-Number: 51706 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Oct 2021 11:10:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: chipset_enable.c: Add Ids for recent Intel chipsets
by Nico Huber (Code Review) Oct. 1, 2021

Oct. 1, 2021

Attention is currently required from: Bora Guvendik, Anil Kumar K, Paul Menzel, Edward O'Callaghan, Angel Pons, Nikolai Artemiev, Anastasia Klimchuk. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/57560 ) Change subject: chipset_enable.c: Add Ids for recent Intel chipsets ...................................................................... Patch Set 7: (2 comments) Patchset: PS7: Anil, thanks for your patch. It's nice to see that Intel gets involved with flashrom. Before adding IDs for new chipset generations, we have to check if the selected code paths are compatible, as we want to keep the code base as consistent as possible. Maybe it's best to add one generation at a time in separate commits. Tiger Lake already has such a commit on Gerrit btw. (CB:55578). Ice Lake, Jasper Lake and Alder Lake still need to be looked into, I guess. Some hints how to add new Intel chipset generations: * Generally one needs the EDS and the SPI Programming Guide. * The function pointer in the PCI device table indirectly sets the generation (one of `enum ich_chipset`). For instance, CHIPSET_100_SERIES_SUNRISE_POINT. Not every new generation needs its own enum entry, but one should have a look if all code paths taken for a given entry match the new hardware. If there is no 100% compatible enum entry, then it's time to add a new one. * We also try to keep track of changes in the Flash Descriptor. And as Intel didn't give it a version number or anything like that, we try to detect the version by its contents (cf. guess_ich_chipset_from_content()). This is sometimes very fiddly, let us know if you need help with it. tl;dr Follow all the if and switch/case statements for `enum ich_chipset` to see what matches the new hardware and descriptor. File chipset_enable.c: https://review.coreboot.org/c/flashrom/+/57560/comment/c602f86c_892851da PS7, Line 2018: {0x8086, 0xa224, B_FS, OK, "Intel", "Lewisburg", enable_flash_pch100}, : {0x8086, 0x9da4, B_FS, OK, "Intel", "Cannonlake", enable_flash_pch100}, : {0x8086, 0x34a4, B_FS, OK, "Intel", "Icelake", enable_flash_pch100}, : {0x8086, 0x4da4, B_FS, OK, "Intel", "Jasperlake", enable_flash_pch100}, : {0x8086, 0xa0a4, B_FS, OK, "Intel", "Tigerlake", enable_flash_pch100}, : {0x8086, 0x7aa4, B_FS, OK, "Intel", "Alderlake-S", enable_flash_pch100}, : {0x8086, 0x51a4, B_FS, OK, "Intel", "Alderlake-P / M", enable_flash_pch100}, > flashrom uses LPC/eSPI PCI IDs instead of SPI PCI IDs. The SPI PCI device is not always visible, and didn't exist before Sunrise Point. If intel could provide documentation on what chipsets the SPI device is guaranteed to be visible, that would be nice. Then we could save us adding all the LPC/eSPI IDs for these chipsets. I just checked a Tiger Lake EDS and the bit to hide the device is reserved now. -- To view, visit https://review.coreboot.org/c/flashrom/+/57560 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iff387076567e639485ac15c25c1bcc8c37a07037 Gerrit-Change-Number: 57560 Gerrit-PatchSet: 7 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-CC: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Oct 2021 10:57:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: comment

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