October 2021 - flashrom-gerrit

Change in flashrom[master]: [RFC] writeprotect: implement wp_{get,set}_range()
by Nico Huber (Code Review) Oct. 31, 2021

Oct. 31, 2021

Attention is currently required from: Nikolai Artemiev. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58482 ) Change subject: [RFC] writeprotect: implement wp_{get,set}_range() ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: So a very basic question: Why add it to the existing CLI that is about reading/writing data and not configuration? I guess a separate tool that handles only block protection (or write protection or flash configuration in general) would be much easier to maintain. No matter where the UI parts end up, I would much prefer to only call libflashrom functions from any CLI code. Using internal APIs directly turned into havoc in the past :-/ -- To view, visit https://review.coreboot.org/c/flashrom/+/58482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7d26f43fb05c5828b9839bb57a28fa1088dcd9a0 Gerrit-Change-Number: 58482 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Sun, 31 Oct 2021 15:33:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: [TESTME]sb600spi/yangtze+: Allow and account for 4BA commands
by Nico Huber (Code Review) Oct. 31, 2021

Oct. 31, 2021

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/58777 ) Change subject: [TESTME]sb600spi/yangtze+: Allow and account for 4BA commands ...................................................................... [TESTME]sb600spi/yangtze+: Allow and account for 4BA commands Change-Id: If67c04e6b262401159ac8ad12c8cb3d482e08ec7 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M sb600spi.c 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58777/1 diff --git a/sb600spi.c b/sb600spi.c index ba3786f..63f21b5 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -573,8 +573,9 @@ }; static const struct spi_master spi_master_yangtze = { - .max_data_read = FIFO_SIZE_YANGTZE - 3, /* Apparently the big SPI 100 buffer is not a ring buffer. */ - .max_data_write = FIFO_SIZE_YANGTZE - 3, + .features = SPI_MASTER_4BA, + .max_data_read = FIFO_SIZE_YANGTZE - 4, /* Apparently the big SPI 100 buffer is not a ring buffer. */ + .max_data_write = FIFO_SIZE_YANGTZE - 4, .command = spi100_spi_send_command, .multicommand = default_spi_send_multicommand, .read = default_spi_read, -- To view, visit https://review.coreboot.org/c/flashrom/+/58777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If67c04e6b262401159ac8ad12c8cb3d482e08ec7 Gerrit-Change-Number: 58777 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: [TESTME]sb600spi: Remove memory-mapped read workaround
by Nico Huber (Code Review) Oct. 31, 2021

Oct. 31, 2021

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/58776 ) Change subject: [TESTME]sb600spi: Remove memory-mapped read workaround ...................................................................... [TESTME]sb600spi: Remove memory-mapped read workaround The actual reasons for this workaround are unknown and it bricks systems with >16MiB chips. The controller has support to restrict the available commands to a specific set of opcodes. So it seems possible that an in- compatible set of commands was locked during testing. With this patch applied, flashrom would try to use the actual SPI read command for reading. When the set of allowed opcodes is not locked, it might even work for >16MiB (then, flashrom could use extended-address register commands to access pages of 16MiB). Change-Id: I67f9ca0cd88de35953d988ab51b4b5f485085f49 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M sb600spi.c 1 file changed, 1 insertion(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/76/58776/1 diff --git a/sb600spi.c b/sb600spi.c index 7fa01af..ba3786f 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -53,7 +53,6 @@ #define FIFO_SIZE_YANGTZE 71 struct sb600spi_data { - struct flashctx *flash; uint8_t *spibar; }; @@ -556,25 +555,8 @@ return amd_imc_shutdown(dev); } -static int promontory_read_memmapped(struct flashctx *flash, uint8_t *buf, - unsigned int start, unsigned int len) -{ - struct sb600spi_data * data = (struct sb600spi_data *)flash->mst->spi.data; - if (!data->flash) { - map_flash(flash); - data->flash = flash; /* keep a copy of flashctx for unmap() on tear-down. */ - } - mmio_readn((void *)(flash->virtual_memory + start), buf, len); - return 0; -} - static int sb600spi_shutdown(void *data) { - struct sb600spi_data *sb600_data = data; - struct flashctx *flash = sb600_data->flash; - if (flash) - finalize_flash_access(flash); - free(data); return 0; } @@ -601,17 +583,6 @@ .shutdown = sb600spi_shutdown, }; -static const struct spi_master spi_master_promontory = { - .max_data_read = MAX_DATA_READ_UNLIMITED, - .max_data_write = FIFO_SIZE_YANGTZE - 3, - .command = spi100_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = promontory_read_memmapped, - .write_256 = default_spi_write_256, - .write_aai = default_spi_write_aai, - .shutdown = sb600spi_shutdown, -}; - int sb600_probe_spi(struct pci_dev *dev) { struct pci_dev *smbus_dev; @@ -784,16 +755,13 @@ return SPI_GENERIC_ERROR; } - data->flash = NULL; data->spibar = sb600_spibar; /* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */ if (amd_gen < CHIPSET_YANGTZE) register_spi_master(&spi_master_sb600, data); - else if (amd_gen == CHIPSET_YANGTZE) - register_spi_master(&spi_master_yangtze, data); else - register_spi_master(&spi_master_promontory, data); + register_spi_master(&spi_master_yangtze, data); return 0; } -- To view, visit https://review.coreboot.org/c/flashrom/+/58776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I67f9ca0cd88de35953d988ab51b4b5f485085f49 Gerrit-Change-Number: 58776 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: it87spi.c: ITE IT8792E Super IO probing support
by melvyn2 (Code Review) Oct. 30, 2021

Oct. 30, 2021

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58773 to look at the new patch set (#3). Change subject: it87spi.c: ITE IT8792E Super IO probing support ...................................................................... it87spi.c: ITE IT8792E Super IO probing support Tested read of both flash chips with the `dualbiosindex` parameter on a GIGABYTE Z390 AORUS MASTER. Signed-off-by: melvyn2 <melvyn2(a)brcok.tk> Change-Id: Iea2d4097129b8f70d3112aec92f3b4e78d68bc8d --- M it87spi.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/58773/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/58773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iea2d4097129b8f70d3112aec92f3b4e78d68bc8d Gerrit-Change-Number: 58773 Gerrit-PatchSet: 3 Gerrit-Owner: melvyn2 <melvyn2(a)brcok.tk> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: chipset_enable.c: Mark Intel Z390 as DEP
by melvyn2 (Code Review) Oct. 30, 2021

Oct. 30, 2021

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58774 to look at the new patch set (#3). Change subject: chipset_enable.c: Mark Intel Z390 as DEP ...................................................................... chipset_enable.c: Mark Intel Z390 as DEP Tested read/write on GIGABYTE Z390 AORUS MASTER, incl. ME region with me_cleaner Change-Id: If14d45c144bb32a1d1046185d4476ea29e4d0912 Signed-off-by: melvyn2 <melvyn2(a)brcok.tk> --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/58774/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/58774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If14d45c144bb32a1d1046185d4476ea29e4d0912 Gerrit-Change-Number: 58774 Gerrit-PatchSet: 3 Gerrit-Owner: melvyn2 <melvyn2(a)brcok.tk> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: chipset_enable.c: Mark Intel Z390 as DEP
by melvyn2 (Code Review) Oct. 30, 2021

Oct. 30, 2021

melvyn2 has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/58774 ) Change subject: chipset_enable.c: Mark Intel Z390 as DEP ...................................................................... chipset_enable.c: Mark Intel Z390 as DEP Tested read/write on GIGABYTE Z390 AORUS MASTER, incl. ME region with me_cleaner Change-Id: If14d45c144bb32a1d1046185d4476ea29e4d0912 Signed-off-by: melvyn2 <melvyn2(a)brcok.tk> --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/58774/1 diff --git a/chipset_enable.c b/chipset_enable.c index cb0fbf1..2f827bb 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2089,7 +2089,7 @@ {0x8086, 0x31e8, B_S, DEP, "Intel", "Gemini Lake", enable_flash_glk}, {0x8086, 0xa303, B_S, NT, "Intel", "H310", enable_flash_pch300}, {0x8086, 0xa304, B_S, NT, "Intel", "H370", enable_flash_pch300}, - {0x8086, 0xa305, B_S, NT, "Intel", "Z390", enable_flash_pch300}, + {0x8086, 0xa305, B_S, DEP, "Intel", "Z390", enable_flash_pch300}, {0x8086, 0xa306, B_S, NT, "Intel", "Q370", enable_flash_pch300}, {0x8086, 0xa308, B_S, NT, "Intel", "B360", enable_flash_pch300}, {0x8086, 0xa309, B_S, NT, "Intel", "C246", enable_flash_pch300}, -- To view, visit https://review.coreboot.org/c/flashrom/+/58774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If14d45c144bb32a1d1046185d4476ea29e4d0912 Gerrit-Change-Number: 58774 Gerrit-PatchSet: 1 Gerrit-Owner: melvyn2 <melvyn2(a)brcok.tk> Gerrit-MessageType: newchange

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Change in flashrom[master]: it87spi.c: ITE IT8792E Super IO probing support
by Melvyn (Code Review) Oct. 30, 2021

Oct. 30, 2021

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58773 to look at the new patch set (#2). Change subject: it87spi.c: ITE IT8792E Super IO probing support ...................................................................... it87spi.c: ITE IT8792E Super IO probing support Tested read of both flash chips with the `dualbiosindex` parameter on a GIGABYTE Z390 AORUS MASTER. Signed-off-by: melvyn2 <melvyn2(a)brcok.tk> Change-Id: Iea2d4097129b8f70d3112aec92f3b4e78d68bc8d --- M it87spi.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/58773/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/58773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iea2d4097129b8f70d3112aec92f3b4e78d68bc8d Gerrit-Change-Number: 58773 Gerrit-PatchSet: 2 Gerrit-Owner: Melvyn <melvyn2(a)brcok.tk> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: Add ITE IT8792E Super IO probing support for DualBIOS support Signed-...
by Melvyn (Code Review) Oct. 30, 2021

Oct. 30, 2021

Melvyn has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/58773 ) Change subject: Add ITE IT8792E Super IO probing support for DualBIOS support Signed-off-by: melvyn2 <melvyn2(a)brcok.tk> ...................................................................... Add ITE IT8792E Super IO probing support for DualBIOS support Signed-off-by: melvyn2 <melvyn2(a)brcok.tk> Change-Id: Iea2d4097129b8f70d3112aec92f3b4e78d68bc8d --- M it87spi.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/58773/1 diff --git a/it87spi.c b/it87spi.c index 5f6fb65..bd2f7bc 100644 --- a/it87spi.c +++ b/it87spi.c @@ -449,6 +449,7 @@ case 0x8705: ret |= it8705f_write_enable(superios[i].port); break; + case 0x8688: case 0x8716: case 0x8718: case 0x8720: -- To view, visit https://review.coreboot.org/c/flashrom/+/58773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iea2d4097129b8f70d3112aec92f3b4e78d68bc8d Gerrit-Change-Number: 58773 Gerrit-PatchSet: 1 Gerrit-Owner: Melvyn <melvyn2(a)brcok.tk> Gerrit-MessageType: newchange

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Change in flashrom[master]: [RFC] writeprotect: implement wp_get_ranges()
by Sergii Dmytruk (Code Review) Oct. 30, 2021

Oct. 30, 2021

Attention is currently required from: Nikolai Artemiev. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58481 ) Change subject: [RFC] writeprotect: implement wp_get_ranges() ...................................................................... Patch Set 6: (1 comment) File writeprotect.h: https://review.coreboot.org/c/flashrom/+/58481/comment/fcf1027d_e315eaa2 PS6, Line 57: wp_get_ranges How about renaming it to, say, `wp_list_ranges` to make it less confusing? This will separate it from `wp_get_range` and be less suggestive of getting ranges from somewhere as they are actually generated by this function. -- To view, visit https://review.coreboot.org/c/flashrom/+/58481 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d Gerrit-Change-Number: 58481 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Sat, 30 Oct 2021 16:30:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: flashchips.c: big erase blocksize first
by Angel Pons (Code Review) Oct. 29, 2021

Oct. 29, 2021

Attention is currently required from: Simon Buhrow, Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58467 ) Change subject: flashchips.c: big erase blocksize first ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: > Just a proof of concept for discussion. Sorry for the ugly code. […] I didn't take a look at the code, but I imagine this tries to use a full chip erase command where possible. Does it work when partially erasing a flash chip with a layout? -- To view, visit https://review.coreboot.org/c/flashrom/+/58467 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I862ce0b5f8912565e43c340578d8126aa2e6aa3b Gerrit-Change-Number: 58467 Gerrit-PatchSet: 5 Gerrit-Owner: Simon Buhrow Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Fri, 29 Oct 2021 14:30:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Simon Buhrow Gerrit-MessageType: comment

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