August 2019 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: dediprog: Fix SF600 4BA mode
by Patrick Rudolph (Code Review) Aug. 29, 2026

Aug. 29, 2026

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/34629 to review the following change. Change subject: dediprog: Fix SF600 4BA mode ...................................................................... dediprog: Fix SF600 4BA mode Flash chips greater than 16MiB require 4BA mode support. Current master doesn't support such mode as the SF600 uses PROTOCOL_V3. Fix protocol version check to support 4BA on PROTOCOL_V3, too. Tested on SF600 V:7.2.45 Able to read and write "IS25WP256" (32768 kB, SPI). Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M dediprog.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/34629/1 diff --git a/dediprog.c b/dediprog.c index 3566109..add478d 100644 --- a/dediprog.c +++ b/dediprog.c @@ -1160,7 +1160,7 @@ if (dediprog_devicetype == DEV_SF100 && protocol() == PROTOCOL_V1) spi_master_dediprog.features &= ~SPI_MASTER_NO_4BA_MODES; - if (protocol() == PROTOCOL_V2) + if (protocol() >= PROTOCOL_V2) spi_master_dediprog.features |= SPI_MASTER_4BA; if (register_spi_master(&spi_master_dediprog) || dediprog_set_leds(LED_NONE)) -- To view, visit https://review.coreboot.org/c/flashrom/+/34629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2d3089693fbd2f8f7717a8f71be242be131ce707 Gerrit-Change-Number: 34629 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

4 8

Change in flashrom[master]: Add support for continuous SPI reads
by Edward O'Callaghan (Code Review) Aug. 29, 2026

Aug. 29, 2026

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34584 ) Change subject: Add support for continuous SPI reads ...................................................................... Add support for continuous SPI reads Forward port the original patch from Duncan Laurie <dlaurie(a)chromium.org> in commit 06ffd5263892061c5ebf46e52b7878786cf2cece so that it fits for upstream consumption. This patch adds support for "unbounded reads" which are for continous reads to a SPI flash chip instead of reading in page size blocks. This speeds up the flash process over FTDI by quite a bit, testing the read of a 16MB part it goes from 2m11s to 0m15s. Change-Id: I804545aeb1b827ffdd41b21024fd618475e8263a Signed-off-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M chipdrivers.h M flash.h M spi.c M spi25.c 4 files changed, 40 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/84/34584/1 diff --git a/chipdrivers.h b/chipdrivers.h index e380878..77e1943 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -55,6 +55,7 @@ int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); +int spi_read_unbound(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_enter_4ba(struct flashctx *flash); int spi_exit_4ba(struct flashctx *flash); diff --git a/flash.h b/flash.h index b60a980..981f88b 100644 --- a/flash.h +++ b/flash.h @@ -143,6 +143,8 @@ #define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff) +#define FEATURE_UNBOUND_READ (1 << 19) + enum test_state { OK = 0, NT = 1, /* Not tested */ diff --git a/spi.c b/spi.c index 489baf3..23f4cfe 100644 --- a/spi.c +++ b/spi.c @@ -75,13 +75,18 @@ unsigned int len) { unsigned int max_data = flash->mst->spi.max_data_read; + int rc; if (max_data == MAX_DATA_UNSPECIFIED) { msg_perr("%s called, but SPI read chunk size not defined " "on this hardware. Please report a bug at " "flashrom(a)flashrom.org\n", __func__); return 1; } - return spi_read_chunked(flash, buf, start, len, max_data); + if (flash->feature_bits & FEATURE_UNBOUND_READ) + rc = spi_read_unbound(flash, buf, start, len, max_data); + else + rc = spi_read_chunked(flash, buf, start, len, max_data); + return rc; } int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) diff --git a/spi25.c b/spi25.c index 2a1d492..3327110 100644 --- a/spi25.c +++ b/spi25.c @@ -659,6 +659,37 @@ } /* + * Read a part of the flash chip. + * Ignore pages and read the data continuously, the only bound is the chunksize. + */ +int spi_read_unbound(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) +{ + int rc = 0; + unsigned int i; + + for (i = start; i < (start + len); i += chunksize) { + int chunk_status = 0; + unsigned int toread = min(chunksize, start + len - i); + + chunk_status = spi_nbyte_read(flash, i, buf + (i - start), toread); + if (chunk_status) { + if (ignore_error(chunk_status)) { + /* fill this chunk with 0xff bytes and + let caller know about the error */ + memset(buf + (i - start), 0xff, toread); + rc = chunk_status; + continue; + } else { + rc = chunk_status; + break; + } + } + } + + return rc; +} + +/* * Write a part of the flash chip. * FIXME: Use the chunk code from Michael Karcher instead. * Each page is written separately in chunks with a maximum size of chunksize. -- To view, visit https://review.coreboot.org/c/flashrom/+/34584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I804545aeb1b827ffdd41b21024fd618475e8263a Gerrit-Change-Number: 34584 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

3 5

Change in ...flashrom[master]: Add "--dangerous-bruteforce" mode for the unreliable ISP environments
by mikeb mikeb (Code Review) Aug. 29, 2026

Aug. 29, 2026

Hello Mike Banon, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/31830 to review the following change. Change subject: Add "--dangerous-bruteforce" mode for the unreliable ISP environments ...................................................................... Add "--dangerous-bruteforce" mode for the unreliable ISP environments Some in-system-programming environments are very unreliable, e.g. when you connect a SOIC8 test clip to the flash chip of WR841ND v9 wireless router: because the low power SOC of this router becomes powered and is constantly trying to boot, the router's flash chip is correctly detected only 30% of times, and when it is detected just 30% of the read operations are successful - the rest result in zeroes or garbage data being read from a flash chip. While in this new "--dangerous-bruteforce" mode, flashrom will be constantly probing for a flash chip until it is correctly detected - and then, depending on the operation selected by a user, at the moments of chip availability it will be reading or writing by the small chunks of 256 bytes maximum size, verifying each small chunk and retrying the operation until the success or timeout (~ 60 sec). Constant probing between the small chunk operations is also being done - to avoid a possible situation where we have got two identical blocks of zeroes while reading a chunk and erroneously accepted it. Currently this mode is active only for those SPI25 chips which are ".write = spi_chip_write_256" and ".read = spi_chip_read", but later could be expanded to more functions to become useful for more chips. NOTE: this mode is experimental! Also, some targets like WR841ND v9 could block the ISP chip access completely if there is no bootable firmware inside (e.g. after you've tried to erase the chip contents). In such a situation it could be hard to recover the firmware without desoldering a flash chip and flashing it separately. Please do not erase or write to a flash chip using this mode if you are not sure. Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> Change-Id: If47476793721a0061fd65bc6d1f98d48b03dc6c1 --- M cli_classic.c M flash.h M flashrom.c M libflashrom.c M libflashrom.h M spi25.c 6 files changed, 148 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/30/31830/1 diff --git a/cli_classic.c b/cli_classic.c index ced08c6..454df2b 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -51,6 +51,7 @@ " -V | --verbose more verbose output\n" " -c | --chip <chipname> probe only for specified flash chip\n" " -f | --force force specific operations (see man page)\n" + " --dangerous-bruteforce verify each small chunk and probe constantly\n" " -n | --noverify don't auto-verify\n" " -N | --noverify-all verify included regions only (cf. -i)\n" " -l | --layout <layoutfile> read ROM layout from <layoutfile>\n" @@ -104,7 +105,7 @@ #if CONFIG_PRINT_WIKI == 1 int list_supported_wiki = 0; #endif - int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; + int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0, bruteforce = 0, timeout = 30000; int dont_verify_it = 0, dont_verify_all = 0, list_supported = 0, operation_specified = 0; struct flashrom_layout *layout = NULL; enum programmer prog = PROGRAMMER_INVALID; @@ -113,6 +114,7 @@ OPTION_FMAP, OPTION_FMAP_FILE, OPTION_FLASH_CONTENTS, + OPTION_BRUTEFORCE, }; int ret = 0; @@ -127,6 +129,7 @@ {"chip", 1, NULL, 'c'}, {"verbose", 0, NULL, 'V'}, {"force", 0, NULL, 'f'}, + {"dangerous-bruteforce", 0, NULL, OPTION_BRUTEFORCE}, {"layout", 1, NULL, 'l'}, {"ifd", 0, NULL, OPTION_IFD}, {"fmap", 0, NULL, OPTION_FMAP}, @@ -228,6 +231,9 @@ case 'f': force = 1; break; + case OPTION_BRUTEFORCE: + bruteforce = 1; + break; case 'l': if (layoutfile) { fprintf(stderr, "Error: --layout specified " @@ -503,16 +509,27 @@ msg_pdbg("The following protocols are supported: %s.\n", tempstr); free(tempstr); - for (j = 0; j < registered_master_count; j++) { - startchip = 0; - while (chipcount < ARRAY_SIZE(flashes)) { - startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0); - if (startchip == -1) - break; - chipcount++; - startchip++; + do { + chipcount = 0; + for (j = 0; j < registered_master_count; j++) { + startchip = 0; + while (chipcount < ARRAY_SIZE(flashes)) { + startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0); + if (startchip == -1) + break; + chipcount++; + startchip++; + } } - } + timeout--; + if (!timeout) { + msg_cerr("Error: Timed out trying to detect a chip.\n"); + ret = 1; + goto out_shutdown; + } + } while (bruteforce && ( !chipcount || // wait for the correct chip detection + ((flashes[0].chip->manufacture_id == GENERIC_MANUF_ID) || + (flashes[0].chip->model_id == GENERIC_DEVICE_ID)) ) ); if (chipcount > 1) { msg_cinfo("Multiple flash chip definitions match the detected chip(s): \"%s\"", @@ -650,6 +667,7 @@ #if CONFIG_INTERNAL == 1 flashrom_flag_set(fill_flash, FLASHROM_FLAG_FORCE_BOARDMISMATCH, !!force_boardmismatch); #endif + flashrom_flag_set(fill_flash, FLASHROM_FLAG_BRUTEFORCE, !!bruteforce); flashrom_flag_set(fill_flash, FLASHROM_FLAG_VERIFY_AFTER_WRITE, !dont_verify_it); flashrom_flag_set(fill_flash, FLASHROM_FLAG_VERIFY_WHOLE_CHIP, !dont_verify_all); diff --git a/flash.h b/flash.h index 911214c..6ba116e 100644 --- a/flash.h +++ b/flash.h @@ -256,6 +256,7 @@ struct { bool force; bool force_boardmismatch; + bool bruteforce; bool verify_after_write; bool verify_whole_chip; } flags; diff --git a/flashrom.c b/flashrom.c index e82c32e..8f2c859 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1641,6 +1641,8 @@ size_t i, j; bool first = true; struct block_eraser *const eraser = &flashctx->chip->block_erasers[erasefunction]; + unsigned int bruteforce = flashrom_flag_get(flashctx, FLASHROM_FLAG_BRUTEFORCE); + int timeout; info->erase_start = 0; for (i = 0; i < NUM_ERASEREGIONS; ++i) { @@ -1662,9 +1664,34 @@ msg_cdbg(", "); msg_cdbg("0x%06x-0x%06x:", info->erase_start, info->erase_end); - ret = per_blockfn(flashctx, info, eraser->block_erase); - if (ret) - return ret; + if (!bruteforce) { + ret = per_blockfn(flashctx, info, eraser->block_erase); + if (ret) + return ret; + } else { + timeout = 30000; + while(1) { + timeout--; + if (!timeout) { + msg_cerr("%s timeout during command execution\n", __func__); + return 2; + } + + /* First probe. */ + if (flashctx->chip->probe(flashctx) != 1) + continue; + + ret = per_blockfn(flashctx, info, eraser->block_erase); + if (ret) + continue; + + /* Second probe. */ + if (flashctx->chip->probe(flashctx) != 1) + continue; + + break; + } + } } if (info->region_end < info->erase_start) break; diff --git a/libflashrom.c b/libflashrom.c index f90a22c..6dd0167 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -250,6 +250,7 @@ switch (flag) { case FLASHROM_FLAG_FORCE: flashctx->flags.force = value; break; case FLASHROM_FLAG_FORCE_BOARDMISMATCH: flashctx->flags.force_boardmismatch = value; break; + case FLASHROM_FLAG_BRUTEFORCE: flashctx->flags.bruteforce = value; break; case FLASHROM_FLAG_VERIFY_AFTER_WRITE: flashctx->flags.verify_after_write = value; break; case FLASHROM_FLAG_VERIFY_WHOLE_CHIP: flashctx->flags.verify_whole_chip = value; break; } @@ -267,6 +268,7 @@ switch (flag) { case FLASHROM_FLAG_FORCE: return flashctx->flags.force; case FLASHROM_FLAG_FORCE_BOARDMISMATCH: return flashctx->flags.force_boardmismatch; + case FLASHROM_FLAG_BRUTEFORCE: return flashctx->flags.bruteforce; case FLASHROM_FLAG_VERIFY_AFTER_WRITE: return flashctx->flags.verify_after_write; case FLASHROM_FLAG_VERIFY_WHOLE_CHIP: return flashctx->flags.verify_whole_chip; default: return false; diff --git a/libflashrom.h b/libflashrom.h index 38c95d2..0f2ead8 100644 --- a/libflashrom.h +++ b/libflashrom.h @@ -51,6 +51,7 @@ enum flashrom_flag { FLASHROM_FLAG_FORCE, FLASHROM_FLAG_FORCE_BOARDMISMATCH, + FLASHROM_FLAG_BRUTEFORCE, FLASHROM_FLAG_VERIFY_AFTER_WRITE, FLASHROM_FLAG_VERIFY_WHOLE_CHIP, }; diff --git a/spi25.c b/spi25.c index 8b6c462..832c836 100644 --- a/spi25.c +++ b/spi25.c @@ -21,6 +21,7 @@ #include <stddef.h> #include <string.h> #include <stdbool.h> +#include <stdlib.h> #include "flash.h" #include "flashchips.h" #include "chipdrivers.h" @@ -655,6 +656,48 @@ return spi_send_command(flash, 1 + addr_len, len, cmd, bytes); } +static int spi_rw_bruteforce(struct flashctx *flash, uint8_t *buf1, uint8_t *buf2, + unsigned int startrw_here, unsigned int torw_len, bool rw_flag) { + int rc = 0; + int timeout = 30000; + while (1) { + timeout--; + if (!timeout) { + msg_cerr("%s timeout during command execution\n", __func__); + return -1; + } + + /* First probe. */ + if (flash->chip->probe(flash) != 1) + continue; + + /* First operation. */ + if (rw_flag == 0) + rc = spi_nbyte_read(flash, startrw_here, buf1, torw_len); + else + rc = spi_nbyte_program(flash, startrw_here, buf1, torw_len); + + if (rc != 0) + break; + + /* Second probe. */ + if (flash->chip->probe(flash) != 1) + continue; + + /* Second operation. */ + rc = spi_nbyte_read(flash, startrw_here, buf2, torw_len); + if (rc != 0) + break; + + /* Compare two buffers. */ + if (memcmp(buf1, buf2, torw_len)) + continue; + + break; + } + return rc; +} + /* * Read a part of the flash chip. * FIXME: Use the chunk code from Michael Karcher instead. @@ -668,6 +711,19 @@ /* Limit for multi-die 4-byte-addressing chips. */ unsigned int area_size = min(flash->chip->total_size * 1024, 16 * 1024 * 1024); + unsigned int bruteforce = flashrom_flag_get(flash, FLASHROM_FLAG_BRUTEFORCE); + uint8_t *const buf1 = bruteforce ? malloc(chunksize) : NULL; + uint8_t *const buf2 = bruteforce ? malloc(chunksize) : NULL; + + if (bruteforce) { + if (!buf1 || !buf2) { + msg_gerr("Out of memory!\n"); + goto _free_ret; + } + msg_cdbg("spi_read_chunked: chunksize %i ---> %i\n", chunksize, min(chunksize, 256)); + chunksize = min(chunksize, 256); + } + /* Warning: This loop has a very unusual condition and body. * The loop needs to go through each area with at least one affected * byte. The lowest area number is (start / area_size) since that @@ -685,7 +741,11 @@ lenhere = min(start + len, (i + 1) * area_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { toread = min(chunksize, lenhere - j); - rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); + if (bruteforce) { + rc = spi_rw_bruteforce(flash, buf1, buf2, starthere + j, toread, 0 /* read */); + memcpy(buf + starthere - start + j, buf1, toread); + } else + rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); if (rc) break; } @@ -693,6 +753,9 @@ break; } +_free_ret: + free(buf1); + free(buf2); return rc; } @@ -712,6 +775,19 @@ */ unsigned int page_size = flash->chip->page_size; + unsigned int bruteforce = flashrom_flag_get(flash, FLASHROM_FLAG_BRUTEFORCE); + uint8_t *const buf1 = bruteforce ? malloc(chunksize) : NULL; + uint8_t *const buf2 = bruteforce ? malloc(chunksize) : NULL; + + if (bruteforce) { + if (!buf1 || !buf2) { + msg_gerr("Out of memory!\n"); + goto _free_ret; + } + msg_cdbg("spi_write_chunked: chunksize %i ---> %i\n", chunksize, min(chunksize, 256)); + chunksize = min(chunksize, 256); + } + /* Warning: This loop has a very unusual condition and body. * The loop needs to go through each page with at least one affected * byte. The lowest page number is (start / page_size) since that @@ -731,12 +807,20 @@ int rc; towrite = min(chunksize, lenhere - j); - rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); + if (bruteforce) { + memcpy(buf1, buf + starthere - start + j, towrite); + rc = spi_rw_bruteforce(flash, buf1, buf2, starthere + j, towrite, 1 /* write */); + } else + rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); + if (rc) return rc; } } +_free_ret: + free(buf1); + free(buf2); return 0; } -- To view, visit https://review.coreboot.org/c/flashrom/+/31830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If47476793721a0061fd65bc6d1f98d48b03dc6c1 Gerrit-Change-Number: 31830 Gerrit-PatchSet: 1 Gerrit-Owner: mikeb mikeb <mikebdp2(a)gmail.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-MessageType: newchange

4 7

Change in ...flashrom[master]: [RFC] cli_classic: Add `--mode (read|write|verify|erase)` parameter
by Nico Huber (Code Review) Aug. 29, 2026

Aug. 29, 2026

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/30979 Change subject: [RFC] cli_classic: Add `--mode (read|write|verify|erase)` parameter ...................................................................... [RFC] cli_classic: Add `--mode (read|write|verify|erase)` parameter In case the user only wants to specify files for specific layout regions, we need a way to set the operation without specifying a file. Instead of making the <filename> argument optional, we can add a new syntax for this particular purpose. This way, we avoid complex command line parsing and can do more sanity checks and provide better error messages. TODO: Update manpage in case this gets accepted. Change-Id: Idfba11ec9991aac423b07f68f7dc45e7bebbb06b Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M cli_classic.c 1 file changed, 42 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/79/30979/1 diff --git a/cli_classic.c b/cli_classic.c index 324e145..d09a8d1 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -39,7 +39,8 @@ "-z|" #endif "-p <programmername>[:<parameters>] [-c <chipname>]\n" - "[-E|(-r|-w|-v) <file>] [(-l <layoutfile>|--ifd) [-i <imagename>]...] [-n] [-N] [-f]]\n" + "[(-r|-w|-v|-E) <file>|-m (r|w|v|e)] [(-l <layoutfile>|--ifd) [-i <region>]...]\n" + "[-n] [-N] [-f]]\n" "[-V[V[V]]] [-o <logfile>]\n\n", name); printf(" -h | --help print this help text\n" @@ -47,6 +48,8 @@ " -r | --read <file> read flash and save to <file>\n" " -w | --write <file> write <file> to flash\n" " -v | --verify <file> verify flash against <file>\n" + " -m | --mode <operation> for use with --include <region>:<file>,\n" + " specify the mode of operation (r|w|v|e)\n" " -E | --erase erase flash memory\n" " -V | --verbose more verbose output\n" " -c | --chip <chipname> probe only for specified flash chip\n" @@ -123,6 +126,7 @@ {"write", 1, NULL, 'w'}, {"erase", 0, NULL, 'E'}, {"verify", 1, NULL, 'v'}, + {"mode", 1, NULL, 'm'}, {"noverify", 0, NULL, 'n'}, {"noverify-all", 0, NULL, 'N'}, {"chip", 1, NULL, 'c'}, @@ -200,6 +204,25 @@ filename = strdup(optarg); verify_it = 1; break; + case 'm': + if (++operation_specified > 1) { + fprintf(stderr, "More than one operation specified. Aborting.\n"); + cli_classic_abort_usage(); + } + /* check that `optarg` is a prefix of a known operation */ + if (strncmp(optarg, "read", strlen(optarg)) == 0) { + read_it = 1; + } else if (strncmp(optarg, "write", strlen(optarg)) == 0) { + write_it = 1; + } else if (strncmp(optarg, "verify", strlen(optarg)) == 0) { + verify_it = 1; + } else if (strncmp(optarg, "erase", strlen(optarg)) == 0) { + erase_it = 1; + } else { + fprintf(stderr, "Unknown operation specified: '%s'\n", optarg); + cli_classic_abort_usage(); + } + break; case 'n': if (verify_it) { fprintf(stderr, "--verify and --noverify are mutually exclusive. Aborting.\n"); @@ -404,7 +427,7 @@ cli_classic_abort_usage(); } - if ((read_it | write_it | verify_it) && check_filename(filename, "image")) { + if (filename && check_filename(filename, "image")) { cli_classic_abort_usage(); } if (layoutfile && check_filename(layoutfile, "layout")) { @@ -654,6 +677,23 @@ flashrom_flag_set(fill_flash, FLASHROM_FLAG_VERIFY_AFTER_WRITE, !dont_verify_it); flashrom_flag_set(fill_flash, FLASHROM_FLAG_VERIFY_WHOLE_CHIP, !dont_verify_all); + if (!filename && (read_it | write_it | verify_it)) { + if (layout->num_entries == 0) { + msg_gerr("Error: The specified operation requires a file.\n"); + ret = 1; + goto out_shutdown; + } + for (i = 0; i < layout->num_entries; i++) { + if (!layout->entries[i].file) { + msg_gerr("Error: Region \"%s\" requires a file argument.\n", + layout->entries[i].name); + ret = 1; + } + if (ret) + goto out_shutdown; + } + } + /* FIXME: We should issue an unconditional chip reset here. This can be * done once we have a .reset function in struct flashchip. * Give the chip time to settle. -- To view, visit https://review.coreboot.org/c/flashrom/+/30979 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idfba11ec9991aac423b07f68f7dc45e7bebbb06b Gerrit-Change-Number: 30979 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

6 19

Change in ...flashrom[master]: [WIP]spi25.c: Implement fast read
by Arthur Heymans (Code Review) Aug. 29, 2026

Aug. 29, 2026

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33034 Change subject: [WIP]spi25.c: Implement fast read ...................................................................... [WIP]spi25.c: Implement fast read Use the fast read OP by default and fall back to regular read if that failed. Change-Id: I96393e1beea0164daa8e366a1d09a573f2c6d16f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M ichspi.c M spi.h M spi25.c 3 files changed, 23 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/33034/1 diff --git a/ichspi.c b/ichspi.c index 0f1470d..54cb1f9 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1117,14 +1117,14 @@ opcode = &(curopcodes->opcode[opcode_index]); /* The following valid writecnt/readcnt combinations exist: - * writecnt = 4, readcnt >= 0 + * writecnt = 4 or 5, readcnt >= 0 (The dummy bit on fast reads gets discarded) * writecnt = 1, readcnt >= 0 * writecnt >= 4, readcnt = 0 * writecnt >= 1, readcnt = 0 * writecnt >= 1 is guaranteed for all commands. */ if ((opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS) && - (writecnt != 4)) { + ((writecnt != 4) && (writecnt != 5))) { msg_perr("%s: Internal command size error for opcode " "0x%02x, got writecnt=%i, want =4\n", __func__, cmd, writecnt); diff --git a/spi.h b/spi.h index 0073c71..65dc033 100644 --- a/spi.h +++ b/spi.h @@ -149,6 +149,7 @@ /* Read the memory */ #define JEDEC_READ 0x03 #define JEDEC_READ_OUTSIZE 0x04 +#define JEDEC_FAST_READ 0x0b /* JEDEC_READ_INSIZE : any length */ /* Read the memory (with delay after sending address) */ @@ -168,6 +169,7 @@ /* Read the memory with 4-byte address From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ #define JEDEC_READ_4BA 0x13 +#define JEDEC_FAST_READ_4BA 0x0c /* Read the memory with 4-byte address (and delay after sending address) From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ diff --git a/spi25.c b/spi25.c index 8b6c462..36d2436 100644 --- a/spi25.c +++ b/spi25.c @@ -645,12 +645,30 @@ unsigned int len) { const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_READ && spi_master_4ba(flash); - uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { native_4ba ? JEDEC_READ_4BA : JEDEC_READ, }; + bool fast_read = true; + uint8_t cmd[2 + JEDEC_MAX_ADDR_LEN]; + + if (native_4ba) + fast_read = flash->chip->feature_bits & FEATURE_4BA_FAST_READ; + + if (fast_read) + cmd[0] = native_4ba ? JEDEC_FAST_READ_4BA : JEDEC_FAST_READ; + else + cmd[0] = native_4ba ? JEDEC_READ_4BA : JEDEC_READ; const int addr_len = spi_prepare_address(flash, cmd, native_4ba, address); if (addr_len < 0) return 1; + if (fast_read) { + cmd[addr_len + 1] = 0; + int ret = spi_send_command(flash, 2 + addr_len, len, cmd, bytes); + if (!ret) + return ret; + msg_cinfo("%s: Fast Read did not succeed, falling back to regular read", __func__); + cmd[0] = native_4ba ? JEDEC_READ_4BA : JEDEC_READ; + } + /* Send Read */ return spi_send_command(flash, 1 + addr_len, len, cmd, bytes); } -- To view, visit https://review.coreboot.org/c/flashrom/+/33034 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I96393e1beea0164daa8e366a1d09a573f2c6d16f Gerrit-Change-Number: 33034 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in flashrom[master]: util/ich_descriptor_tool: use clang's style suggestion
by Idwer Vollering (Code Review) Aug. 29, 2026

Aug. 29, 2026

Idwer Vollering has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34945 ) Change subject: util/ich_descriptor_tool: use clang's style suggestion ...................................................................... util/ich_descriptor_tool: use clang's style suggestion Tested on: FreeBSD clang version 8.0.1 (tags/RELEASE_801/final 366581) (based on LLVM 8.0.1) Target: x86_64-unknown-freebsd13.0 Change-Id: Ie80c4c4d70c8ccf357ba8e65f454fc4d4fa8c058 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- M util/ich_descriptors_tool/ich_descriptors_tool.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/45/34945/1 diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index 2db0f62..9fcb2ba 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -152,7 +152,7 @@ const char *fn = NULL; const char *csn = NULL; enum ich_chipset cs = CHIPSET_ICH_UNKNOWN; - struct ich_descriptors desc = { 0 }; + struct ich_descriptors desc = { { 0 } }; while ((opt = getopt(argc, argv, "df:c:")) != -1) { switch (opt) { -- To view, visit https://review.coreboot.org/c/flashrom/+/34945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie80c4c4d70c8ccf357ba8e65f454fc4d4fa8c058 Gerrit-Change-Number: 34945 Gerrit-PatchSet: 1 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: cli_classic: Report the gathered layout entries at level dbg
by Nico Huber (Code Review) Aug. 29, 2026

Aug. 29, 2026

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31012 Change subject: cli_classic: Report the gathered layout entries at level dbg ...................................................................... cli_classic: Report the gathered layout entries at level dbg Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M cli_classic.c M layout.c M layout.h 3 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/12/31012/1 diff --git a/cli_classic.c b/cli_classic.c index ced08c6..536ef24 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -645,6 +645,8 @@ goto out_shutdown; } + report_layout(layout); + flashrom_layout_set(fill_flash, layout); flashrom_flag_set(fill_flash, FLASHROM_FLAG_FORCE, !!force); #if CONFIG_INTERNAL == 1 diff --git a/layout.c b/layout.c index fa66238..c589d17 100644 --- a/layout.c +++ b/layout.c @@ -229,3 +229,17 @@ return ret; } + +void report_layout(const struct flashrom_layout *const l) +{ + unsigned int i; + + if (!l) + return; + + msg_gdbg("Gathered %zu layout entries:\n", l->num_entries); + for (i = 0; i < l->num_entries; ++i) { + msg_gdbg("%08"PRIx32":%08"PRIx32" %s\n", + l->entries[i].start, l->entries[i].end, l->entries[i].name); + } +} diff --git a/layout.h b/layout.h index eb54a4f..61311bc 100644 --- a/layout.h +++ b/layout.h @@ -59,4 +59,6 @@ int process_include_args(struct flashrom_layout *); +void report_layout(const struct flashrom_layout *); + #endif /* !__LAYOUT_H__ */ -- To view, visit https://review.coreboot.org/c/flashrom/+/31012 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7678ba5138f0d722ee44747fe123f192abdd0ffd Gerrit-Change-Number: 31012 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: Add support for security register and SBULK command on Macronix chips
by vl_sk (Code Review) Jan. 13, 2026

Jan. 13, 2026

vl_sk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/32034 Change subject: Add support for security register and SBULK command on Macronix chips ...................................................................... Add support for security register and SBULK command on Macronix chips Signed-off-by: Vladimir Skokov <vl_sk(a)mail.ru> Change-Id: I6b3d7bd2625dec5fda7b85f421d40c49bbc528a6 --- M chipdrivers.h M flashchips.c M spi.h M spi25_statusreg.c 4 files changed, 78 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/32034/1 diff --git a/chipdrivers.h b/chipdrivers.h index 134ed26..54288cd 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -102,7 +102,9 @@ int spi_prettyprint_status_register_sst25(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash); int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash); +int spi_prettyprint_security_register_mx25(struct flashctx *flash); int spi_disable_blockprotect_sst26_global_unprotect(struct flashctx *flash); +int spi_disable_blockprotect_mx25_global_unprotect(struct flashctx *flash); /* sfdp.c */ int probe_spi_sfdp(struct flashctx *flash); diff --git a/flashchips.c b/flashchips.c index d85ea74..2c662e9 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8555,9 +8555,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register and SBLK/SBULK; MX25L12835F: configuration register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, @@ -8604,9 +8603,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register and SBLK/SBULK; MX25L12835F: configuration register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ .voltage = {2700, 3600}, @@ -8693,9 +8691,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1650, 2000}, @@ -8734,9 +8731,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1650, 2000}, @@ -8776,9 +8772,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1650, 2000}, @@ -8818,9 +8813,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1650, 2000}, @@ -8858,9 +8852,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1650, 2000}, @@ -8907,9 +8900,8 @@ .block_erase = spi_block_erase_c7, } }, - /* TODO: security register */ - .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ - .unlock = spi_disable_blockprotect_bp3_srwd, + .printlock = spi_prettyprint_security_register_mx25, + .unlock = spi_disable_blockprotect_mx25_global_unprotect, .write = spi_chip_write_256, /* Multi I/O supported */ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1650, 2000}, diff --git a/spi.h b/spi.h index 422e6a0..456d894 100644 --- a/spi.h +++ b/spi.h @@ -170,6 +170,15 @@ From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ #define JEDEC_BYTE_PROGRAM_4BA 0x12 +/* Read Security Register */ +#define JEDEC_RDSCUR 0x2B +#define JEDEC_RDSCUR_OUTSIZE 0x01 +#define JEDEC_RDSCUR_INSIZE 0x01 + +/* Do GBULK (gang block unlock) */ +#define JEDEC_GBULK 0x98 +#define JEDEC_GBULK_OUTSIZE 0x01 + /* Error codes */ #define SPI_GENERIC_ERROR -1 #define SPI_INVALID_OPCODE -2 diff --git a/spi25_statusreg.c b/spi25_statusreg.c index 4cf7023..4cdf800 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -237,6 +237,28 @@ return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF); } +int spi_disable_blockprotect_mx25_global_unprotect(struct flashctx *flash) +{ + static const unsigned char cmd[JEDEC_GBULK_OUTSIZE] = { JEDEC_GBULK }; + int ret; + + ret = spi_write_enable(flash); + if (ret) { + msg_cerr("Set WREN failed!\n"); + return -1; + } + + /* Send GBULK cmd to device. */ + ret = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); + if (ret) { + msg_cerr("GBULK failed!\n"); + return -1; + } + + /* Disable standard blockprotect */ + return spi_disable_blockprotect_bp3_srwd(flash); +} + static void spi_prettyprint_status_register_hex(uint8_t status) { msg_cdbg("Chip status register is 0x%02x.\n", status); @@ -751,3 +773,32 @@ msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]); return 0; } + +/* === Macronix chips with Security Register === */ + +int spi_read_security_register(struct flashctx *flash) +{ + static const unsigned char cmd[JEDEC_RDSCUR_OUTSIZE] = { JEDEC_RDSCUR }; + unsigned char readarr[JEDEC_RDSCUR_INSIZE]; + int ret; + + ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr); + if (ret) { + msg_cerr("RDSCUR failed!\n"); + return 0; + } + + return readarr[0]; +} + +int spi_prettyprint_security_register_mx25(struct flashctx *flash) +{ + int security_register = spi_read_security_register(flash); + int wpsel = !!(security_register & (1 << 7)); + + msg_cdbg("Chip security register: 0x%02X\n", security_register); + msg_cdbg("\tWPSEL is %s\n", wpsel ? "ON" : "OFF"); + + /* Print standard blockprotect info */ + return spi_prettyprint_status_register_bp3_srwd(flash); +} \ No newline at end of file -- To view, visit https://review.coreboot.org/c/flashrom/+/32034 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6b3d7bd2625dec5fda7b85f421d40c49bbc528a6 Gerrit-Change-Number: 32034 Gerrit-PatchSet: 1 Gerrit-Owner: vl_sk Gerrit-MessageType: newchange

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Change in ...flashrom[master]: hwaccess: Add endianness converting deserialization functions
by Nico Huber (Code Review) April 13, 2022

April 13, 2022

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31016 Change subject: hwaccess: Add endianness converting deserialization functions ...................................................................... hwaccess: Add endianness converting deserialization functions Add functions like uint32_t read_le32(const void *); Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M hwaccess.h 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/16/31016/1 diff --git a/hwaccess.h b/hwaccess.h index af7054b..5df4fc3 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -20,6 +20,7 @@ #ifndef __HWACCESS_H__ #define __HWACCESS_H__ 1 +#include <stdint.h> #include "platform.h" #if NEED_PCI == 1 @@ -109,6 +110,19 @@ #define le_to_cpu32 cpu_to_le32 #define le_to_cpu64 cpu_to_le64 +#define read_from(endianness, bits) \ +static inline uint##bits##_t read_##endianness##bits(const void *from) \ +{ \ + return le_to_cpu##bits(*(uint##bits##_t *)from); \ +} + +read_from(be, 8) +read_from(be, 16) +read_from(be, 32) +read_from(le, 8) +read_from(le, 16) +read_from(le, 32) + #if NEED_RAW_ACCESS == 1 #if IS_X86 -- To view, visit https://review.coreboot.org/c/flashrom/+/31016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452 Gerrit-Change-Number: 31016 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: usbdev: fix accepting shorter serial numbers than the real one.
by Miklós Márton (Code Review) March 16, 2022

March 16, 2022

Miklós Márton has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34641 ) Change subject: usbdev: fix accepting shorter serial numbers than the real one. ...................................................................... usbdev: fix accepting shorter serial numbers than the real one. Change-Id: Ife8c4e0a957c4345e27ec9ae9e1480ca80fe505c --- M usbdev.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/41/34641/1 diff --git a/usbdev.c b/usbdev.c index 764ac04..7e41235 100644 --- a/usbdev.c +++ b/usbdev.c @@ -104,7 +104,8 @@ msg_pdbg("Serial number is %s\n", myserial); /* Filter out any serial number that does not commence with serialno */ - return 0 != strncmp(serialno, (char *)myserial, strlen(serialno)); + return strlen((char *)myserial) == strlen(serialno) + && 0 != strncmp(serialno, (char *)myserial, strlen(serialno)); } struct libusb_device_handle *usb_dev_get_by_vid_pid_serial( -- To view, visit https://review.coreboot.org/c/flashrom/+/34641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ife8c4e0a957c4345e27ec9ae9e1480ca80fe505c Gerrit-Change-Number: 34641 Gerrit-PatchSet: 1 Gerrit-Owner: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-MessageType: newchange

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