July 2019 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: layout: Add `max_entries` field
by Angel Pons (Code Review) July 24, 2019

July 24, 2019

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/33516 ) Change subject: layout: Add `max_entries` field ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/33516 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib5f431bc0a72a79a53fa1376c3417942b19dd3a0 Gerrit-Change-Number: 33516 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 24 Jul 2019 16:53:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: flashchips: Add support for N25Q512..1E
by Jacob Creedon (Code Review) July 22, 2019

July 22, 2019

Jacob Creedon has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34413 ) Change subject: flashchips: Add support for N25Q512..1E ...................................................................... flashchips: Add support for N25Q512..1E This adds support for the 1.8v variant of N25Q512. Signed-off-by: Jacob Creedon <jcreedon(a)google.com> Change-Id: I9e8d2c1fc0c09efea7812fa513b45d1a372d06d7 --- M flashchips.c 1 file changed, 40 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/13/34413/1 diff --git a/flashchips.c b/flashchips.c index 166af6a..cc22414 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10585,6 +10585,46 @@ { .vendor = "Micron", + .name = "N25Q512..1E/MT25QU512", /* ..1E/U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__1E, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", .name = "N25Q512..3E/MT25QL512", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, -- To view, visit https://review.coreboot.org/c/flashrom/+/34413 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9e8d2c1fc0c09efea7812fa513b45d1a372d06d7 Gerrit-Change-Number: 34413 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Creedon <jcreedon(a)google.com> Gerrit-MessageType: newchange

2 11

Change in flashrom[master]: cli_classic: Fix Memory leak
by HAOUAS Elyes (Code Review) July 19, 2019

July 19, 2019

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34405 ) Change subject: cli_classic: Fix Memory leak ...................................................................... cli_classic: Fix Memory leak Found-by scan-build: 7.0.1-8 Change-Id: I84e642b57b95953f376569e443ef8d8eda7bf98f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M cli_classic.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/34405/1 diff --git a/cli_classic.c b/cli_classic.c index b79f953..19d65cc 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -383,6 +383,11 @@ fprintf(stderr, "Log file not supported in standalone mode. Aborting.\n"); cli_classic_abort_usage(); #else /* STANDALONE */ + if (logfile[0] != '\0') { + fprintf(stderr, "Warning: log file not free of older string. Running free() rightnow.\n"); + free(logfile); + } + logfile = strdup(optarg); if (logfile[0] == '\0') { fprintf(stderr, "No log filename specified.\n"); -- To view, visit https://review.coreboot.org/c/flashrom/+/34405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I84e642b57b95953f376569e443ef8d8eda7bf98f Gerrit-Change-Number: 34405 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 5

Change in flashrom[master]: spi25: Remove dead increment
by HAOUAS Elyes (Code Review) July 19, 2019

July 19, 2019

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34404 ) Change subject: spi25: Remove dead increment ...................................................................... spi25: Remove dead increment Value stored in 'pos' is never read. Found-by scan-build: 7.0.1-8 Change-Id: I9a70593f182d7558e71e831fc2b834ac58a25b2a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M spi25.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/04/34404/1 diff --git a/spi25.c b/spi25.c index 36f265a..2a1d492 100644 --- a/spi25.c +++ b/spi25.c @@ -782,7 +782,6 @@ if (pos < start + len) { if (spi_chip_write_1(flash, buf + pos - start, pos, pos % 2)) return SPI_GENERIC_ERROR; - pos += pos % 2; } return 0; -- To view, visit https://review.coreboot.org/c/flashrom/+/34404 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9a70593f182d7558e71e831fc2b834ac58a25b2a Gerrit-Change-Number: 34404 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 4

Change in flashrom[master]: pickit2_spi: Remove dead assignment
by HAOUAS Elyes (Code Review) July 19, 2019

July 19, 2019

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34403 ) Change subject: pickit2_spi: Remove dead assignment ...................................................................... pickit2_spi: Remove dead assignment We never read the first 'ret', so remove it. Also, print the version only when the command succeeded. Change-Id: I4aac5e1f3bd0604b079e1fdd9b7f09f1f4fc2d7f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M pickit2_spi.c 1 file changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/03/34403/1 diff --git a/pickit2_spi.c b/pickit2_spi.c index 6d9b28f..4e9ca1d 100644 --- a/pickit2_spi.c +++ b/pickit2_spi.c @@ -93,17 +93,16 @@ { int ret; uint8_t command[CMD_LENGTH] = {CMD_GET_VERSION, CMD_END_OF_BUFFER}; - int transferred; - ret = libusb_interrupt_transfer(pickit2_handle, ENDPOINT_OUT, command, CMD_LENGTH, &transferred, DFLT_TIMEOUT); + ret = libusb_interrupt_transfer(pickit2_handle, ENDPOINT_IN, command, CMD_LENGTH, &transferred, DFLT_TIMEOUT); - msg_pdbg("PICkit2 Firmware Version: %d.%d\n", (int)command[0], (int)command[1]); if (ret != 0) { msg_perr("Command Get Firmware Version failed!\n"); return 1; } + msg_pdbg("PICkit2 Firmware Version: %d.%d\n", (int)command[0], (int)command[1]); return 0; } -- To view, visit https://review.coreboot.org/c/flashrom/+/34403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4aac5e1f3bd0604b079e1fdd9b7f09f1f4fc2d7f Gerrit-Change-Number: 34403 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

2 9

Change in flashrom[master]: add support to SPI flash MX25L51245G
by Name of user not set (Code Review) July 17, 2019

July 17, 2019

Name of user not set #1002484 has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34234 ) Change subject: add support to SPI flash MX25L51245G ...................................................................... add support to SPI flash MX25L51245G Change-Id: I964e630197e33d69b199fdfb8816f18e3112bbb1 Signed-off-by: Hemanth Guruva Reddy <meethemanth(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 40 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/34234/1 diff --git a/flashchips.c b/flashchips.c index 7f31c30..9aff06f 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7778,6 +7778,45 @@ { .vendor = "Macronix", + .name = "MX25L51245G", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L51245G, + .total_size = 65536, + .page_size = 256, + /* MX25L51245G supports SFDP */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, + .printlock = spi_prettyprint_status_register_bp3_srwd, + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported, MX25L51245G supports dual I/O */ + .voltage = {2700, 3600}, /* 2.35-3.6V for MX25L51245G */ + }, + + { + .vendor = "Macronix", .name = "MX25L1005(C)/MX25L1006E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, diff --git a/flashchips.h b/flashchips.h index 1c7ba99..cbc22ed 100644 --- a/flashchips.h +++ b/flashchips.h @@ -479,6 +479,7 @@ * Generalplus SPI chips seem to be compatible with Macronix * and use the same set of IDs. */ #define MACRONIX_MX25L512 0x2010 /* Same as MX25L512E, MX25V512, MX25V512C */ +#define MACRONIX_MX25L51245G 0x201A #define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */ #define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C, MX25L2006E */ #define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C, MX25L4006E */ -- To view, visit https://review.coreboot.org/c/flashrom/+/34234 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I964e630197e33d69b199fdfb8816f18e3112bbb1 Gerrit-Change-Number: 34234 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1002484 Gerrit-MessageType: newchange

5 16

Change in ...flashrom[master]: flashchips.h: merge definitions from Chromium fork
by Alan Green (Code Review) July 15, 2019

July 15, 2019

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/33997 Change subject: flashchips.h: merge definitions from Chromium fork ...................................................................... flashchips.h: merge definitions from Chromium fork This change merges flashchips.h definitions from the chromium fork of flashrom. It is a precursor to merging flashchips.c. The corresponding downstream change, where coreboot's flashchips.h was merged into Chromium's version is: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/… After this change and the Chromium change are submitted, the two versions of flashchips.h will be identical. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: Ie280f351045bdcbc454d6f829fc071af820382b1 --- M flashchips.c M flashchips.h 2 files changed, 38 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/97/33997/1 diff --git a/flashchips.c b/flashchips.c index 2a9ebb7..1b4b3ce 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5889,7 +5889,7 @@ .name = "GD25LQ128", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, - .model_id = GIGADEVICE_GD25LQ128, + .model_id = GIGADEVICE_GD25LQ128CD, .total_size = 16384, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ diff --git a/flashchips.h b/flashchips.h index a1b38e0..0d816c8 100644 --- a/flashchips.h +++ b/flashchips.h @@ -36,6 +36,9 @@ #define PROGMANUF_ID 0xFFFE /* dummy ID for opaque chips behind a programmer */ #define PROGDEV_ID 0x01 /* dummy ID for opaque chips behind a programmer */ +#define VARIABLE_SIZE_MANUF_ID 0x3eaf +#define VARIABLE_SIZE_DEVICE_ID 0x10af + #define ALLIANCE_ID 0x52 /* Alliance Semiconductor */ #define ALLIANCE_AS29F002B 0x34 #define ALLIANCE_AS29F002T 0xB0 @@ -151,6 +154,7 @@ #define ATMEL_AT25SF081 0x8501 #define ATMEL_AT25SF161 0x8601 #define ATMEL_AT25SL128A 0x4218 +#define ATMEL_AT25SF128A 0x8901 /* Adesto AT25SF128A */ #define ATMEL_AT26DF041 0x4400 #define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */ #define ATMEL_AT26DF081A 0x4501 @@ -196,7 +200,9 @@ #define ATMEL_AT49BV512 0x03 /* Same as AT49F512 */ #define ATMEL_AT49F001N 0x05 /* Same as AT49F001 */ #define ATMEL_AT49F001NT 0x04 /* Same as AT49F001T */ +#define ATMEL_AT49F020 0x0B #define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */ +#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */ #define ATMEL_AT49LH002 0xE9 #define ATMEL_AT49LH00B4 0xED #define ATMEL_AT49LH004 0xEE @@ -270,6 +276,13 @@ #define EON_EN25P64 0x16 #define EON_EN25B64T 0x46 #define EON_EN25B64B 0x36 +#define EON_EN25D16 0x3015 +#define EON_EN25Q40 0x3013 +#define EON_EN25Q80 0x3014 +#define EON_EN25D16 0x3015 /* Same as Q16 */ +#define EON_EN25Q32 0x3016 +#define EON_EN25Q64 0x3017 +#define EON_EN25Q128 0x3018 #define EON_EN25F05 0x3110 #define EON_EN25F10 0x3111 #define EON_EN25F20 0x3112 @@ -302,6 +315,7 @@ #define EON_EN29F010 0x20 #define EON_EN29F040A 0x7F04 #define EON_EN29LV010 0x7F6E +#define EON_EN29LV040A 0x7F4F /* EN29LV040(A) */ #define EON_EN29LV040 0x4F /* Same as EN29LV040A */ #define EON_EN29LV640B 0xCB #define EON_EN29LV640T 0xC9 @@ -373,6 +387,7 @@ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ +#define GIGADEVICE_GD25Q256D 0x4019 #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 @@ -382,7 +397,7 @@ #define GIGADEVICE_GD25LQ16 0x6015 #define GIGADEVICE_GD25LQ32 0x6016 #define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */ -#define GIGADEVICE_GD25LQ128 0x6018 +#define GIGADEVICE_GD25LQ128CD 0x6018 #define GIGADEVICE_GD29GL064CAB 0x7E0601 #define HYUNDAI_ID 0xAD /* Hyundai */ @@ -452,6 +467,8 @@ #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ +#define INTEL_HWSEQ 0xFFFE /* dummy ID for hardware sequencing */ + #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, see also PMC. */ #define ISSI_ID_SPI 0x9D /* ISSI ID used for SPI flash, see also PMC_ID_NOPREFIX */ #define ISSI_IS25LP064 0x6017 @@ -487,6 +504,7 @@ #define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E/MX25L1608E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */ #define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E/MX25L3208E (4k 0x20, 64k 0x52); MX25L3273E (4k 0x20, 32k 0x52) */ #define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6408E (4k 0x20); MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E (4k 0x20, 32k 0x52) */ +#define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */ #define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E (32k 0x52) */ #define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */ #define MACRONIX_MX25L1635D 0x2415 @@ -644,8 +662,17 @@ #define SPANSION_S25FL204 0x4013 #define SPANSION_S25FL208 0x4014 #define SPANSION_S25FL216 0x4015 /* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */ +#define SPANSION_S25FL116K 0x4015 #define SPANSION_S25FL132K 0x4016 #define SPANSION_S25FL164K 0x4017 +#define SPANSION_S25FS128S_L 0x20180081 /* Large sectors. */ +#define SPANSION_S25FS128S_S 0x20180181 /* Small sectors. */ +#define SPANSION_S25FS256S_L 0x02190081 /* Large sectors. */ +#define SPANSION_S25FS256S_S 0x02190181 /* Small sectors. */ +#define SPANSION_S25FL128S_UL 0x20180080 /* Uniform Large (128kB) sectors */ +#define SPANSION_S25FL128S_US 0x20180180 /* Uniform Small (64kB) sectors */ +#define SPANSION_S25FL256S_UL 0x02190080 /* Uniform Large (128kB) sectors */ +#define SPANSION_S25FL256S_US 0x02190180 /* Uniform Small (64kB) sectors */ /* Spansion 29GL families got a suffix indicating the process technology but share the same 3-Byte IDs. They can * however be differentiated by CFI byte 45h. Some versions exist which have special top or bottom boot sectors @@ -920,7 +947,12 @@ #define WINBOND_NEX_W25Q16_V 0x4015 /* W25Q16CV; W25Q16DV */ #define WINBOND_NEX_W25Q32_V 0x4016 /* W25Q32BV; W25Q32FV in SPI mode (default) */ #define WINBOND_NEX_W25Q64_V 0x4017 /* W25Q64BV, W25Q64CV; W25Q64FV in SPI mode (default) */ -#define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV; W25Q128FV in SPI mode (default) */ + +/* + * W25Q128 has several variants. Currently all are 3.3V except for the W25Q128FW + * which is 1.8V. Otherwise they should behave the same... + */ +#define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV, W25Q128FV (SPI mode), W25Q128JV */ #define WINBOND_NEX_W25Q256_V 0x4019 /* W25Q256FV or W25Q256JV_Q (QE=1) */ #define WINBOND_NEX_W25Q20_W 0x5012 /* W25Q20BW */ #define WINBOND_NEX_W25Q40BW 0x5013 /* W25Q40BW */ @@ -930,9 +962,11 @@ #define WINBOND_NEX_W25Q16_W 0x6015 /* W25Q16DW */ #define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */ #define WINBOND_NEX_W25Q64_W 0x6017 /* W25Q64DW; W25Q64FV in QPI mode */ -#define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */ +#define WINBOND_NEX_W25Q128_W 0x6018 /* Same as W25Q128FV (QPI mode), W25R128FV */ +#define WINBOND_NEX_W25Q128FW 0x6018 /* Same as W25Q128FV (QPI mode), W25R128FV */ #define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */ #define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */ +#define WINBOND_NEX_W25Q32JW 0x8016 #define WINBOND_ID 0xDA /* Winbond */ #define WINBOND_W19B160BB 0x49 -- To view, visit https://review.coreboot.org/c/flashrom/+/33997 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie280f351045bdcbc454d6f829fc071af820382b1 Gerrit-Change-Number: 33997 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

4 12

Change in flashrom[master]: board_enable: Drop now unnecessary whitelisting for laptops with SPI
by Nico Huber (Code Review) July 11, 2019

July 11, 2019

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/28717 ) Change subject: board_enable: Drop now unnecessary whitelisting for laptops with SPI ...................................................................... Patch Set 1: > Any updates? I realized later that we should move them to `print.c` instead, wanna take over? -- To view, visit https://review.coreboot.org/c/flashrom/+/28717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1a25ad0de4840dc252fd39fec8613a3a724edce4 Gerrit-Change-Number: 28717 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 11 Jul 2019 21:32:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in flashrom[master]: Add support for National Instruments USB-845x devices
by Miklós Márton (Code Review) July 10, 2019

July 10, 2019

Miklós Márton has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/25683 ) Change subject: Add support for National Instruments USB-845x devices ...................................................................... Patch Set 19: (18 comments) > Patch Set 17: > > (19 comments) > > First time I looked through all the code. I know it's > already been lying around for more than a year, sorry > for that. > > It looks nearly ready, although I added some serious > comments. Also, there is still a lot of CamelCase. And > generally, we try to follow the coding style of the > Linux kernel. There is a nice tool to help with that > (checkpatch.pl [1]). That is, if you have perl installed. > I don't use it myself, but let me try... > > ./checkpath.pl --no-tree --max-line-length=112 --file ni845x_spi.c > > The first warning is spurious, but the errors should be > checked. And the other warnings might give some nice > hints. > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/plain/sc… Thanks for the review Nico, no worries for the timing, it is better later than never ;). Also thanks for the checkpatch hint, it revealed a lot of things! https://review.coreboot.org/c/flashrom/+/25683/17/flashrom.8.tmpl File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/25683/17/flashrom.8.tmpl@1144 PS17, Line 1144: 1230A2 > Nit, example has only 6 digits. Nice catch! Actually NI used 6 hexa digits for the products manufactured in the US and 7 digits for the products from Hungary and Malaysia. However if I remember correctly all USB-845x products were manufactured outside the US. https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c File ni845x_spi.c: https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@43 PS17, Line 43: static char error_string_buffer[1024]; > Writing a function around this would probably save a lot lines below […] Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@107 PS17, Line 107: * @brief ni845x_spi_open > Nit, adds no information. Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@109 PS17, Line 109: competition > completion? Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@134 PS17, Line 134: "USB%d::0x%04X::0x%04X::%08X::RAW", > %d expects an `int`, %X an `unsigned int`. If the pointers you pass […] Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@207 PS17, Line 207: IO_voltage_100mV = ((float)IOVoltage_mV / 100.0f); > Doing the calculation as `float` shouldn't make a difference. Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@219 PS17, Line 219: msg_pwarn > Shouldn't be a warning, msg_pinfo() maybe? Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@226 PS17, Line 226: if (selected_voltage_100mV == 0) { > This looks odd. I would have expect it to select 1.2V automatically here. […] Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@266 PS17, Line 266: Set > Get Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@301 PS17, Line 301: &usb_bus, &vid, &pid, &serial_as_number); > Check return code? Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@317 PS17, Line 317: ni845xFindDeviceNext(device_find_handle, resource_handle); > Check return code? Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@342 PS17, Line 342: CS_number = atoi(CS_str); > atoi() isn't a good choice, it would return a valid `0` on any error. […] Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@345 PS17, Line 345: return 1; > leaking `CS_str` Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@382 PS17, Line 382: if (serial_number) > Not needed, as `free(NULL);` is valid. Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@391 PS17, Line 391: atoi > atoi(), see above. Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@399 PS17, Line 399: > None of the error paths (early `return`s) after opening the device […] Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@441 PS17, Line 441: msg_cinfo("FAILED.\n"); > Why the second message? Done https://review.coreboot.org/c/flashrom/+/25683/17/ni845x_spi.c@449 PS17, Line 449: (uInt32) > the cast seems unnecessary Done -- To view, visit https://review.coreboot.org/c/flashrom/+/25683 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549 Gerrit-Change-Number: 25683 Gerrit-PatchSet: 19 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Márton Miklós <martonmiklosqdev(a)gmail.com> Gerrit-CC: Stefan T <stefan.tauner(a)gmx.at> Gerrit-Comment-Date: Wed, 10 Jul 2019 21:03:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in flashrom[master]: Add support for National Instruments USB-845x devices
by Miklós Márton (Code Review) July 10, 2019

July 10, 2019

Miklós Márton has uploaded a new patch set (#19) to the change originally created by David Hendricks. ( https://review.coreboot.org/c/flashrom/+/25683 ) Change subject: Add support for National Instruments USB-845x devices ...................................................................... Add support for National Instruments USB-845x devices Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549 Signed-off-by: Miklós Márton <martonmiklosqdev(a)gmail.com> --- M Makefile M flashrom.8.tmpl M flashrom.c A ni845x_spi.c M programmer.h 5 files changed, 649 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/83/25683/19 -- To view, visit https://review.coreboot.org/c/flashrom/+/25683 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549 Gerrit-Change-Number: 25683 Gerrit-PatchSet: 19 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Márton Miklós <martonmiklosqdev(a)gmail.com> Gerrit-CC: Stefan T <stefan.tauner(a)gmx.at> Gerrit-MessageType: newpatchset

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