Re: IDE on s2885 and LinuxBIOS -- FILO
Ron, I have checked pci.c in fifo. It need to be changes as follow. It seems otherwise it can not scan the peer root bus. Maybe someone need to make it can handle peer root bus refer to the code in Linux kernel or Etherboot. Regards YH. void pci_init(void) { /* Count devices */ dev_list = 0; debug("Scanning PCI: "); pci_scan_bus(0); pci_scan_bus(1); // For Tyan s2880,s2881,s2882,s2885,s4880 // pci_scan_bus(3); //For Tyan s2885 debug("found %d devices\n", n_devs); /* Make the list */ dev_list = malloc(n_devs * sizeof(struct pci_dev)); n_devs = 0; pci_scan_bus(0); pci_scan_bus(1); // For Tyan s2880,s2881,s2882,s2885,s4880 // pci_scan_bus(3); //For Tyan s2885 #if DEBUG { int i; for (i = 0; i < n_devs; i++) { debug("%02x:%02x.%x %04x:%04x %04x %02x\n", PCI_BUS(dev_list[i].addr), PCI_DEV(dev_list[i].addr), PCI_FN(dev_list[i].addr), dev_list[i].vendor, dev_list[i].device, dev_list[i].devclass, dev_list[i].prog_if); } } #endif } -----邮件原件----- 发件人: YhLu 发送时间: 2003年12月10日 9:27 收件人: 'ron minnich' 抄送: Hendricks David W. 主题: Re: IDE on s2885 and LinuxBIOS Is it working with On current tree or using old source tree to make sure all 8111/8131 on bus 0? Yinghai Lu -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2003年12月10日 7:25 收件人: YhLu 抄送: Hendricks David W. 主题: Re: IDE on s2885 and LinuxBIOS I wonder what differes from HDAMA to s2885? filo works fine on HDAMA ron
* YhLu <YhLu@tyan.com> [031210 22:02]:
I have checked pci.c in fifo. It need to be changes as follow.
It seems otherwise it can not scan the peer root bus.
How is this done on the HDAMA and other boards?
Maybe someone need to make it can handle peer root bus refer to the code in Linux kernel or Etherboot.
Can we have an array of peer busses in the config file? ie. register SCAN_BUSSES={ 0, 1, 3 } Or is there any real way to _detect_ peer busses? Or at least conclude their existance by the available southbridges - There is obviously no peer bus without a (transparent) bridge Stefan -- Stefan Reinauer, SUSE LINUX AG Teamleader Architecture Development
Stefan Reinauer <stepan@suse.de> writes:
* YhLu <YhLu@tyan.com> [031210 22:02]:
I have checked pci.c in fifo. It need to be changes as follow.
It seems otherwise it can not scan the peer root bus.
How is this done on the HDAMA and other boards?
Currently I have not been testing the Filo on the HDAMA. Last time this was brought up I someone was going to modify FILO to scan through all possible busses like etherboot does.
Maybe someone need to make it can handle peer root bus refer to the code in Linux kernel or Etherboot.
Can we have an array of peer busses in the config file? ie. register SCAN_BUSSES={ 0, 1, 3 }
In LinuxBIOS we are fine. It is just in FILO where there is an issue.
Or is there any real way to _detect_ peer busses? Or at least conclude their existance by the available southbridges - There is obviously no peer bus without a (transparent) bridge
Linux uses the pirq table to infer their presence. We really should export the device tree in the LinuxBIOS table. Then FILO can read that to find busses and other devices. Eric
On Wed, Dec 10, 2003 at 02:49:29PM -0700, Eric W. Biederman wrote:
Stefan Reinauer <stepan@suse.de> writes:
* YhLu <YhLu@tyan.com> [031210 22:02]:
I have checked pci.c in fifo. It need to be changes as follow.
It seems otherwise it can not scan the peer root bus.
How is this done on the HDAMA and other boards?
Currently I have not been testing the Filo on the HDAMA. Last time this was brought up I someone was going to modify FILO to scan through all possible busses like etherboot does.
That patch is here: http://www.clustermatic.org/pipermail/linuxbios/2003-October/005753.html
Maybe someone need to make it can handle peer root bus refer to the code in Linux kernel or Etherboot.
Can we have an array of peer busses in the config file? ie. register SCAN_BUSSES={ 0, 1, 3 }
I like this idea implemented in FILO, rather than having 2 options (recurse from bus 0, and scan 0-255). What do you think?
Or is there any real way to _detect_ peer busses? Or at least conclude their existance by the available southbridges - There is obviously no peer bus without a (transparent) bridge
Linux uses the pirq table to infer their presence. We really should export the device tree in the LinuxBIOS table. Then FILO can read that to find busses and other devices.
That would be the right solution eventually. -- Takeshi
Any chance of getting devbios updated to 2.6? I get Invalid module format trying to load. Or perhaps someone will tell me if the MTD drivers support a AMD29f040b. The MTD webpage dosen't have any info and I build and inserted lots of different mtd modules but nothing indicated they did anything. -- Richard A. Smith rsmith@bitworks.com
Richard Smith <rsmith@bitworks.com> writes:
Any chance of getting devbios updated to 2.6? I get Invalid module format trying to load.
Or perhaps someone will tell me if the MTD drivers support a AMD29f040b.
If you look in jedec_probe.c AM29F040, and AM29LV040B are supported so if it is not it should be just a tiny tweak to jedec probe to get the chip recognized.
The MTD webpage dosen't have any info and I build and inserted lots of different mtd modules but nothing indicated they did anything.
Do you have a proper map driver? Eric
Eric W. Biederman wrote:
If you look in jedec_probe.c AM29F040, and AM29LV040B are supported so if it is not it should be just a tiny tweak to jedec probe to get the chip recognized.
Ah.. jdec_probe ok well that gives me a place to start. I'll go see if I can tweak that to find a AM29F040B. I would have though that the AM29F040 id would have matched.
The MTD webpage dosen't have any info and I build and inserted lots of different mtd modules but nothing indicated they did anything.
Do you have a proper map driver?
Er... I don't know. How do I check? I've not found any documentation explaining anything about useing the MTD with BIOS type flash chips. Its all Msystems or CF stuff so I've just been guessing. My chip is hanging out just like a normal BIOS chip would at physical address 0xfff80000 - 0xffffffff. The 1Meg extended BIOS space area should be enabled in my chipset. So BIOS chipselects should be generated for 0xfff0ffff up. There was an option in the kernel building that asked for a start address and a size to which I entered 0xfff80000 and 0x80000. Hmmm... come to think about it now I may have entered 0x80000 rather than 0xfff80000 as the start address.. In any case.. given my setup what and where do I config this? -- Richard A. Smith rsmith@bitworks.com
Richard Smith <rsmith@bitworks.com> writes:
Eric W. Biederman wrote:
If you look in jedec_probe.c AM29F040, and AM29LV040B are supported so if it is not it should be just a tiny tweak to jedec probe to get the chip recognized.
Ah.. jdec_probe ok well that gives me a place to start. I'll go see if I can tweak that to find a AM29F040B. I would have though that the AM29F040 id would have matched.
It might I don't know how you have things configured.
The MTD webpage dosen't have any info and I build and inserted lots of different mtd modules but nothing indicated they did anything. Do you have a proper map driver?
Er... I don't know. How do I check?
MTD has 3 levels of drivers. - The map driver (i.e. ich2rom and amd76xrom ) which knows how to find the ROM chip on a specific board, or chipset. - The probe driver (cfi_probe or jedec_probe) which knows how to detect which ROM chip you have. - The chip driver (cfi_cmdset_0001 cfi_cmdset_002..) which knows how to use a specific command set regardless of which device you have.
I've not found any documentation explaining anything about useing the MTD with BIOS type flash chips. Its all Msystems or CF stuff so I've just been guessing.
My chip is hanging out just like a normal BIOS chip would at physical address 0xfff80000 - 0xffffffff. The 1Meg extended BIOS space area should be enabled in my chipset. So BIOS chipselects should be generated for 0xfff0ffff up. There was an option in the kernel building that asked for a start address and a size to which I entered 0xfff80000 and 0x80000.
Hmmm... come to think about it now I may have entered 0x80000 rather than 0xfff80000 as the start address..
In any case.. given my setup what and where do I config this?
Basically it depends on the map driver you are using. Some of them can look at your chipset and figure these things out. Some are really generic and you have to hard code things. I don't know if those work at all. Eric
* Richard Smith <rsmith@bitworks.com> [040208 06:19]:
Any chance of getting devbios updated to 2.6? I get Invalid module format trying to load.
I don't think it should survive another decade.. there were some efforts to integrate devbios into mtd, which i am happy to support, but it dried out again.. mtd is definitely the way to go! Stefan -- Stefan Reinauer, SUSE LINUX AG Teamleader Architecture Development
participants (5)
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ebiederman＠lnxi.com -
Richard Smith -
Stefan Reinauer -
Takeshi Sone -
YhLu