I attach a patch file for the Via Epia-m target which makes this target now compile and work. I have tried to keep all changes local to the directories relevent to this target i.e. - mainboard/via/epia-m - northbridge/via/vt8623 - southbridge/via/vt8623 - southbridge/ricoh - superio/via/vt1211 - targets/via/epia-m However there are 4 files which are modified elsewhere in the sources: - devices/cardbus_device.c - which needed another io resource probing - comments suggest no-one else is using this anyway - include/device/cardbus.h - to include another function definition - cpu/via/model_centaur/model_centaur.c - to add more processor id codes and to get it to set up mtrr's - arch/i386/lib/cpu.c - to conditionally test for SMP & IOAPIC systems - this board/processor has no APIC's and would otherwise fail on the call to lapicid() In addition to making it work again, I have added the following functionality: - Dynamic memory sizing - which has been tested so far with: - - 256Mb 1 bank (i.e. single sided) - - 256Mb 2 bank (i.e. double sided) - - 512Mb 2 bank (i.e. double sided) - A minimalist ACPI dsdt table free of any intellectual property and can thus be distributed with sources. - Compact Flash boot working. - I have also written an EPIA-M howto which I have attached seperately. Maybe that can get onto the web site. Things still not resolved: I spent a great deal of time trying to get the vga to initialise through the emulator, but I have failed. I feel that I now know the workings of the emulator inside out, but it would take a good deal more effort to resolve the issues. As an interim solution, therefore, I have re-implemented the old real mode vga-bios.c which works a treat on this board. To keep the main source tree clean of this, it is implemented locally within the mainboard/via/epia-m directory, and in a way which does not require any changes to the main source tree (e.g. it implements its own temporary gdt's and idt's). Maybe one day I shall return to this problem. Whilst attempting to get the emulator to work, I had to start using a fallback only image for sizing reasons, and this is how the patch is configured. Without both real-mode vga and the emulator it may be possible to go back to a dual image. My original epia-m port set up 2 mtrr's over the vga framebuffer and agp bridge as per the Award bios, and this makes a noticeable difference in performance. Without changing the current mtrr stuff I see no way of making a request for these to be set up, and so this version doesn't attempt to. It would be nice to see this sort of functionality return into the core if anyone is interested - perhaps as another type of memory resource different to main memory and non contiguous from main memory. The type of these mtrr's is write combining rather than write back as used for main memory. Nick Barker
Please let me clear ... 1. You mean, in the end, VGA works. Right? 2. If 1 is yes, X server works also? or not tested yet? 3. How much time it takes to boot? Both in vga enabled and disabled? Old way of VGA init is slow? --- Okajima, Jun. Tokyo, Japan.
I attach a patch file for the Via Epia-m target which makes this target now compile and work.
I have tried to keep all changes local to the directories relevent to this target i.e. - mainboard/via/epia-m - northbridge/via/vt8623 - southbridge/via/vt8623 - southbridge/ricoh - superio/via/vt1211 - targets/via/epia-m
However there are 4 files which are modified elsewhere in the sources: - devices/cardbus_device.c - which needed another io resource probing - comments suggest no-one else is using this anyway - include/device/cardbus.h - to include another function definition - cpu/via/model_centaur/model_centaur.c - to add more processor id codes and to get it to set up mtrr's - arch/i386/lib/cpu.c - to conditionally test for SMP & IOAPIC systems - this board/processor has no APIC's and would otherwise fail on the call to lapicid()
In addition to making it work again, I have added the following functionality: - Dynamic memory sizing - which has been tested so far with: - - 256Mb 1 bank (i.e. single sided) - - 256Mb 2 bank (i.e. double sided) - - 512Mb 2 bank (i.e. double sided)
- A minimalist ACPI dsdt table free of any intellectual property and can thus be distributed with sources.
- Compact Flash boot working.
- I have also written an EPIA-M howto which I have attached seperately. Maybe that can get onto the web site.
Things still not resolved: I spent a great deal of time trying to get the vga to initialise through the emulator, but I have failed. I feel that I now know the workings of the emulator inside out, but it would take a good deal more effort to resolve the issues.
As an interim solution, therefore, I have re-implemented the old real mode vga-bios.c which works a treat on this board. To keep the main source tree clean of this, it is implemented locally within the mainboard/via/epia-m directory, and in a way which does not require any changes to the main source tree (e.g. it implements its own temporary gdt's and idt's). Maybe one day I shall return to this problem.
Whilst attempting to get the emulator to work, I had to start using a fallback only image for sizing reasons, and this is how the patch is configured. Without both real-mode vga and the emulator it may be possible to go back to a dual image.
My original epia-m port set up 2 mtrr's over the vga framebuffer and agp bridge as per the Award bios, and this makes a noticeable difference in performance. Without changing the current mtrr stuff I see no way of making a request for these to be set up, and so this version doesn't attempt to. It would be nice to see this sort of functionality return into the core if anyone is interested - perhaps as another type of memory resource different to main memory and non contiguous from main memory. The type of these mtrr's is write combining rather than write back as used for main memory.
Nick Barker
______________________________________________________________________
-- LinuxBIOS mailing list LinuxBIOS@openbios.org http://www.openbios.org/mailman/listinfo/linuxbios
Nick, great job! On Sat, Oct 29, 2005 at 12:53:55AM +0900, Jun OKAJIMA wrote:
Please let me clear ...
1. You mean, in the end, VGA works. Right? 2. If 1 is yes, X server works also? or not tested yet? 3. How much time it takes to boot? Both in vga enabled and disabled? Old way of VGA init is slow?
From Nick's posting I understand that VGA is working.
I suggest that you test the patch to see if performance is good enough for you, and if not why not help improving it? :) I am sure that Nick will welcome all feedback. //Peter
Nice work so far. I just applied the patch, followed the instructions in Nick's HowTo and flashed linuxbios to my Epia-M10000 (1). The only thing I see on the serial console is: LinuxBIOS-1.1.8.0Fallback Fr Okt 28 19:21:21 CEST 2005 starting... Enabling mainboard devices I used the default epia-m Config.lb (attached) with filo. Loglevel is 8. The board has 256MB of single sided DDR memory. Should I increase the loglevel to 9 to get more information? Or any other ideas? One thing I don't really understand in the HowTo is, that you change:
cat fallback/linuxbios.rom > linuxbios.rom
to
cat /video.bios.bin fallback/linuxbios.rom >linuxbios.rom
in the Makefile. This means, that the video bios is at the beginning of the ROM file. Is that correct? In the next step I have to get the original BIOS back on the chip. Since I do not own a Bios-Savior, a friend with a programmer has to do this. I think he has to know the format of the ROM-File which flash_rom uses when dumping the BIOS. I assume this is Intel-Hex Format, right? Martin # Sample config file for EPIA-M # This will make a target directory of ./epia-m target epia-m mainboard via/epia-m option MAXIMUM_CONSOLE_LOGLEVEL=8 option DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 option ROM_SIZE=256*1024 option HAVE_OPTION_TABLE=1 option CONFIG_ROM_STREAM=1 option HAVE_FALLBACK_BOOT=1 ### ### Compute the location and size of where this firmware image ### (linuxBIOS plus bootloader) will live in the boot rom chip. ### option FALLBACK_SIZE=0x30000 ## LinuxBIOS C code runs at this location in RAM option _RAMBASE=0x00004000 # ### ### Compute the start location and size size of ### The linuxBIOS bootloader. ### # # EPIA-M # #romimage "normal" # option USE_FALLBACK_IMAGE=0 # option ROM_IMAGE_SIZE=0xc000 # option ROM_SECTION_OFFSET=0x10000 # option ROM_SECTION_SIZE=0x18000 # option XIP_ROM_BASE=0xfffd0000 # option LINUXBIOS_EXTRA_VERSION=".0Normal" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf # payload ../../../../../lnxieepro100.ebi # payload /filo.elf #end romimage "fallback" option USE_FALLBACK_IMAGE=1 option ROM_IMAGE_SIZE=0x10000 option ROM_SECTION_OFFSET=0x10000 option ROM_SECTION_SIZE=0x30000 # option XIP_ROM_BASE=0xfffe0000 option LINUXBIOS_EXTRA_VERSION=".0Fallback" # payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf # payload ../../../../tg3--ide_disk.zelf # payload ../../../../../lnxieepro100.ebi payload /media/mytmp/lb/filo.elf end buildrom ./linuxbios.rom ROM_SIZE "fallback"
On Fri, Oct 28, 2005 at 08:51:09PM +0200, Martin Ley wrote:
In the next step I have to get the original BIOS back on the chip. Since I do not own a Bios-Savior, a friend with a programmer has to do this. I think he has to know the format of the ROM-File which flash_rom uses when dumping the BIOS. I assume this is Intel-Hex Format, right?
I would assume raw binary. //Peter
Nice work so far. I just applied the patch, followed the instructions in Nick's HowTo and flashed linuxbios to my Epia-M10000 (1). The only thing I see on the serial console is:
LinuxBIOS-1.1.8.0Fallback Fr Okt 28 19:21:21 CEST 2005 starting... Enabling mainboard devices
I list below the initial output I would expect to see at log level 8 if it is of help. Having looked through the code in this area for you, I cant really see why the sequence is not getting into the memory init routines. This makes me wonder if you have a problem with your debugging console, and whether it might be dropping characters at 115200 baud. Ideally it needs to be set up for hardware flow control and for those control lines to be wired through. The primitive driver in lxbios has no concept of software flow control. When I first started doing this stuff I used hyperterminal on windows, but quickly gave up on that. I've found that microcom running on another Linux system (another M 6000 actually) to be the best solution. Regardless of what you are running to do this, I would suggest making sure that it is set up preferably for hardware flow control, but also try no flow control and see if that gets any further. You may have already tried this, I'd just like to eliminate this as a possibility first.
One thing I don't really understand in the HowTo is, that you change:
cat fallback/linuxbios.rom > linuxbios.rom
to
cat /video.bios.bin fallback/linuxbios.rom >linuxbios.rom
in the Makefile. This means, that the video bios is at the beginning of the ROM file. Is that correct?
Yes it is correct, Linuxbios sits at the end of the rom. Why? When running, the rom chip sits at the highest possible memory location so that it can provide a reset vector for the processor at power on. So the chip is located at 0xfffc0000 through 0xffffffff in the address space. The vga bios occupies 0xfffc0000 through 0xfffcffff and the Lx bios 0xfffd0000 through 0xffffffff The all important reset vector is at 0xfffffff8. This is why it is so important to check the sizes of files that we are squeezing on to the rom, 1 byte wrong and the reset vector gets screwed. For you to be getting any output at all, then you have got this bit right.
In the next step I have to get the original BIOS back on the chip. Since I do not own a Bios-Savior, a friend with a programmer has to do this. I think he has to know the format of the ROM-File which flash_rom uses when dumping the BIOS. I assume this is Intel-Hex Format, right?
It is pure binary. Initial debug output: LinuxBIOS-1.1.8.0Fallback Fri Oct 28 14:33:23 EDT 2005 starting... Enabling mainboard devices Enabling shadow ram vt8623 init starting Detecting Memory Number of Banks 04 Number of Rows 0d Priamry DRAM width08 No Columns 0a MA type e0 Bank 0 (*16 Mb) 10 No Physical Banks 01 Total Memory (*16 Mb) 10 CAS Supported 2 2.5 Cycle time at CL X (nS)75 Cycle time at CL X-0.5 (nS)a0 Cycle time at CL X-1 (nS)00 Starting at CAS 2.5 tRP 50 tRCD 50 tRAS 2d Low Bond 00 High Bondb6 Setting DQS delay79vt8623 done 00:06 11 23 31 06 00 30 22 00 00 00 06 00 00 00 00 10:08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 20:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30:00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40:00 18 88 80 82 44 00 00 18 99 88 80 82 44 00 00 50:c8 de cf 88 e0 07 00 00 e0 00 10 10 10 10 00 00 60:02 ff 00 30 e6 32 01 38 42 2d 43 58 00 44 00 00 70:82 48 00 01 01 08 50 00 01 00 00 00 00 00 02 00 80:0f 61 00 00 80 00 00 00 02 00 00 00 00 00 00 00 90:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0:02 c0 20 00 07 02 00 1f 04 00 00 00 2f 02 04 00 b0:00 00 00 00 c0 00 00 00 c8 00 00 00 00 00 00 00 c0:01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0:00 dd 00 00 00 00 01 00 40 00 00 00 00 00 00 00 f0:00 00 00 00 00 00 11 13 00 00 00 00 00 00 00 00 AGP Doing MTRR init. Copying LinuxBIOS to ram. Jumping to LinuxBIOS. ................. Nick Barker
participants (4)
-
Jun OKAJIMA -
Martin Ley -
Nick Barker -
Peter Stuge