On 28.05.2009 17:32 Uhr, Myles Watson wrote:
Remaining issues: 1. Right now I'm testing it with a reserved area for the IOAPIC in the southbridge and a reserved area in the lpc/ISA function of the southbridge.
The downside of this is that I have to touch every southbridge to add it. I think it is the right place, though.
Not so much of a downside, since this is a fix for a real issue, and puts the code where it (in my opinion) belongs.
2. Kontron will break because I removed its special case from the resource allocator. I think with the new resource allocator it will be easy to fix, but I'd like a Kontron tester.
I'll be glad to test... Can you suggest a fix or give a pointer on how to fix this? If we can get rid of the PCIe hole handling hack, I'm all for checking this in. -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info@coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866