Index: svn/src/mainboard/kontron/986lcd-m/romstage.c
===================================================================
--- svn.orig/src/mainboard/kontron/986lcd-m/romstage.c
+++ svn/src/mainboard/kontron/986lcd-m/romstage.c
@@ -42,8 +42,7 @@
 
 #include "superio/winbond/w83627thg/w83627thg.h"
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
Index: svn/src/mainboard/tyan/s2895/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2895/romstage.c
+++ svn/src/mainboard/tyan/s2895/romstage.c
@@ -13,8 +13,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/include/pc80/mc146818rtc.h
===================================================================
--- svn.orig/src/include/pc80/mc146818rtc.h
+++ svn/src/include/pc80/mc146818rtc.h
@@ -89,6 +89,31 @@
 #include <option_table.h>
 #endif
 
+#ifndef UTIL_BUILD_OPTION_TABLE
+#include <arch/io.h>
+static inline unsigned char cmos_read(unsigned char addr)
+{
+	int offs = 0;
+	if (addr >= 128) {
+		offs = 2;
+		addr -= 128;
+	}
+	outb(addr, RTC_BASE_PORT + offs + 0);
+	return inb(RTC_BASE_PORT + offs + 1);
+}
+
+static inline void cmos_write(unsigned char val, unsigned char addr)
+{
+	int offs = 0;
+	if (addr >= 128) {
+		offs = 2;
+		addr -= 128;
+	}
+	outb(addr, RTC_BASE_PORT + offs + 0);
+	outb(val, RTC_BASE_PORT + offs + 1);
+}
+#endif
+
 #if !defined(__ROMCC__)
 void rtc_init(int invalid);
 #if CONFIG_USE_OPTION_TABLE
@@ -100,6 +125,8 @@ static inline int get_option(void *dest 
 static inline unsigned read_option(unsigned start, unsigned size, unsigned def)
 	{ return def; }
 #endif
+#else
+#include <pc80/mc146818rtc_early.c>
 #endif
 
 #endif /*  PC80_MC146818RTC_H */
Index: svn/src/northbridge/intel/i945/raminit.c
===================================================================
--- svn.orig/src/northbridge/intel/i945/raminit.c
+++ svn/src/northbridge/intel/i945/raminit.c
@@ -19,6 +19,7 @@
 
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/cache.h>
+#include <pc80/mc146818rtc.h>
 #include <spd.h>
 #include "raminit.h"
 #include "i945.h"
@@ -2671,7 +2672,7 @@ static void sdram_save_receive_enable(vo
 	values[3] |= (reg32 >> (24 - 4)) & 0xf0;
 
 	/* coreboot only uses bytes 0 - 127 for its CMOS values so far
-	 * so we grad bytes 128 - 131 to save the receive enable values
+	 * so we grab bytes 128 - 131 to save the receive enable values
 	 */
 
 	for (i=0; i<4; i++)
Index: svn/src/pc80/mc146818rtc.c
===================================================================
--- svn.orig/src/pc80/mc146818rtc.c
+++ svn/src/pc80/mc146818rtc.c
@@ -1,5 +1,4 @@
 #include <console/console.h>
-#include <arch/io.h>
 #include <pc80/mc146818rtc.h>
 #include <boot/coreboot_tables.h>
 #include <string.h>
@@ -73,29 +72,7 @@
 # define RTC_VRT 0x80		/* valid RAM and time */
 /**********************************************************************/
 
-static inline unsigned char cmos_read(unsigned char addr)
-{
-	int offs = 0;
-	if (addr >= 128) {
-		offs = 2;
-		addr -= 128;
-	}
-	outb(addr, RTC_BASE_PORT + offs + 0);
-	return inb(RTC_BASE_PORT + offs + 1);
-}
-
-static inline void cmos_write(unsigned char val, unsigned char addr)
-{
-	int offs = 0;
-	if (addr >= 128) {
-		offs = 2;
-		addr -= 128;
-	}
-	outb(addr, RTC_BASE_PORT + offs + 0);
-	outb(val, RTC_BASE_PORT + offs + 1);
-}
-
-#if CONFIG_HAVE_OPTION_TABLE
+#if CONFIG_USE_OPTION_TABLE
 static int rtc_checksum_valid(int range_start, int range_end, int cks_loc)
 {
 	int i;
@@ -135,14 +112,14 @@ static void rtc_set_checksum(int range_s
 
 void rtc_init(int invalid)
 {
-#if CONFIG_HAVE_OPTION_TABLE
+#if CONFIG_USE_OPTION_TABLE
 	unsigned char x;
 	int cmos_invalid, checksum_invalid;
 #endif
 
 	printk(BIOS_DEBUG, "RTC Init\n");
 
-#if CONFIG_HAVE_OPTION_TABLE
+#if CONFIG_USE_OPTION_TABLE
 	/* See if there has been a CMOS power problem. */
 	x = cmos_read(RTC_VALID);
 	cmos_invalid = !(x & RTC_VRT);
@@ -183,7 +160,7 @@ void rtc_init(int invalid)
 	/* Setup the frequency it operates at */
 	cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);
 
-#if CONFIG_HAVE_OPTION_TABLE
+#if CONFIG_USE_OPTION_TABLE
 	/* See if there is a LB CMOS checksum error */
 	checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START,
 			LB_CKS_RANGE_END,LB_CKS_LOC);
Index: svn/src/pc80/mc146818rtc_early.c
===================================================================
--- svn.orig/src/pc80/mc146818rtc_early.c
+++ svn/src/pc80/mc146818rtc_early.c
@@ -1,4 +1,3 @@
-#include <arch/io.h>
 #include <pc80/mc146818rtc.h>
 #include <fallback.h>
 
@@ -9,28 +8,6 @@
 #error "CONFIG_MAX_REBOOT_CNT too high"
 #endif
 
-static unsigned char cmos_read(unsigned char addr)
-{
-	int offs = 0;
-	if (addr >= 128) {
-		offs = 2;
-		addr -= 128;
-	}
-	outb(addr, RTC_BASE_PORT + offs + 0);
-	return inb(RTC_BASE_PORT + offs + 1);
-}
-
-static void cmos_write(unsigned char val, unsigned char addr)
-{
-	int offs = 0;
-	if (addr >= 128) {
-		offs = 2;
-		addr -= 128;
-	}
-	outb(addr, RTC_BASE_PORT + offs + 0);
-	outb(val, RTC_BASE_PORT + offs + 1);
-}
-
 static int cmos_error(void)
 {
 	unsigned char reg_d;
Index: svn/util/options/build_opt_tbl.c
===================================================================
--- svn.orig/util/options/build_opt_tbl.c
+++ svn/util/options/build_opt_tbl.c
@@ -25,6 +25,7 @@
 #include <ctype.h>
 #include <errno.h>
 #include <libgen.h>
+#define UTIL_BUILD_OPTION_TABLE
 #include "../../src/include/pc80/mc146818rtc.h"
 #include "../../src/include/boot/coreboot_tables.h"
 
Index: svn/src/arch/i386/init/bootblock_normal.c
===================================================================
--- svn.orig/src/arch/i386/init/bootblock_normal.c
+++ svn/src/arch/i386/init/bootblock_normal.c
@@ -2,7 +2,7 @@
 
 #include <arch/io.h>
 #include "arch/romcc_io.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 static void main(unsigned long bist)
 {
Index: svn/src/cpu/amd/quadcore/quadcore.c
===================================================================
--- svn.orig/src/cpu/amd/quadcore/quadcore.c
+++ svn/src/cpu/amd/quadcore/quadcore.c
@@ -18,7 +18,7 @@
  */
 
 #include <console/console.h>
-#include <pc80/mc146818rtc_early.c>
+#include <pc80/mc146818rtc.h>
 #include <northbridge/amd/amdht/ht_wrapper.c>
 
 #ifndef SET_NB_CFG_54
Index: svn/src/mainboard/amd/dbm690t/romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/dbm690t/romstage.c
+++ svn/src/mainboard/amd/dbm690t/romstage.c
@@ -40,8 +40,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/amd/mahogany/romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/mahogany/romstage.c
+++ svn/src/mainboard/amd/mahogany/romstage.c
@@ -40,8 +40,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/amd/mahogany_fam10/romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/mahogany_fam10/romstage.c
+++ svn/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -45,7 +45,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include <cpu/amd/model_10xxx_rev.h>
Index: svn/src/mainboard/amd/pistachio/romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/pistachio/romstage.c
+++ svn/src/mainboard/amd/pistachio/romstage.c
@@ -34,8 +34,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
+++ svn/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
@@ -18,8 +18,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 #include "./arch/i386/lib/printk_init.c"
 
Index: svn/src/mainboard/amd/serengeti_cheetah/romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ svn/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -26,8 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ svn/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -45,7 +45,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include <cpu/amd/model_10xxx_rev.h>
Index: svn/src/mainboard/amd/tilapia_fam10/romstage.c
===================================================================
--- svn.orig/src/mainboard/amd/tilapia_fam10/romstage.c
+++ svn/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -45,7 +45,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include <cpu/amd/model_10xxx_rev.h>
Index: svn/src/mainboard/arima/hdama/romstage.c
===================================================================
--- svn.orig/src/mainboard/arima/hdama/romstage.c
+++ svn/src/mainboard/arima/hdama/romstage.c
@@ -5,8 +5,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/asrock/939a785gmh/romstage.c
===================================================================
--- svn.orig/src/mainboard/asrock/939a785gmh/romstage.c
+++ svn/src/mainboard/asrock/939a785gmh/romstage.c
@@ -41,8 +41,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/asus/a8n_e/romstage.c
===================================================================
--- svn.orig/src/mainboard/asus/a8n_e/romstage.c
+++ svn/src/mainboard/asus/a8n_e/romstage.c
@@ -38,8 +38,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"
Index: svn/src/mainboard/asus/a8v-e_se/romstage.c
===================================================================
--- svn.orig/src/mainboard/asus/a8v-e_se/romstage.c
+++ svn/src/mainboard/asus/a8v-e_se/romstage.c
@@ -44,8 +44,7 @@ unsigned int get_sbdn(unsigned bus);
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
Index: svn/src/mainboard/asus/m2v-mx_se/romstage.c
===================================================================
--- svn.orig/src/mainboard/asus/m2v-mx_se/romstage.c
+++ svn/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -49,8 +49,7 @@ unsigned int get_sbdn(unsigned bus);
 #include <arch/romcc_io.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
Index: svn/src/mainboard/broadcom/blast/romstage.c
===================================================================
--- svn.orig/src/mainboard/broadcom/blast/romstage.c
+++ svn/src/mainboard/broadcom/blast/romstage.c
@@ -11,8 +11,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/dell/s1850/romstage.c
===================================================================
--- svn.orig/src/mainboard/dell/s1850/romstage.c
+++ svn/src/mainboard/dell/s1850/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/digitallogic/adl855pc/romstage.c
===================================================================
--- svn.orig/src/mainboard/digitallogic/adl855pc/romstage.c
+++ svn/src/mainboard/digitallogic/adl855pc/romstage.c
@@ -4,10 +4,9 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-//#include "option_table.h"
 #include <stdlib.h>
 #include "pc80/udelay_io.c"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801dx/i82801dx.h"
Index: svn/src/mainboard/digitallogic/msm586seg/romstage.c
===================================================================
--- svn.orig/src/mainboard/digitallogic/msm586seg/romstage.c
+++ svn/src/mainboard/digitallogic/msm586seg/romstage.c
@@ -4,7 +4,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
Index: svn/src/mainboard/emulation/qemu-x86/romstage.c
===================================================================
--- svn.orig/src/mainboard/emulation/qemu-x86/romstage.c
+++ svn/src/mainboard/emulation/qemu-x86/romstage.c
@@ -5,8 +5,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
Index: svn/src/mainboard/getac/p470/romstage.c
===================================================================
--- svn.orig/src/mainboard/getac/p470/romstage.c
+++ svn/src/mainboard/getac/p470/romstage.c
@@ -31,8 +31,7 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
Index: svn/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
+++ svn/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
@@ -41,8 +41,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
Index: svn/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
===================================================================
--- svn.orig/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ svn/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -50,8 +50,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #if CONFIG_USBDEBUG
Index: svn/src/mainboard/gigabyte/m57sli/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/gigabyte/m57sli/ap_romstage.c
+++ svn/src/mainboard/gigabyte/m57sli/ap_romstage.c
@@ -39,8 +39,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
Index: svn/src/mainboard/gigabyte/m57sli/romstage.c
===================================================================
--- svn.orig/src/mainboard/gigabyte/m57sli/romstage.c
+++ svn/src/mainboard/gigabyte/m57sli/romstage.c
@@ -48,8 +48,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #if CONFIG_USBDEBUG
Index: svn/src/mainboard/hp/dl145_g3/romstage.c
===================================================================
--- svn.orig/src/mainboard/hp/dl145_g3/romstage.c
+++ svn/src/mainboard/hp/dl145_g3/romstage.c
@@ -54,8 +54,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: svn/src/mainboard/ibase/mb899/romstage.c
===================================================================
--- svn.orig/src/mainboard/ibase/mb899/romstage.c
+++ svn/src/mainboard/ibase/mb899/romstage.c
@@ -34,8 +34,7 @@
 
 #include "superio/winbond/w83627ehg/w83627ehg.h"
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
Index: svn/src/mainboard/ibm/e325/romstage.c
===================================================================
--- svn.orig/src/mainboard/ibm/e325/romstage.c
+++ svn/src/mainboard/ibm/e325/romstage.c
@@ -7,8 +7,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/ibm/e326/romstage.c
===================================================================
--- svn.orig/src/mainboard/ibm/e326/romstage.c
+++ svn/src/mainboard/ibm/e326/romstage.c
@@ -7,8 +7,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/intel/d945gclf/romstage.c
===================================================================
--- svn.orig/src/mainboard/intel/d945gclf/romstage.c
+++ svn/src/mainboard/intel/d945gclf/romstage.c
@@ -33,8 +33,7 @@
 
 #include "superio/smsc/lpc47m15x/lpc47m15x.h"
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
Index: svn/src/mainboard/intel/eagleheights/romstage.c
===================================================================
--- svn.orig/src/mainboard/intel/eagleheights/romstage.c
+++ svn/src/mainboard/intel/eagleheights/romstage.c
@@ -29,8 +29,7 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
Index: svn/src/mainboard/intel/jarrell/romstage.c
===================================================================
--- svn.orig/src/mainboard/intel/jarrell/romstage.c
+++ svn/src/mainboard/intel/jarrell/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/intel/mtarvon/romstage.c
===================================================================
--- svn.orig/src/mainboard/intel/mtarvon/romstage.c
+++ svn/src/mainboard/intel/mtarvon/romstage.c
@@ -26,7 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i3100/i3100_early_smbus.c"
Index: svn/src/mainboard/intel/truxton/romstage.c
===================================================================
--- svn.orig/src/mainboard/intel/truxton/romstage.c
+++ svn/src/mainboard/intel/truxton/romstage.c
@@ -26,7 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/udelay_io.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: svn/src/mainboard/intel/xe7501devkit/romstage.c
===================================================================
--- svn.orig/src/mainboard/intel/xe7501devkit/romstage.c
+++ svn/src/mainboard/intel/xe7501devkit/romstage.c
@@ -6,8 +6,7 @@
 #include <cpu/x86/lapic.h>
 #include <arch/cpu.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
Index: svn/src/mainboard/iwill/dk8_htx/romstage.c
===================================================================
--- svn.orig/src/mainboard/iwill/dk8_htx/romstage.c
+++ svn/src/mainboard/iwill/dk8_htx/romstage.c
@@ -26,8 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/iwill/dk8s2/romstage.c
===================================================================
--- svn.orig/src/mainboard/iwill/dk8s2/romstage.c
+++ svn/src/mainboard/iwill/dk8s2/romstage.c
@@ -26,8 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/iwill/dk8x/romstage.c
===================================================================
--- svn.orig/src/mainboard/iwill/dk8x/romstage.c
+++ svn/src/mainboard/iwill/dk8x/romstage.c
@@ -26,8 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/kontron/kt690/romstage.c
===================================================================
--- svn.orig/src/mainboard/kontron/kt690/romstage.c
+++ svn/src/mainboard/kontron/kt690/romstage.c
@@ -41,8 +41,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/msi/ms7135/romstage.c
===================================================================
--- svn.orig/src/mainboard/msi/ms7135/romstage.c
+++ svn/src/mainboard/msi/ms7135/romstage.c
@@ -38,8 +38,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
Index: svn/src/mainboard/msi/ms7260/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/msi/ms7260/ap_romstage.c
+++ svn/src/mainboard/msi/ms7260/ap_romstage.c
@@ -36,8 +36,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 
 #include "console/console.c"
Index: svn/src/mainboard/msi/ms7260/romstage.c
===================================================================
--- svn.orig/src/mainboard/msi/ms7260/romstage.c
+++ svn/src/mainboard/msi/ms7260/romstage.c
@@ -52,8 +52,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #if CONFIG_USBDEBUG
Index: svn/src/mainboard/msi/ms9185/romstage.c
===================================================================
--- svn.orig/src/mainboard/msi/ms9185/romstage.c
+++ svn/src/mainboard/msi/ms9185/romstage.c
@@ -47,8 +47,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/msi/ms9282/romstage.c
===================================================================
--- svn.orig/src/mainboard/msi/ms9282/romstage.c
+++ svn/src/mainboard/msi/ms9282/romstage.c
@@ -42,8 +42,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/msi/ms9652_fam10/romstage.c
===================================================================
--- svn.orig/src/mainboard/msi/ms9652_fam10/romstage.c
+++ svn/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -43,7 +43,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
 #include <console/console.h>
 #if CONFIG_USBDEBUG
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
Index: svn/src/mainboard/newisys/khepri/romstage.c
===================================================================
--- svn.orig/src/mainboard/newisys/khepri/romstage.c
+++ svn/src/mainboard/newisys/khepri/romstage.c
@@ -12,8 +12,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
+++ svn/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
@@ -39,8 +39,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
Index: svn/src/mainboard/nvidia/l1_2pvv/romstage.c
===================================================================
--- svn.orig/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ svn/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -48,8 +48,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #if CONFIG_USBDEBUG
Index: svn/src/mainboard/roda/rk886ex/romstage.c
===================================================================
--- svn.orig/src/mainboard/roda/rk886ex/romstage.c
+++ svn/src/mainboard/roda/rk886ex/romstage.c
@@ -35,8 +35,7 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
Index: svn/src/mainboard/sunw/ultra40/romstage.c
===================================================================
--- svn.orig/src/mainboard/sunw/ultra40/romstage.c
+++ svn/src/mainboard/sunw/ultra40/romstage.c
@@ -14,8 +14,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/supermicro/h8dme/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/h8dme/ap_romstage.c
+++ svn/src/mainboard/supermicro/h8dme/ap_romstage.c
@@ -39,8 +39,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 
 #include "console/console.c"
Index: svn/src/mainboard/supermicro/h8dme/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/h8dme/romstage.c
+++ svn/src/mainboard/supermicro/h8dme/romstage.c
@@ -43,8 +43,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: svn/src/mainboard/supermicro/h8dmr/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/h8dmr/ap_romstage.c
+++ svn/src/mainboard/supermicro/h8dmr/ap_romstage.c
@@ -39,8 +39,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 
 #include "console/console.c"
Index: svn/src/mainboard/supermicro/h8dmr/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/h8dmr/romstage.c
+++ svn/src/mainboard/supermicro/h8dmr/romstage.c
@@ -46,8 +46,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: svn/src/mainboard/supermicro/h8dmr_fam10/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ svn/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -41,7 +41,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
 
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: svn/src/mainboard/supermicro/h8qme_fam10/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ svn/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -41,7 +41,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
 
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: svn/src/mainboard/supermicro/x6dai_g/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dai_g/romstage.c
+++ svn/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"
Index: svn/src/mainboard/supermicro/x6dhe_g/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ svn/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "pc80/udelay_io.c"
Index: svn/src/mainboard/supermicro/x6dhe_g2/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ svn/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/supermicro/x6dhr_ig/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ svn/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/supermicro/x6dhr_ig2/romstage.c
===================================================================
--- svn.orig/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ svn/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
Index: svn/src/mainboard/technexion/tim5690/romstage.c
===================================================================
--- svn.orig/src/mainboard/technexion/tim5690/romstage.c
+++ svn/src/mainboard/technexion/tim5690/romstage.c
@@ -40,8 +40,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/technexion/tim8690/romstage.c
===================================================================
--- svn.orig/src/mainboard/technexion/tim8690/romstage.c
+++ svn/src/mainboard/technexion/tim8690/romstage.c
@@ -40,8 +40,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/technologic/ts5300/romstage.c
===================================================================
--- svn.orig/src/mainboard/technologic/ts5300/romstage.c
+++ svn/src/mainboard/technologic/ts5300/romstage.c
@@ -10,7 +10,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
Index: svn/src/mainboard/tyan/s2735/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2735/romstage.c
+++ svn/src/mainboard/tyan/s2735/romstage.c
@@ -6,8 +6,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2850/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2850/romstage.c
+++ svn/src/mainboard/tyan/s2850/romstage.c
@@ -7,8 +7,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2875/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2875/romstage.c
+++ svn/src/mainboard/tyan/s2875/romstage.c
@@ -7,8 +7,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2880/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2880/romstage.c
+++ svn/src/mainboard/tyan/s2880/romstage.c
@@ -7,8 +7,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2881/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2881/romstage.c
+++ svn/src/mainboard/tyan/s2881/romstage.c
@@ -11,8 +11,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2882/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2882/romstage.c
+++ svn/src/mainboard/tyan/s2882/romstage.c
@@ -7,8 +7,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2885/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2885/romstage.c
+++ svn/src/mainboard/tyan/s2885/romstage.c
@@ -6,8 +6,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2891/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2891/romstage.c
+++ svn/src/mainboard/tyan/s2891/romstage.c
@@ -12,8 +12,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s2892/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2892/romstage.c
+++ svn/src/mainboard/tyan/s2892/romstage.c
@@ -11,8 +11,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include "lib/ramtest.c"
Index: svn/src/mainboard/tyan/s2895/romstage.c.orig
===================================================================
--- svn.orig/src/mainboard/tyan/s2895/romstage.c.orig
+++ svn/src/mainboard/tyan/s2895/romstage.c.orig
@@ -13,8 +13,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include <cpu/amd/model_fxx_rev.h>
Index: svn/src/mainboard/tyan/s2912/ap_romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2912/ap_romstage.c
+++ svn/src/mainboard/tyan/s2912/ap_romstage.c
@@ -39,8 +39,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
 
 #include "console/console.c"
Index: svn/src/mainboard/tyan/s2912/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2912/romstage.c
+++ svn/src/mainboard/tyan/s2912/romstage.c
@@ -48,8 +48,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #if CONFIG_USBDEBUG
Index: svn/src/mainboard/tyan/s2912_fam10/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s2912_fam10/romstage.c
+++ svn/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -43,7 +43,6 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
 #include <console/console.h>
 #if CONFIG_USBDEBUG
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
Index: svn/src/mainboard/tyan/s4880/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s4880/romstage.c
+++ svn/src/mainboard/tyan/s4880/romstage.c
@@ -7,8 +7,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/tyan/s4882/romstage.c
===================================================================
--- svn.orig/src/mainboard/tyan/s4882/romstage.c
+++ svn/src/mainboard/tyan/s4882/romstage.c
@@ -6,8 +6,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 
Index: svn/src/mainboard/via/pc2500e/romstage.c
===================================================================
--- svn.orig/src/mainboard/via/pc2500e/romstage.c
+++ svn/src/mainboard/via/pc2500e/romstage.c
@@ -25,8 +25,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/cn700/raminit.h"
Index: svn/src/cpu/amd/dualcore/dualcore.c
===================================================================
--- svn.orig/src/cpu/amd/dualcore/dualcore.c
+++ svn/src/cpu/amd/dualcore/dualcore.c
@@ -6,6 +6,7 @@
 #endif
 
 #include "cpu/amd/dualcore/dualcore_id.c"
+#include <pc80/mc146818rtc.h>
 
 static inline unsigned get_core_num_in_bsp(unsigned nodeid)
 {
@@ -56,8 +57,7 @@ static inline void start_other_cores(voi
 	unsigned nodes;
 	unsigned nodeid;
 
-	if (CONFIG_HAVE_OPTION_TABLE &&
-	    read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0)  {
+	if (read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0))  {
 		return; // disable multi_core
 	}
 
Index: svn/src/cpu/amd/model_10xxx/init_cpus.c
===================================================================
--- svn.orig/src/cpu/amd/model_10xxx/init_cpus.c
+++ svn/src/cpu/amd/model_10xxx/init_cpus.c
@@ -109,13 +109,12 @@ static void for_each_ap(u32 bsp_apicid, 
 	/* get_nodes define in ht_wrapper.c */
 	nodes = get_nodes();
 
-	disable_siblings = !CONFIG_LOGICAL_CPUS;
-
-#if CONFIG_LOGICAL_CPUS == 1 && CONFIG_HAVE_OPTION_TABLE == 1
-	if (read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {	// 0 mean multi core
+	if (!CONFIG_LOGICAL_CPUS ||
+	    read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {	// 0 means multi core
 		disable_siblings = 1;
+	} else {
+		disable_siblings = 0;
 	}
-#endif
 
 	/* Assume that all node are same stepping, otherwise we can use use
 	   nb_cfg_54 from bsp for all nodes */
Index: svn/src/cpu/amd/model_fxx/init_cpus.c
===================================================================
--- svn.orig/src/cpu/amd/model_fxx/init_cpus.c
+++ svn/src/cpu/amd/model_fxx/init_cpus.c
@@ -36,13 +36,12 @@ static void for_each_ap(u32 bsp_apicid, 
 	/* get_nodes define in in_coherent_ht.c */
 	nodes = get_nodes();
 
-	disable_siblings = !CONFIG_LOGICAL_CPUS;
-
-#if CONFIG_LOGICAL_CPUS == 1 && CONFIG_HAVE_OPTION_TABLE == 1
-	if (read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {	// 0 mean multi core
+	if (!CONFIG_LOGICAL_CPUS ||
+	    read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {	// 0 means multi core
 		disable_siblings = 1;
+	} else {
+		disable_siblings = 0;
 	}
-#endif
 
 	/* here I assume that all node are same stepping, otherwise we can use use nb_cfg_54 from bsp for all nodes */
 	nb_cfg_54 = read_nb_cfg_54();
Index: svn/src/northbridge/amd/amdk8/coherent_ht.c
===================================================================
--- svn.orig/src/northbridge/amd/amdk8/coherent_ht.c
+++ svn/src/northbridge/amd/amdk8/coherent_ht.c
@@ -68,6 +68,7 @@
 #include <device/hypertransport_def.h>
 #include <stdlib.h>
 #include "arch/romcc_io.h"
+#include <pc80/mc146818rtc.h>
 
 #include "amdk8.h"
 
@@ -1594,8 +1595,7 @@ static void coherent_ht_finalize(unsigne
 #if CONFIG_LOGICAL_CPUS==1
 	unsigned total_cpus;
 
-	if ((!CONFIG_HAVE_OPTION_TABLE) ||
-	    read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) == 0) { /* multi_core */
+	if (read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) == 0) { /* multi_core */
 		total_cpus = verify_dualcore(nodes);
 	}
 	else {
Index: svn/src/arch/i386/boot/coreboot_table.c
===================================================================
--- svn.orig/src/arch/i386/boot/coreboot_table.c
+++ svn/src/arch/i386/boot/coreboot_table.c
@@ -29,7 +29,7 @@
 #include <version.h>
 #include <device/device.h>
 #include <stdlib.h>
-#if (CONFIG_HAVE_OPTION_TABLE == 1)
+#if (CONFIG_USE_OPTION_TABLE == 1)
 #include <option_table.h>
 #endif
 
@@ -188,7 +188,7 @@ static struct lb_mainboard *lb_mainboard
 	return mainboard;
 }
 
-#if (CONFIG_HAVE_OPTION_TABLE == 1)
+#if (CONFIG_USE_OPTION_TABLE == 1)
 static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header)
 {
 	struct lb_record *rec;
@@ -535,7 +535,7 @@ unsigned long write_coreboot_table(
 	rom_table_end &= ~0xffff;
 	printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end);
 
-#if (CONFIG_HAVE_OPTION_TABLE == 1)
+#if (CONFIG_USE_OPTION_TABLE == 1)
 	{
 		struct lb_record *rec_dest = lb_new_record(head);
 		/* Copy the option config table, it's already a lb_record... */
Index: svn/src/northbridge/amd/amdk8/raminit.c
===================================================================
--- svn.orig/src/northbridge/amd/amdk8/raminit.c
+++ svn/src/northbridge/amd/amdk8/raminit.c
@@ -549,8 +549,7 @@ static void hw_enable_ecc(const struct m
 	if (nbcap & NBCAP_ECC) {
 		dcl |= DCL_DimmEccEn;
 	}
-	if (CONFIG_HAVE_OPTION_TABLE &&
-	    read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
+	if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
 		dcl &= ~DCL_DimmEccEn;
 	}
 	pci_write_config32(ctrl->f2, DRAM_CONFIG_LOW, dcl);
@@ -1102,8 +1101,7 @@ static void order_dimms(const struct mem
 {
 	unsigned long tom_k, base_k;
 
-	if ((!CONFIG_HAVE_OPTION_TABLE) ||
-	    read_option(CMOS_VSTART_interleave_chip_selects, CMOS_VLEN_interleave_chip_selects, 1) != 0) {
+	if (read_option(CMOS_VSTART_interleave_chip_selects, CMOS_VLEN_interleave_chip_selects, 1) != 0) {
 		tom_k = interleave_chip_selects(ctrl);
 	} else {
 		printk(BIOS_DEBUG, "Interleaving disabled\n");
@@ -1406,7 +1404,7 @@ static struct spd_set_memclk_result spd_
 	min_cycle_time = min_cycle_times[(value >> NBCAP_MEMCLK_SHIFT) & NBCAP_MEMCLK_MASK];
 	bios_cycle_time = min_cycle_times[
 		read_option(CMOS_VSTART_max_mem_clock, CMOS_VLEN_max_mem_clock, 0)];
-	if (CONFIG_HAVE_OPTION_TABLE && bios_cycle_time > min_cycle_time) {
+	if (bios_cycle_time > min_cycle_time) {
 		min_cycle_time = bios_cycle_time;
 	}
 	min_latency = 2;
