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[coreboot - Bug #667] (New) mb/lenovo/sklkbl_thinkpad: Enabling SMBus breaks trackpoint with LEN0094 touchpad
by me zohe Oct. 16, 2026

Oct. 16, 2026

Issue #667 has been reported by me zohe. ---------------------------------------- Bug #667: mb/lenovo/sklkbl_thinkpad: Enabling SMBus breaks trackpoint with LEN0094 touchpad https://ticket.coreboot.org/issues/667 * Author: me zohe * Status: New * Priority: Normal * Category: board support * Target version: none * Start date: 2026-10-16 * Affected versions: main * Affected hardware: Lenovo Thinkpad T480 * Affected OS: Linux (tested 6.1.170 and 6.12.111) ---------------------------------------- Change 95640, which enables the SMBus controller, breaks the trackpoint on my T480. The trackpoint and its buttons no longer react to input; the touchpad's PS/2 pass-through port is detected but the trackpoint itself isn't. The breakage seems to be in the EC: after flashing a build of coreboot with SMBus disabled, the trackpoint continues to be invisible until the EC is reset using the reset hole or by removing the batteries. My machine has a different touchpad (LEN0094) than the one that the change was tested with (TM3418-002). ---Files-------------------------------- 95640.config (29.5 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #666] (New) EDK2: MrChromebox uefipayload_2608 broken: uefipayload_2511 works on Lenovo X220
by Patrick Rudolph Oct. 15, 2026

Oct. 15, 2026

Issue #666 has been reported by Patrick Rudolph. ---------------------------------------- Bug #666: EDK2: MrChromebox uefipayload_2608 broken: uefipayload_2511 works on Lenovo X220 https://ticket.coreboot.org/issues/666 * Author: Patrick Rudolph * Status: New * Priority: Normal * Target version: none * Start date: 2026-10-10 ---------------------------------------- tested with coreboot 717c0505b1063da72db9aba2f1f0e1ef6dee60da Works: * uefipayload_2511 Broken: * uefipayload_2608 Seems to hang in payload. Since there's no RS232 serial available, only EHCI debug works, it's not clear why it hangs. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #665] (New) Does EDK2 MrChromeBox support integrated dGPU uga/gop VBIOS file from CBFS?
by Walter Sonius Oct. 15, 2026

Oct. 15, 2026

Issue #665 has been reported by Walter Sonius. ---------------------------------------- Bug #665: Does EDK2 MrChromeBox support integrated dGPU uga/gop VBIOS file from CBFS? https://ticket.coreboot.org/issues/665 * Author: Walter Sonius * Status: New * Priority: Normal * Target version: none * Start date: 2026-10-04 * Affected hardware: Apple MacBookPro10,1 ---------------------------------------- Does EDK2 MrChromebox 26.09.2 load a VBIOS bin file from CBFS added with `CONFIG_VGA_BIOS` and runs it like SeaBIOS does for laptops with dGPU? Tried it with and without the `CONFIG_EDK2_LOAD_OPTION_ROMS:y` setting? For a while EDK2 MrChromeBox payload caries support for loading VBIOS from real physical PCIe dGPU's using `CONFIG_EDK2_LOAD_OPTION_ROMS:y` if they have a matching 64-bit EFI GOP. This has worked fine for me on real desktop boards with PCIe dGPU's from sandybridge to coffeelake both with AMD and NVIDIA dGPU's even combined with libgfxinit intel iGPU's. Currently on coreboot 26.09-14-ge0eec9336f54 for the macbookpro10,1 [CB:32673](https://review.coreboot.org/c/coreboot/+/32673) it works fine with SeaBIOS 1.17. Switching from only Intel to only NVIDIA keeps SeaBIOS bootscreen and makes built-in display, both miniDP and HDMI output work if using NVIDIA. While only using `CONFIG_VGA_BIOS` with `10de,0fd5` a `uefiextract` supplied VBIOS bin and not even using the Kconfig `2nd` or `discrete` VGA options (since the Intel iGPU uses libgfxinit). When using EDK2 MrChromebox 26.09.2 forced to only NVIDIA the built-in display remains off during post/boot (no bunny neither on both miniDP ports nor HDMI port). However the OS nouveau driver detects the VBIOS in its CBFS/ACPI table and all video outputs start working fine including sound output. Currently only Intel iGPU output works fine with EDK2 bootscreen. Any thoughts how to debug or even research if my VBIOS file has a correct EFI GOP in it? By default both EDK2 and SeaBIOS builds are build with libgfxinit support and not using the coreboot way of running the VBIOS from CBFS but let the payload do it which works for SeaBIOS. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #601] (New) superio/nuvoton/npcd378:379 FAN issue sandy/ivy-bridge & haswell on HP
by Walter Sonius Oct. 15, 2026

Oct. 15, 2026

Issue #601 has been reported by Walter Sonius. ---------------------------------------- Bug #601: superio/nuvoton/npcd378:379 FAN issue sandy/ivy-bridge & haswell on HP https://ticket.coreboot.org/issues/601 * Author: Walter Sonius * Status: New * Priority: Normal * Assignee: Patrick Rudolph * Category: board support * Target version: main * Start date: 2025-07-05 * Affected versions: 25.03 * Affected hardware: compaq_8200_elite_sff, compaq_8300_elite_sff, compaq_pro_6300_sff, 260_g1_dm, prodesk_600_g1_sff ---------------------------------------- The NPCD378 HWM FAN control is limited to the PSU FAN only but should work for the "compaq_8200_elite_sff" according to its [commit and instruction](https://review.coreboot.org/c/coreboot/+/26050), which states "... the SuperIO has to be notified that a write is ongoing. After clearing the write-lock bit all changes are applied...". Is there a special command that I missed that "clears the write-lock" or is there a bug and is its current implementation broken? Since adjusting the nvram parameter `sudo nvramtool -w psu_fan_lvl=1-7`and doing a reboot or cold powerup does show that the nvram parameter changes (can be confirmed by coreboot log or reading the nvram parameter after boot again) it never changes the actual PSU FAN speed! Tried multiple coreboot/seabios/edk2 versions the last 3 months on 5 different HP machines and came to the following conclusion. The following nvramtool `psu_fan_lvl=values` reflect the following PWM feedback from the coreboot log: ``` =1 [INFO ] NPCD378: PSU fan PWM 0x37 =2 [INFO ] NPCD378: PSU fan PWM 0x57 =3 [INFO ] NPCD378: PSU fan PWM 0x77 =4 [INFO ] NPCD378: PSU fan PWM 0x97 =5 [INFO ] NPCD378: PSU fan PWM 0xb7 =6 [INFO ] NPCD378: PSU fan PWM 0xd7 =7 [INFO ] NPCD378: PSU fan PWM 0xf8 ``` The following 3 supported sandy/ivy bridge HP variants share the same issue that nvram parameters and coreboot log show the requested manual `psu_fan_lvl` values but its PSU FAN speed won't change according to these values, atleast its FANs keep spinning after post/boot on these machines: ``` VALUE FAN SPEED compaq_8200_elite_sff NPCD378 adjusts remains same compaq_8300_elite_sff NPCD379 adjusts remains same compaq_pro_6300_sff NPCD379 adjusts remains same ``` The following 2 yet uncommited HP Haswell coreboot variants, "HP 260 G1 DM (Desktop Mini) Business PC" and "HP Prodesk 600 G1 SFF" both come with a NPCD379 and both share the same issue with the former 3 variants that the `psu_fan_lvl` value's can be adjusted by nvramtool(if cmos backend is added to the code) and verified during boot or nvramtool that these values have changed with affecting the PSU FAN speed in a undesired way: ``` VALUE FAN SPEED 260_g1_dm NPCD379 adjusts stops spinning prodesk_600_g1_sff NPCD379 adjusts stops spinning ``` These 2 Haswell machines will halt "and stop spinning" the PSU FAN as soon as during post the "PSU fan PWM" value kicks in!!! A side note is needed for the HP 260 G1 DM since it only has a single FAN, so I'm not sure if its CPU or its PSU FAN technically and its OEM BIOS misses a option the adjust FAN speed compared to the other 4 HP models! Another side note for the Prodesk 600 G1 SFF is that I'm forced to use a aftermarket non HP CPU FAN(old Intel CPU FAN), but it keeps spinning after coreboot post. Removing the FAN/HWM code from the superio NPCD378 source, leads to the opposite it will force the PSU FAN to its MAXIMUM speed after poweron but atleast keeps the FAN spinning. This maximum forced full speed FAN behaviour can also be replicated by removing one of the 4 FAN wires, red or white cable not sure anymore. Interesting FAN notes: In case of the "Prodesk 600 G1", swapping its PSU with the PSU from the "compaq_8300_elite_sff" keeps the PSU fan spinning during and after coreboot post but it will still not adjust its PSU FAN speed to its requested values! Also the other way around, putting the PSU of the "Prodesk 600 G1" inside the "compaq_8300_elite_sff" stops the PSU FAN during coreboot post, but running the OEM firmware, keeps the fan spinning and let it adjust to all requested values on its donor FAN. So it seems there is a certain PWM compatibility to control these FAN's in similar ways between these boards. It seems the the newer PSU FAN from the Haswell generation can actually disable / stop spinning on a certain PWM value while older FAN keep spinning on these lower/ same PWM values. Compared to the [initial support commit](https://review.coreboot.org/c/coreboot/+/26050) by Patrick Rudolph, around April 2021 there were some [code](https://review.coreboot.org/c/coreboot/+/52511) [fixes](https://review.coreboot.org/c/coreboot/+/52671) but after that the last time this `psu_fan_lvl` code was verified functional was between 2023-05-02 and 2023-07-03 noted in the [boardsupport commit](https://review.coreboot.org/c/coreboot/+/74906) of the variant `compaq_8300_elite_sff_usdt` by Riku Viitanen. History for "coreboot/src/superio/nuvoton/npcd378" shows [6 patches](https://github.com/coreboot/coreboot/commits/main/src/superio/nuvo… from november 2023 till today. Any tips hints welcome. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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coreboot Meetings Announcement And Agenda Call
by mina＠coreboot.org Oct. 12, 2026

Oct. 12, 2026

Dear coreboot Community, Please be reminded that our upcoming leadership meeting is scheduled for Wednesday, October 14, 2026. [1] Kindly update the meeting agenda with any issues you'd like to discuss during the meeting. [2] Thank you. Best regards, Mina. ## Current Agenda Items * No active issues on the agenda yet. [1](https://coreboot.org/calendar.html). [2](https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkK….

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Dasharo FSP integration status community call on October 13
by 3mdeb Oct. 12, 2026

Oct. 12, 2026

Hi all, I wanted to share this with the coreboot community, as the discussion may be relevant to people interested in Intel FSP, platform initialization, and integration work within open-source firmware stacks. Tomorrow (October 13), at 8:00 PM CEST, the Dasharo team will host the third Dasharo FSP integration status community call. We will present the latest progress on FSP integration in Dasharo, covering implementation status, platform enablement, integration challenges, validation work, and planned next steps. The goal of these public sessions is to share technical progress, discuss implementation challenges, and provide an opportunity for community questions and feedback. Feel free to join the live discussion. Recordings from previous sessions are also available in the event archive. Details and joining information: https://3mdeb.com/events/#_2026_10_13_dasharo-fsp-integration-status -- Pozdrawiam/Best regards, Stanisław Bieniek Specjalista ds. logistyki/Logistics Specialist https://3mdeb.com | @3mdeb_com

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coreboot Meetings Announcement And Agenda Call
by mina＠coreboot.org Oct. 9, 2026

Oct. 9, 2026

Dear coreboot Community, Please note that our upcoming coreboot leadership meeting is scheduled for Wednesday, October 14, 2026. [1] Kindly update the meeting agenda with any issues you'd like to discuss during the meeting. [2] Thank you. Best regards, Mina. [1](https://coreboot.org/calendar.html) [2](https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkK…

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[coreboot - Bug #576] (New) GPIO locking is broken on Kaby Lake and possibly other platforms
by Mate Kukri Oct. 8, 2026

Oct. 8, 2026

Issue #576 has been reported by Mate Kukri. ---------------------------------------- Bug #576: GPIO locking is broken on Kaby Lake and possibly other platforms https://ticket.coreboot.org/issues/576 * Author: Mate Kukri * Status: New * Priority: Normal * Target version: none * Start date: 2025-01-30 ---------------------------------------- Many supported Kaby Lake boards (and possibly newer platforms as well) are vulnerable to [TPM GPIO reset attacks](https://mkukri.xyz/2024/06/01/tpm-gpio-fail.html). Trying to fix this by marking the affected GPIOs as locked in gpio.h and even also selecting `SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS` does not work. This was discovered last year and briefly discussed on #coreboot, but it came up again on the Heads matrix group in relation to supporting the TPM on the in-progress ThinkPad T480 port. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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2026_10_07 coreboot Group Review Session
by mina＠coreboot.org Oct. 5, 2026

Oct. 5, 2026

Hello coreboot! Kindly note that our upcoming group patch review session is scheduled for Wednesday, October 7: https://meet.google.com/kpu-yozw-gtt Check the coreboot calendar for the time in your timezone: https://coreboot.org/calendar.html Here is a link to the list of patches to be reviewed this week: (https://docs.google.com/spreadsheets/d/1io-tewVlkX3PAkhR9ttCKjJXiXR9Emy6qsY…) Add any specific patches you'd like the group to review to the top of the sheet. Since an hour may not be sufficient to address all patches on the list, reviewing patches in advance is greatly appreciated. Thank you. Best regards, Mina.

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Easiest hardware to get started with coreboot
by Ashok Arora Oct. 5, 2026

Oct. 5, 2026

Hi, I was planning to port coreboot to untested motherboards, but due to my recent job, I haven’t been able to spend enough time on it. To scratch my itch of getting some hardware to boot, I’d like to know what you think is the easiest hardware to install coreboot on. Ideally, it would be nice if it also supports Libreboot. Regards*,* A

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