January 2026 - coreboot - mail.coreboot.org

[coreboot - Bug #448] (New) Thinkpad T440P ACPI Battery Value Issues
by Karsten Schnier May 5, 2026

May 5, 2026

Issue #448 has been reported by Karsten Schnier. ---------------------------------------- Bug #448: Thinkpad T440P ACPI Battery Value Issues https://ticket.coreboot.org/issues/448 * Author: Karsten Schnier * Status: New * Priority: Normal * Target version: none * Start date: 2023-01-11 * Affected versions: master * Related links: [[https://github.com/linrunner/TLP/issues/657]] * Affected hardware: Thinkpad T440p * Affected OS: Artix / Arch Linux ---------------------------------------- Hello, I have been having some issues with TLP on my corebooted T440p. I am running artix linux with grub on top of coreboot (self compiled libreboot). I have had issues with the ACPI battery readings. Coreboot does not provide power readings, but instead only current readings. More details can be found in the TLP github issue: [[https://github.com/linrunner/TLP/issues/657#issuecomment-1293730559]] This causes TLP to not recognize the thinkpad and go to default mode. Additional, it prevents recalibration of the battery even when the thinkpad battery driver is forced. Is this due to misconfiguration in the coreboot build or issues with coreboot itself? Thank you! -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

2 1

[coreboot - Bug #598] (New) Lenovo m920x RAM compatibility issue
by Dawid Wrobel April 6, 2026

April 6, 2026

Issue #598 has been reported by Dawid Wrobel. ---------------------------------------- Bug #598: Lenovo m920x RAM compatibility issue https://ticket.coreboot.org/issues/598 * Author: Dawid Wrobel * Status: New * Priority: Normal * Target version: none * Start date: 2025-06-04 * Affected versions: main ---------------------------------------- Hi there, I recently flashed my m902x with coreboot (25.03-643-g69a067a9d62c-dirty). Everything seemed to work fine until I tried upgrading the memory from a single 8GB stick to 2 x 32GB (Crucial CT2K32G4SFD832A, https://eu.crucial.com/memory/ddr4/CT2K32G4SFD832A) The system won't boot in any configuration (a single stick in either slot or both). I get no display out, the system stays on and stuck, apparently, with high CPU usage causing fans to kick in. I have no serial port in this system at the moment (backordered an extension module), but am wondering if it will be of any help and if there's any other way to debug it? Do note that the system *is* capable of running 64GB memory, as it was reported already, so I wonder if this is a matter of some SPD misconfiguration? Crucial lists the 2x16GB modules as compatible with this system (https://eu.crucial.com/compatible-upgrade-for/lenovo/thinkcentre-m920x-tiny…) and they have seemingly identical specs as the 2x32GB ones. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

3 5

[coreboot - Bug #592] (New) Lenovo M920q can't use DIMM2 RAM slot
by Coreboot Enjoyer April 6, 2026

April 6, 2026

Issue #592 has been reported by Coreboot Enjoyer. ---------------------------------------- Bug #592: Lenovo M920q can't use DIMM2 RAM slot https://ticket.coreboot.org/issues/592 * Author: Coreboot Enjoyer * Status: New * Priority: Normal * Category: coreboot common code * Target version: none * Start date: 2025-04-15 * Affected versions: main * Related links: https://github.com/Thrilleratplay/coreboot-builder-scripts/issues/33 Also, it looks like a similar issue to https://ticket.coreboot.org/issues/462 * Affected hardware: Lenovo M920q ---------------------------------------- Building the current coreboot source, as well as commits 497298708c330deb479fbf3ee6a3acc8bff2a102, 640a41f3ee938b794b140218921e0fd63b1d9235 and 7945a31e9172ec2939cc1abc6036962a6efb601b, produces the firmware, that allows to initialize the motherboard if only DIMM1 RAM slot is filled. It fails to initialize, if DIMM1 RAM slot is empty and DIMM2 is filled, as well as if both DIMM1 and DIMM2 are filled. The issue is reproducible with different RAM sticks. I tried every possible combination with Kingston 32GB (2666MHz, CL 19-19-19-43) and Samsung 8GB (2400MHz, CL 17-17-17-39) -- the motherboard recognizes RAM sticks correctly, but still fails when the DIMM2 is filled with any RAM stick. I have also attached the build config file, which uses most of the default options. ---Files-------------------------------- m920q-dimm2-config.txt (27.6 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

6 8

[coreboot - Bug #624] (New) Memory speed in SMBIOS is incorrectly doubled on Haswell
by Ron Nazarov April 6, 2026

April 6, 2026

Issue #624 has been reported by Ron Nazarov. ---------------------------------------- Bug #624: Memory speed in SMBIOS is incorrectly doubled on Haswell https://ticket.coreboot.org/issues/624 * Author: Ron Nazarov * Status: New * Priority: Normal * Assignee: Angel Pons * Target version: none * Start date: 2026-01-21 * Affected versions: main * Affected hardware: Haswell ---------------------------------------- Tested on a Dell Precision T1700 SFF with NRI, my 1600 MT/s (800 MHz) RAM is reported by `dmidecode -t 17` as running at 3200 MT/s. This bug was introduced in https://review.coreboot.org/c/coreboot/+/89598/6. The frequency is doubled in `dimm->ddr_frequency = ddr_freq_mhz * 2; /* In MT/s */`, however (at least on NRI, I did not test MRC), `ddr_freq_mhz` (defined as `(mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100`) is actually in MT/s, and so already doubled. I also see this in coreboot logs: `[DEBUG] memcfg DDR3 clock 1600 MHz`. This debug print (added in https://review.coreboot.org/c/coreboot/+/89599/4) is printing `DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100)`, which is pretty much the same as `ddr_freq_mhz` (except using `DIV_ROUND_CLOSEST`). -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

3 4

[coreboot - Bug #620] (New) X230(t) does not work since commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 was merged
by Hustler One March 22, 2026

March 22, 2026

Issue #620 has been reported by Hustler One. ---------------------------------------- Bug #620: X230(t) does not work since commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 was merged https://ticket.coreboot.org/issues/620 * Author: Hustler One * Status: New * Priority: High * Category: coreboot common code * Target version: main * Start date: 2025-12-31 * Affected versions: main * Related links: https://www.reddit.com/r/coreboot/comments/1pu5vlp/x230t_does_not_get_past_… https://www.reddit.com/r/coreboot/comments/1pyzcvf/no_video_output_with_upd… * Affected hardware: x230t ---------------------------------------- Releases 25.09, 25.12 are affected. 25.06 works. The commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 prevents the x230t from going past the `postcar` stage, hence it being inoperable since it won't load into the main payload. I have attempted to debug using flashconsole but the trail runs cold after `postcar`. Credit to iam_tj for finding the commit. Also, Libreboot is somehow unaffected by this. I don't know if lbmk undoes this commit or not at this time. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

4 4

[coreboot - Support #626] (New) Haswell/T440p: Support for 16GB DDR3L modules with NRI?
by Christian Schrötter March 3, 2026

March 3, 2026

Issue #626 has been reported by Christian Schrötter. ---------------------------------------- Support #626: Haswell/T440p: Support for 16GB DDR3L modules with NRI? https://ticket.coreboot.org/issues/626 * Author: Christian Schrötter * Status: New * Priority: Low * Target version: none * Start date: 2026-01-29 * Affected hardware: T440p ---------------------------------------- There are rumors, that 16GB modules may be supported with NRI, even though the original BIOS nor the MRC blob support them in a T440p. I really wanted to test this myself, but unfortunately with limited success... I have tested two different RAM modules over the last two months: * ~~ZimaBlade - 16GB PC3L-10600S~~ (returned to seller) * Micron MT16KTF2G64HZ-1G6A1 - 16GB PC3L-12800S Both showed identical errors: * The graphics output (via VGA) is mangled and unusable. Only a small "condensed" area is visible. * EDK2 and memtest86+ start successfully (with the mentioned graphics issue), but memtest86+ crashes after a few seconds and causes a reset/reboot. * GRUB2 loads successfully, but Debian (12/13) hangs at some point. Probably during kernel initialization. The 16GB module from Micron starts up in other devices (Igel M340C + Lenovo T450s) without any problems and survives a memtest86+ over several hours. So it doesn't appear to be defective. I then added various other 2/4/8 GB modules in addition to the 16GB module. Funnily enough, this changes the graphics output! Now every second line (each consisting of a few pixels in height) is displayed correctly. Unfortunately, this does not change the fact, that memtets86+ crashes and Debian can't boot. I purchased a USB dongle (with a FT232H chip) specifically to read all Coreboot debug logs and have attached these along with my build configuration for v25.12! I would like to know whether 16GB modules are really not supported in a T440p with NRI, or whether this could be a bug? I am happy to execute further tests or flash specific commits. ---Files-------------------------------- defconfig (650 Bytes) 1769676506-2512-nri-2gb.log (51.8 KB) 1769677242-2512-nri-16gb-bottom.log (137 KB) 1769677400-2512-nri-16gb-top.log (85.4 KB) 1769677514-2512-nri-16gb+2gb.log (152 KB) 1769677649-2512-nri-16gb.log (85.4 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

2 6

[coreboot - Bug #449] (New) ThinkPad T440p fail to start, continous beeping & LED blinking
by Crazy Fox Feb. 21, 2026

Feb. 21, 2026

Issue #449 has been reported by Crazy Fox. ---------------------------------------- Bug #449: ThinkPad T440p fail to start, continous beeping & LED blinking https://ticket.coreboot.org/issues/449 * Author: Crazy Fox * Status: New * Priority: Normal * Category: coreboot common code * Target version: 4.18 * Start date: 2023-01-14 * Affected versions: 4.18 * Affected hardware: haswell ---------------------------------------- Hi, Team Being corebooted before and works fine on 4.17. After flashing 4.18 my t440p wont startup (black screen, constant beeping & LED blinking). I've tried and retried different nconfigs but result is the same. I know that it is lack of information, but I need to recover the laptop first to grab some logs from it. Log from FT232H's debug is attached, the rest of info (defconfig, flashrom command etc. will upload soon) ---Files-------------------------------- coreboot_t440p_emerg.log (7.85 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

4 5

[coreboot - Bug #623] (New) On T480/S, missing P-state data from ACPI tables prevents Xen from performing frequency scaling
by herme herme Feb. 12, 2026

Feb. 12, 2026

Issue #623 has been reported by herme herme. ---------------------------------------- Bug #623: On T480/S, missing P-state data from ACPI tables prevents Xen from performing frequency scaling https://ticket.coreboot.org/issues/623 * Author: herme herme * Status: New * Priority: Normal * Target version: none * Start date: 2026-01-16 * Affected versions: main * Affected hardware: T480/S * Affected OS: QubesOS ---------------------------------------- Hello Currently, P-state data is missing from ACPI tables on T480/S. On my T480S running libreboot, this was confirmed by using the iasl command to decompile the tables at `/sys/firmware/acpi/tables/`; grepping for `_PSS`, `_PCT` and `_PPC` didn't return any results. (Another user)[https://codeberg.org/libreboot/lbmk/issues/394] has confirmed that this is also the case for the similar T480 device, with latest release build of libreboot (26.01 RC1). Meanwhile, in the vendor T480S BIOS, this data is present (contributed by @henk on #coreboot IRC channel): ``` # grep -r -e _PCT -e _PPC -e _PSS *.dsl DSDT.dsl: If (CondRefOf (\_PR.PR00._PPC)) DSDT.dsl: If ((CondRefOf (\_PR.PR00._PSS) && CondRefOf (\_PR.PR00._PPC))) SSDT1.dsl: External (_PR_.PR00._PSS, MethodObj) // 0 Arguments SSDT1.dsl: Name (_PPC, Zero) // _PPC: Performance Present Capabilities SSDT1.dsl: If (CondRefOf (\_PR.PR00._PSS)) SSDT1.dsl: Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States SSDT1.dsl: If (CondRefOf (\_PR.PR00._PSS)) SSDT1.dsl: Return (\_PR.PR00._PSS ()) SSDT1.dsl: If (CondRefOf (\_PR.PR00._PSS)) SSDT8.dsl: If (CondRefOf (\_PR.PR00._PSS)) ``` The Linux kernel doesn't rely on this data to perform frequency scaling, because native support is provided by the intel_pstate driver. However, the Xen kernel lacks this native support. When the data is missing, as in my case, the Xen-based QubesOS runs underclocked and is only barely usable. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

3 5

coreboot Meetings Announcement And Agenda Call
by mina＠coreboot.org Jan. 30, 2026

Jan. 30, 2026

Dear coreboot Community, Please note that our next leadership meeting is scheduled for Wednesday, February 4, 2026. [1] Kindly update the agenda with any issues you'd like to discuss during the meeting. [2] Thank you. Best regards, Mina. [1](https://coreboot.org/calendar.html) [2](https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkK…

1 0

2026_01_28 coreboot Group Review Session
by mina＠coreboot.org Jan. 26, 2026

Jan. 26, 2026

Hello coreboot, We are pleased to announce that our upcoming group patch review session is scheduled for Wednesday, January 28. https://meet.google.com/kpu-yozw-gtt Check the coreboot calendar for the time in your timezone: https://coreboot.org/calendar.html Here is a link to the list of patches to be reviewed this week: (https://docs.google.com/spreadsheets/d/1io-tewVlkX3PAkhR9ttCKjJXiXR9Emy6qsY…) Please add any specific patches you'd like the group to review to the top of the sheet. Since an hour may not be sufficient to address all patches on the list, reviewing patches in advance is greatly appreciated. Thank you. Best regards, Mina.

1 0