December 2025 - coreboot - mail.coreboot.org

coreboot architecture with signed FSP
by Werner Zeh Jan. 1, 2026

Jan. 1, 2026

Dear coreboot community, as some of you may have heard from the OSFC already, there are plans at Intel to restructure the way FSP is executed [1]. The main goal is to switch to an operation mode where only Intel signed FSP binaries can be executed. This comes, according to the current plans, with an architectural change that will affect coreboot's execution flow. In this proposed, changed execution flow a new FSP component will be loaded at reset vector and do the verification of the following FSP components like FSP-T, FSP-M and FSP-S. Then, the execution flow will continue in FSP and calls to coreboot code shall happen. In this new flow, no self-built FSP binaries can be executed anymore as they are not signed by Intel. I want to start a discussion with the community and Intel to see if we can come up with something better than this approach which will not heavily change the coreboot architecture but nevertheless provide a level of confidentiality for Intel's FSP blobs. You all are warmly welcome to participate in this discussion. Feel free to forward this invitation to anyone who might be interested. The call is planned for December 3th at 7 pm CET and will be hosted on Google Meet [2]. Feel free to join and let's have a constructive discussion. Werner [1] https://www.osfc.io/2025/talks/intel-r-signed-fsp-and-verified-boot/ [2] https://meet.google.com/kgh-nquh-usm

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[coreboot - Bug #620] (New) X230(t) does not work since commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 was merged
by Hustler One Jan. 1, 2026

Jan. 1, 2026

Issue #620 has been reported by Hustler One. ---------------------------------------- Bug #620: X230(t) does not work since commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 was merged https://ticket.coreboot.org/issues/620 * Author: Hustler One * Status: New * Priority: High * Category: coreboot common code * Target version: main * Start date: 2025-12-31 * Affected versions: main * Related links: https://www.reddit.com/r/coreboot/comments/1pu5vlp/x230t_does_not_get_past_… https://www.reddit.com/r/coreboot/comments/1pyzcvf/no_video_output_with_upd… * Affected hardware: x230t ---------------------------------------- Releases 25.09, 25.12 are affected. 25.06 works. The commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 prevents the x230t from going past the `postcar` stage, hence it being inoperable since it won't load into the main payload. I have attempted to debug using flashconsole but the trail runs cold after `postcar`. Credit to iam_tj for finding the commit. Also, Libreboot is somehow unaffected by this. I don't know if lbmk undoes this commit or not at this time. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #528] Building `emulation/qemu-i440fx` with `CONFIG_CBFS_VERIFICATION=y` fails
by Nicholas Chin Dec. 27, 2025

Dec. 27, 2025

Issue #528 has been updated by Nicholas Chin. It looks like this affects more than just QEMU. The commit message in CB:74243 does alludes to this; anything that uses `MICROCODE_UPDATE_PRE_RAM` will be affected. This is selected by default for systems that don't select `CPU_INTEL_FIRMWARE_INTERFACE_TABLE`, which seems to be everything pre-Haswell. Those boards do still get a fair amount of activity (especially Sandy Bridge/Ivy Bridge). ---------------------------------------- Bug #528: Building `emulation/qemu-i440fx` with `CONFIG_CBFS_VERIFICATION=y` fails https://ticket.coreboot.org/issues/528#change-2202 * Author: Paul Menzel * Status: New * Priority: Normal * Target version: none * Start date: 2024-03-01 ---------------------------------------- Building a coreboot image for `emulation/qemu-i440fx` with `CONFIG_CBFS_VERIFICATION=y` fails. ``` $ git log --oneline --no-decorate -1 ff2d863515 drivers/intel/gma: Allow SPARK function with side effects $ make savedefconfig $ more defconfig CONFIG_ANY_TOOLCHAIN=y # CONFIG_SEPARATE_ROMSTAGE is not set CONFIG_TIMESTAMPS_ON_CONSOLE=y # CONFIG_USE_BLOBS is not set CONFIG_NO_POST=y CONFIG_USE_EXP_X86_64_SUPPORT=y # CONFIG_PCI_ALLOW_BUS_MASTER is not set CONFIG_CBFS_VERIFICATION=y CONFIG_CONSOLE_SERIAL_921600=y # CONFIG_CONSOLE_QEMU_DEBUGCON is not set CONFIG_PAYLOAD_FILO=y CONFIG_FILO_HEAD=y CONFIG_FILO_USE_AUTOBOOT=y CONFIG_FILO_AUTOBOOT_FILE="hda1:/vmlinuz initrd=hda1:/initrd.img root=/dev/sda1 ro quiet" $ make -j4 […] CC ramstage/arch/x86/boot.o CC ramstage/arch/x86/breakpoint.o LINK cbfs/fallback/postcar.debug LINK cbfs/fallback/bootblock.debug x86_64-linux-gnu-ld.bfd: warning: build/postcar/mainboard/emulation/qemu-i440fx/exit_car.o: missing .note.GNU-stack section implies executable stack x86_64-linux-gnu-ld.bfd: NOTE: This behaviour is deprecated and will be removed in a future version of the linker x86_64-linux-gnu-ld.bfd: warning: build/cbfs/fallback/postcar.debug has a LOAD segment with RWX permissions HOSTCC cbfstool/ifittool (link) HOSTCC cbfstool/ifwitool (link) HOSTCC cbfstool/cse_fpt (link) x86_64-linux-gnu-ld.bfd: warning: build/bootblock/cpu/x86/reset16.o: missing .note.GNU-stack section implies executable stack x86_64-linux-gnu-ld.bfd: NOTE: This behaviour is deprecated and will be removed in a future version of the linker x86_64-linux-gnu-ld.bfd: warning: build/cbfs/fallback/bootblock.debug has a LOAD segment with RWX permissions x86_64-linux-gnu-ld.bfd: build/bootblock/cpu/qemu-x86/cache_as_ram_bootblock.o: in function `cache_as_ram': /dev/shm/coreboot/src/cpu/qemu-x86/cache_as_ram_bootblock.S:46:(.init+0x1f): undefined reference to `walkcbfs_asm' /dev/shm/coreboot/src/cpu/qemu-x86/cache_as_ram_bootblock.S:46:(.init+0x1f): relocation truncated to fit: R_X86_64_PC32 against undefined symbol `walkcbfs_asm' make: *** [src/arch/x86/Makefile.mk:101: build/cbfs/fallback/bootblock.debug] Fehler 1 make: *** Es wird auf noch nicht beendete Prozesse gewartet.... ``` -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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2025-12-24 coreboot Leadership Meetings Canceled
by mina＠coreboot.org Dec. 23, 2025

Dec. 23, 2025

Dear coreboot community, Kindly note that the leadership meetings scheduled for December 24, have been canceled because it falls within the Christmas break. Wishing everyone a Merry Christmas! Thank you. Best regards, Mina. (https://docs.google.com/document/d/17pKpjnAbmxIidKO4YbntT2slqXa4NjQ80abUsjM…)

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[coreboot - Bug #619] (New) Lenovo T480s headphone jack detection is inconsistent - fix for T480 can be applied.
by Oberon 4071 Dec. 23, 2025

Dec. 23, 2025

Issue #619 has been reported by Oberon 4071. ---------------------------------------- Bug #619: Lenovo T480s headphone jack detection is inconsistent - fix for T480 can be applied. https://ticket.coreboot.org/issues/619 * Author: Oberon 4071 * Status: New * Priority: Normal * Target version: none * Start date: 2025-12-09 * Affected versions: 24.12 * Affected hardware: Lenovo T480s * Affected OS: Linux ---------------------------------------- The headphone jack detection on the Lenovo T480s is inconsistent, where at least in the GNOME desktop, the audio doesn't always automatically switch to the headphone jack. There was a recent fix for this issue on the T480 with [Gerrit Change 90023](https://review.coreboot.org/c/coreboot/+/90023) . On my own coreboot builds, I applied the same changes from this Gerrit commit from the file `src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c` to the file `src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c`, and the headphone jack is now working properly on my laptop. It would be great to integrate this change for the T480s into the mainline coreboot sources. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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Linuxbios/Coreboot v1/v2 Early Supported Motherboards/Chips History/Website?
by Roger Dec. 18, 2025

Dec. 18, 2025

Noticing the current Coreboot website has seemingly wiped/deleted all early supported motherboards/chips history, most of which appear to be 32 bit and less architectures. Was just pulling out some old 32bit architecture hardware, figured I try to find what is currently supported via Linuxbios/Coreboot for focusing on for tinkering, noticed the information is all wiped/deleted, except for a page titled Retro-coreboot. Where is all the history of the earlier version 1 and/or version 2 history? Roger

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FSP-S state issue on AMD Cezanne / Renoir
by Joursoir Dec. 17, 2025

Dec. 17, 2025

Hello everyone, I am currently bringing up an AMD Cezanne/Renoir laptop board on coreboot and have run into an FSP-S initialization issue that I am trying to understand better. The board hangs immediately after entering FSP-S. The boot log shows a successful bootblock, romstage, FSP-M, and ramstage, but execution stops right as FSP-S is about to be entered. I suggest that FSP-S crashes or hangs immediately upon entry I found some related information from StarLabs, which appears to describe a similar FSP issue that has not yet been fixed by AMD[1]. From what I can see, the CEZANNE_S.fd file was uploaded about three years ago and has not been updated since. Does anyone know what the underlying problem is here? StarLabs also have a WIP patch[2]. The change description states: "Works perfectly, apart from having no PCI devices." In my case, even disabling almost every device in the devicetree (and physically removing hardware) does not seem to have any effect on the hang. It also looks like most AMD boards currently in the coreboot repository target Chromebooks. Are those boards working correctly with regard to FSP-S? Does anyone know what should be configured so that FSP-S will not crash on Cezanne/Renoir systems? Any insight or guidance would be very helpful. Thank you! [1] https://github.com/StarLabsLtd/firmware/issues/65 [2] https://review.coreboot.org/c/coreboot/+/68338 --- Joursoir

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SeaBIOS is very slow
by nine-ball＠tutanota.com Dec. 17, 2025

Dec. 17, 2025

Hello. I have SeaBIOS on my machine. On QEMU it's very fast. On real hardware, it takes 10+ seconds to register a keypress. How to fix?

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Lenovo Yoga 710-14ikb port successful-- except for keyboard and touchpad
by Moh Kilani Dec. 16, 2025

Dec. 16, 2025

Hi Coreboot community! Hope you are all well. I've managed to port over Coreboot to my Lenovo Yoga 710-14IKB. Everything works, wifi, graphics, Debian, Windows. Used ME cleaner and Deguard. You name it. The only thing I can't seem to figure out is the internal keyboard and touchpad. They work, until Debian boots up and takes over. Then both stop working. Would love some help here! *V/r, * *Moh* *------------------------------------* *206-618-5326* *moh.kilani(a)proton.me* <moh.kilani(a)proton.me> *mjkilani(a)gmail.com* <mjkilani(a)gmail.com>

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2025_12_17 coreboot Group Review Session
by mina＠coreboot.org Dec. 15, 2025

Dec. 15, 2025

Hello coreboot, Kindly note that we have an upcoming group review session scheduled for Wednesday, December 17: https://meet.google.com/kpu-yozw-gtt Check the coreboot calendar for the time in your timezone: https://coreboot.org/calendar.html Here is a link to the list of patches to be reviewed this week: (https://docs.google.com/spreadsheets/d/1io-tewVlkX3PAkhR9ttCKjJXiXR9Emy6qsY…) Please add any specific patches you'd like the group to review to the top of the sheet. Since an hour may not be sufficient to address all patches on the list, reviewing patches in advance is greatly appreciated. Thank you. Best regards, Mina.

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