October 2019 - coreboot - mail.coreboot.org

OpenBSD won't install on an x220 Thinkpad with Coreboot
by Robert Milton April 12, 2020

April 12, 2020

I'm trying to get OpenBSD to install on an x220 Thinkpad with Coreboot/SeaBIOS but I'm running into two problems: the ethernet device doesn't work and OpenBSD doesn't detect my HDD. dmesg said em0 wouldn't load because the EEPROM had an invalid signature. I have no idea why OpenBSD doesn't see my HDD though. It's strange because everything works fine under Linux. And I cannot seem to mount a usb drive under the OpenBSD installer to attach dmesg errors. I originally posted this as a bug report to bug report mailing list but Theo said it would be better suited for Coreboot's and wasn't a bug in OpenBSD.

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Mainboard porting assistance
by Benjamin Doron April 9, 2020

April 9, 2020

Hi all, I own an Acer Aspire VN7-572G and have not been impressed with its OEM firmware. After discovering that it does not utilise Intel's Boot Guard technology, that several Skylake and Kabylake laptops (it has a Skylake chip, but I read that the platforms are similar) have received successful coreboot ports and reading the porting guide on the wiki, I figured that I could give porting coreboot to my laptop a shot. When I was done, I figured that I had an image that might boot so I flashed it to my laptop with a Raspberry Pi and a SOIC clip. However, here's what it does: a) It powers on quietly, as expected; b) The backlight and power LED light up; c) The fans spin up to high and then it stays that way. It does nothing else. The display is dark too. After 15 minutes and a second attempt, I figured that I could no longer blame anything on a long first boot-up and gave up and flashed back to stock. Now, in all honesty I should have tried first without cleaning Intel ME but I find it so much more likely that I did something wrong than that cleaning ME was the sole problem. Can anyone advise me on how to continue? My code is here: https://github.com/benjamindoron/coreboot

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Optiplex 790 now has preliminary support by coreboot
by Taiidan＠gmx.com Jan. 15, 2020

Jan. 15, 2020

https://review.coreboot.org/21774 In case anyone else didn't notice - It is a sandy/ivy system with IOMMU. This is great and should help get coreboot in to the corporate user world.

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Call to FSP_FSP_INIT never returns back
by Naveen Chaudhary Dec. 13, 2019

Dec. 13, 2019

Hi All, Need some guidance. Please read. I am porting coreboot for a "Broadwell D 1519" based motherboard which has both Memory Down as well as 2 DIMM slots. Hence, I built an image for Facebook Watson since its the closest mainboard with no code changes. The call from FSP_FSP_INIT never returns to the ChipsetFspReturnPoint( ). Probably something crashed inside the FSP or something else. This is possibly happening because I have passed no information regarding the RAM chips (down or DIMM) from romstage_fsp_rt_buffer_callback(). I have following 2 questions : 1. How can I see the default values for FSP UDP structure, so that I get to know what I need to modify? BCT tool does not dump that info. 2. In intel/soc/fsp_broadwell/ , the save_dimm_info() is done after FSP_FSP_INIT returns. Shouldn't the SPD details have been fetched before and passed to the FSP_FSP_INIT, as it is this API that handles the memory init. Regards, Naveen

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PCIe Hotplug for Thunderbolt and U.2
by Jeremy Soller Dec. 4, 2019

Dec. 4, 2019

This is to continue the discussion from the coreboot leadership meeting. Thunderbolt devices are not correctly initialized by Coreboot such that the OS can boot without kernel parameters and allow for Thunderbolt hotplugging. Additional bus numbers and memory must be allocated. I will be working on support for this for our System76 mainboards. Here were the notes taken about it during the meeting, see 9 October 2019, PCIe Hotplug on newer Intel socs: https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkKrgK… -- Jeremy Soller System76 Engineering Manager jeremy(a)system76.com

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Looking for INTEL board compatible with Coreboot
by phakt＠elude.in Nov. 21, 2019

Nov. 21, 2019

Hello, on FreeBSD forum there was a discussion about "FreeBSD friendly Motherboard compatible with Coreboot" link: https://forums.freebsd.org/threads/freebsd-friendly-motherboard-compatible-… the INTEL boards compatible with Coreboot seems to be: - Gigabyte GA-B75M-D3H - Asrock E350M1 does anyone know better options? another question still looking for answer: using flashrom if you type: -L | --list-supported print supported devices it says: Supported flash chips (total: 391): can someone check output and tell which are the best boards? Thanks

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[AMD 16h / ASUS AM1I-A] 1866MHz CL9 RAM runs only as 1333MHz CL9 - how to fix?
by Mike Banon Nov. 17, 2019

Nov. 17, 2019

A pair of 1866MHz CL9 RAM modules* runs only as 1333MHz CL9 on 16h AM1I-A with coreboot is installed, but worked faster when a proprietary UEFI was installed. To fix this "turtle RAM" coreboot problem I tried to play with buildOpts.c - https://review.coreboot.org/c/coreboot/+/33920 , but the things like "#define BLDCFG_MEMORY_CLOCK_SELECT DDR1866_FREQUENCY" sadly did not help. Any ideas how to improve the RAM speeds? How I can force this RAM to run faster? Best regards, Mike Banon [*] Crucial Ballistix Tactical Series DDR3 1866MHz CL9 (PC3-14900 9-9-9-24) UDIMM 240-Pin modules, part number BLT8G3D1869DT1TX0

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LAVA support
by Wim Vervoorn Nov. 1, 2019

Nov. 1, 2019

Hello, The coreboot site refers to the LAVA site as the QA system. It looks like some attempts have been made and then abandoned. Does anyone know the current status? Did this not work out or is there another reason not to add additional platforms to the environment? Best regards, Wim

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Any live usb for recovery flash coreboot?
by Dalao Oct. 31, 2019

Oct. 31, 2019

Hi, I was using Seabios but recently switched to Tianocore. However, the tianocore can't boot my Manjaro linux distribution which was installed using the non-uefi method. So I want to flash back. I only have a Manjaro live usb at hand. The tianecore can boot it. However this live usb is not set with iomem=relaxed, so I can't read or write the bios using flashrom. I don't know how to set the live usb's grub settings because when it boots, it's already running commands. When using this tianocore with vgabios I can't see the grub screen when booting. So how to set the live usb with iomem=relaxed? Is there any live usb that already have the iomem=relaxed set? Could anyone help me build a usb image dedicated for automatically recover flashing?

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Coreboot FSP fails to initialize RAM - "Configuration not in POR table"
by Naveen Chaudhary Oct. 31, 2019

Oct. 31, 2019

I am using Faceboot Watson image (with no code changes) on a custom BroadwellDE based motherboard. Current the FSP_FSP_INIT api never returns back. I enabled the FSP logs and got the following messages : bootMode = NormalBoot subBootMode = ColdBoot Dispatch Slaves -- Started Dispatch Slaves - 0ms Promote Warning Exception List -- Started Promote Warning Exception List - 0ms Initialize Throttling Early -- Started Initialize Throttling Early - 0ms Detect DIMM Configuration -- Started Checkpoint Code: Socket 0, 0xB0, 0x00, 0x0000 N0: IMC 0 SMB Clock Period = 0x1F2C Socket | Channel | DIMM | Bus Segment | SMBUS Address -------|---------|------|--------------|-------------- 0 | 0 | 0 | 0 | 0 - Present N0.C0.D0: NVDIMM:N(380)=0x0 0 | 0 | 1 | 0 | 1 - Not Present 0 | 1 | 0 | 0 | 2 - Present N0.C1.D0: NVDIMM:N(380)=0x0 0 | 1 | 1 | 0 | 3 - Not Present Entering no zone 1 Detect DIMM Configuration - 238ms Get Slave Data -- Started Get Slave Data - 0ms Check POR Compatibility -- Started primaryWidthDDR4: 1, rowBitsDDR4: 16, columnBitsDDR4: 10, bankGroupsDDR4: 4 primaryWidthDDR4: 1, rowBitsDDR4: 16, columnBitsDDR4: 10, bankGroupsDDR4: 4 Unknown DIMM population Check POR Compatibility - 17ms Initialize DDR Clocks -- Started Checkpoint Code: Socket 0, 0xB1, 0x00, 0x0000 Configuration not in POR table! Memory Configuration: Vdd = 3, procType = 0x5066, socketType = 3, dramType = 12, spc = 2, dpc = 1, dimmType = 5, numRanks = 2 GetPORDDRFreq returns ddrfreq = 255 N0.C0: FPT: DisableChannel() N0.C0.D0: FPT: DisableDIMM() A warning has been logged! Warning Code = 0x7, Minor Warning Code = 0x8, Data = 0xFFFF S0 Ch0 Warning upgraded to Fatal Error! FatalError: SocketId = 0 registered Major Code = 0x 7, Minor Code = 0x 8 What does "Configuration not in POR table mean? Does this mean that FSP can no longer initialize my DRAM automatically? If yes, what's the solution here? Or shall I try tweaking other settings such as MemEccSupport, MemDdrMemoryType, etc. Regards, Naveen

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