June 2013 - coreboot - mail.coreboot.org

Re: [coreboot] what board should i buy ?
by Paul Menzel June 12, 2013

June 12, 2013

Am Mittwoch, den 12.06.2013, 01:00 +0300 schrieb matti christensen: > how about - say - wyse s50 thin client that is supported according to > your pages ? > > i would like to find something cheap, small power consumption, small size ... I can also recommend the ASRock E350M1 [1]. Thanks, Paul [1] http://www.coreboot.org/ASRock_E350M1

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Re: [coreboot] what board should i buy ?
by ron minnich June 12, 2013

June 12, 2013

wyse 50? Kind of an antique? I still like these: http://www.gizmosphere.org/ modern, supported, open. ron

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Re: [coreboot] what board should i buy ?
by matti christensen June 11, 2013

June 11, 2013

how about - say - wyse s50 thin client that is supported according to your pages ? i would like to find something cheap, small power consumption, small size ... /mc ---keep-IT-simple---

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Chromebooks overview
by Tim Zander June 11, 2013

June 11, 2013

Hi, try to collect information about the chromebooks to write things up in the wiki. Which of the following things are true (for the lastest coreboot version): 0. all 5 Chromebooks are supported by coreboot (http://www.google.com/intl/en/chrome/devices/chromebooks.html) Ok 5 names show in the config menu, so are there maybe unsupported older version of the chromebooks (ones with other working names then 1. Butterfly (BOARD_GOOGLE_BUTTERFLY) (NEW) 2. Link (BOARD_GOOGLE_LINK) (NEW) 3. Parrot (BOARD_GOOGLE_PARROT) (NEW) 4. Snow (BOARD_GOOGLE_SNOW) (NEW) 5. Stout (BOARD_GOOGLE_STOUT) (NEW)! 1. all chromebooks need to be flashed by an external programmer to get your own coreboot version (and payload) running (but it is doable without breaking things) Is there information about where the spi chips can be found? +++++Offtopic++++++ which ones don't require any proprietary drivers? +++++offtopic++++++ Thanks Tim

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i82801gx: SMI from "GPE0_STS: USB1"
by Константин Аладышев June 11, 2013

June 11, 2013

Hello! I have some troubles with southbridge i82801gx. I can boot Windows on my board, but S3 from OS doesn't work properly if i resume with USB keyboard. In this case, i have Wake signal and coreboot starts to boot, but it stucks with endless messages about SMI# "GPE0_STS: USB1": .. SMI# #0 GPE0_STS: USB1 SMI# #0 GPE0_STS: USB1 SMI# #0 GPE0_STS: USB1 ... These messages come from file "\southbridge\intel\i82801gx\smihandler.c", function "dump_gpe0_status". According to i82801gx datasheet: ___ USB1_STS - R/WC. Software clears this bit by writing a 1 to it. 0 = USB UHCI controller 1 does Not need to cause a wake. 1 = Set by hardware when USB UHCI controller 1 needs to cause a wake. Wake event will be generated if the corresponding USB1_EN bit is set. ___ Clearing of GPE0_STS bits properly done in function reset_gpe0_status /** * @brief read and clear GPE0_STS * @return GPE0_STS register */ static u32 reset_gpe0_status(void) { u32 reg32; reg32 = inl(pmbase + GPE0_STS); /* set status bits are cleared by writing 1 to them */ outl(reg32, pmbase + GPE0_STS); return reg32; } So... i can't really understand, why does this SMI# appear again and again? Thanks, Aladyshev Konstantin.

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what board should i buy ?
by matti christensen June 11, 2013

June 11, 2013

Hello i would like to have an open source system - that is the issue. i'm a minimalist = there is no need for gigahetzes there may not be a single intel branded chip or gizmo on the board ( via, amd or whatever else ) Many thanks for your comments /mc

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Re: [coreboot] i would like to get coreboot working on VIA PC2500E
by Peter Stuge June 10, 2013

June 10, 2013

matti christensen wrote: > i broke the motherboard = once again tried to change the bios chip > and ripped socket off the board Oops! :\ > i really am nearly crying - i am 56 years old and it appears that i > am never gonna have a truly free system It might still be possible to repair the mainboard, but it is always easiest to start out with a mainboard that is already well supported and then go further from there. //Peter

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Chip model thinkpad x60s
by Tim Zander June 10, 2013

June 10, 2013

Dear Corebooters, I want to flash coreboot onto my x60s. Is the only way to find out the chip model of my x60s by disassembling and inspecting? If I have the data written on my chip, what I have to then to find the information necessary to do the first part of the flashing instruction of http://www.coreboot.org/Lenovo_x60x ? What do I need to change in the patch then? Or don't I need to find out about the chip: http://www.coreboot.org/pipermail/coreboot/2013-January/073801.html? You see I'm totally confused thanks for enlightment. Best wishes, Tim <http://www.coreboot.org/Lenovo_x60x>

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Re: [coreboot] haswell+lynxpoint c226 SATA disk can't link
by Iurie June 10, 2013

June 10, 2013

so, what is ur question? can u please tell which is properly the cpu and mobo? On 10 June 2013 03:00, 朱晓元 <rogerzhu1127(a)gmail.com> wrote: > Hi, > > CPU: haswell > chipset:lynxpoint c226 > I use Intel wtm2 board. > SATA controller in ahci mode. > disk can be detect but no phy link. > log file see attach. > > Thanks! > roger > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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Re: [coreboot] i would like to get coreboot working on VIA PC2500E
by Nico Huber June 10, 2013

June 10, 2013

Hello Matti, > - the basic issue is that after following your pages, coreboot won't boot I'm sorry to hear that. There can be many things going wrong (configuration, missing files, toolchain failing). I'm not familiar with the PC2500E but maybe I can help checking your configuration. Please paste your coreboot's .config, and .config of libpayload (normally in payloads/libpayload/), and .config of FILO (payloads/external/FILO/filo/). Did you add a VGA BIOS to coreboot? If not, you might just not seeing anything, even if coreboot boots. AFAIK, without a VGA BIOS, you won't see anything until Linux loads the openchrome driver. > - i have not yet tried to get output w serial console but try to > follow previous hint to do 'make crossgcc' The serial output of coreboot is always worth a look if something goes wrong. If rebuilding coreboot with the reference toolchain doesn't help, this is where to start, IMO. > - as i try to do 'make crossgcc' the system appears to go to loop = > now it has been trying for an hour with only output on attached > make_crossgcc_out / make_crossgcc_err There was a bug just fixed in upstream coreboot [1]. I guess, it is what was causing the loop you experienced. Please try again with current coreboot master. If you didn't change any coreboot source, you can just do git pull in your coreboot directory. If you did changes, commit them and try to rebase git fetch origin master git rebase FETCH_HEAD Then build crossgcc and rebuild coreboot: make crossgcc # Takes some time, but you should see more output make clean make I hope that helps, Nico [1] http://review.coreboot.org/3418

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