November 2004 - coreboot - mail.coreboot.org

Does linux kernel parse linuxbios table?
by Liu Tao Jan. 14, 2005

Jan. 14, 2005

Hello Eric, I searched the linux kernel mail archive and found your patch for x86 boot linuxbios support, but I didn't find the linuxbios table parse code in linux-2.6.8.1, does linux kernel still parse the linuxbios table now? Regards, Liu Tao

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low level shell
by Bryan E. Chafy Jan. 7, 2005

Jan. 7, 2005

Apologies if this is a redundant contribution. None of my pc motherboards have JTAG or HW debug capabilites. And constantly (hot)flashing, changing ram init code, then (hot)flashing again gets old really fast. Looking around, I couldnt find any debug tools that would operate at basically the reset vector level. I thought this was the goal of openbios, but I got lost in all the jibberish about 4th and firmware standards. So I set out to make a small interactive low level shell with the goal of providing at least some tools to aid in board/memory bringup and debugging. This was nontrivial given the system limitations, however I got a few things to work. Attached is llshell.inc (for linuxbios1, Ive not tried any of the new stuff yet) and llshell_linux (for running/testing inside of linux). It's written entirely in asm and can run in a memoryless early stage (say at the beginning of ram_set_registers or points afterword). List of commands: beep -- pc speaker beep rst (or RST) -- reset out(b,w,l) <val> <port> -- raw out val at port in(b,w,l) <port> -- show raw port value jmp <address> -- jmp to address (llshell addr is in eax) call <address> -- funcion call (assumes a working stack) cli -- clear interrupts sti -- enable interrupts push <value> -- push value onto stack pop -- pop from stack and display wm(b,w,l) <addr> <val> -- write mem dm <addr> <lines> -- dump mem mcp <src> <dst> <size> -- mem copy mpat <pat> <dst> <size> -- mem pattern memt <begin> <end> -- memory test pcir(b,w,l) <loc> -- pci read config pciw(b,w,l) <loc> <val> -- pci write config dl <addr> <size> -- memory download (display xor cheksum at completion) cram <addr> <size> -- enable cache to be ram (experimental) baud <val> -- change baudrate (not yet implemented) exit -- exit shell All values in hex (0x prefixing ok)

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RE: boot linux from an ide
by YhLu Dec. 28, 2004

Dec. 28, 2004

Just remind: His MB has E7501 .... So first step is make freebios2 work on that. He may need to copy Tyan S2735 to make his MB copy at first. Then he ..... Regards YH -----Original Message----- From: Ronald G. Minnich [mailto:rminnich@lanl.gov] Sent: Wednesday, October 27, 2004 12:11 PM To: Steve Kimball Cc: Gin; linuxbios(a)clustermatic.org Subject: Re: boot linux from an ide On Wed, 27 Oct 2004, Steve Kimball wrote: > To use FILO or Etherboot you change the payload. > So you need to change the > freebios2/targets/<vendor>/<board>/Config.lb > file to point to the FILO or Etherboot payload > and make linuxbios.rom. don't forget you can make your own! I have targets/arima/hdama/Config.filo.lb and I do this: ./buildtarget arima/hdama/Config.filo.lb File is this: # Sample config file for the Arima HDAMA target hdama.filo mainboard arima/hdama romimage "normal" option USE_FALLBACK_IMAGE=0 option ROM_IMAGE_SIZE=0x10000 option LINUXBIOS_EXTRA_VERSION=".0Normal" payload /opt/filo/normal/filo.elf end romimage "fallback" option USE_FALLBACK_IMAGE=1 option ROM_IMAGE_SIZE=0x10000 option LINUXBIOS_EXTRA_VERSION=".0Fallback" payload /opt/filo/fallback/filo.elf end buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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i845GB MB progress
by zhu shi song Dec. 18, 2004

Dec. 18, 2004

rtl8139 on my i845GV MB still can't work. Who know the meaning of post code of linux? I saw linux last post code was 99, using vendor's bios linux last post code was 97. I want to know the difference. tks zhu __________________________________ Do you Yahoo!? The all-new My Yahoo! - Get yours free! http://my.yahoo.com

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strange prink_debug output with dev_path
by YhLu Dec. 1, 2004

Dec. 1, 2004

What is the difference between printk_debug("smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link ); printk_debug("%s", dev_path(dev)); and printk_debug("smbus: %s[%d]->%s", dev_path(dev->bus->dev), dev->bus->link , dev_path(dev)); the first print smbus: PCI: 01:01.1[0]->I2C: 50 the second one print smbus: PCI: 01:01.1[0]-> PCI: 01:01.1 YH

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RE: get_pbus
by YhLu Nov. 30, 2004

Nov. 30, 2004

You mean to access extra reg space (4096 bytes) for PCI-E device? We don't need to touch that extra space ....in LinuxBIOS. Under LinuxBIOS + kernel + IB driver, the IB adapter works well with S289x. need to create one entry in mptable for the device. Otherwise it can not get INT. Currently I can not make MSI work....Kernel 2.6. YH

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MATLAB with Clustermatic
by Reza Shahidi Nov. 30, 2004

Nov. 30, 2004

Hello: We have set up Clustermatic 5 on a small five-node cluster, and want to install a parallel implementation of MATLAB. Which would you recommend? MATLAB*P and STAR-P looked good, but I haven't been able to find anywhere to download them. Both ease of coding and running speed are important. If you have any experience or suggestions, could you respond? Thanks, Reza

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What's next?
by Stefan Reinauer Nov. 30, 2004

Nov. 30, 2004

Hi, I am still having problems scanning the noncoherent chains connected to CPU1-3 of the motherboard I am working to support. I could temporarily work around this issue by setting the Config Base and Limit registers of those links to 0. Otherwise collapsing the chain when setting up that CPU fails. I set the Config Base and Limit registers like this: PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x04000103, PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0xff050213, since there's bus 0-4 on cpu0 when i don't scan cpu1 Looking at incoherent_ht.c there are two functions that are very similar: static int ht_setup_chain(device_t udev, unsigned upos) static int ht_setup_chains(const struct ht_chain *ht_c, int ht_c_num) the first one warns: #warning "FIXME handle multiple chains!" Should we not drop ht_setup_chain in favour of ht_setup_chains? Also later on it dies apparently in amdk8_scan_chains in northbridge/amd/amdk8/northbridge.c. Something is severely wrong with my link setup, but I double checked where the coherent and non coherent links hang off of.. Pointers? Stefan. LinuxBIOS-1.1.7.0-fallback Thu Nov 25 21:58:33 CET 2004 starting... setting up resource map....done. 04 nodes initialized. udev=(0,0x18,0) 0xb4=00ff0000bus=00 id =74501022 bus=00 id =74601022 udev=(0,0x18,0) 0x94=00000000bus=00 id =74501022 bus=00 id =74601022 udev=(0,0x18,0) 0x94=00000000bus=00 id =74501022 bus=00 id =74601022 udev=(0,0x18,0) 0x94=00000000bus=00 id =74501022 bus=00 id =74601022 PCI: 00:01.00 PCI: 00:01.01 PCI: 00:02.00 PCI: 00:02.01 PCI: 00:03.00 PCI: 00:04.00 PCI: 00:04.01 PCI: 00:04.02 PCI: 00:04.03 PCI: 00:04.05 PCI: 00:04.06 PCI: 00:18.00 PCI: 00:18.01 PCI: 00:18.02 PCI: 00:18.03 PCI: 00:19.00 PCI: 00:19.01 PCI: 00:19.02 PCI: 00:19.03 PCI: 00:1a.00 PCI: 00:1a.01 PCI: 00:1a.02 PCI: 00:1a.03 PCI: 00:1b.00 PCI: 00:1b.01 PCI: 00:1b.02 PCI: 00:1b.03 ht reset - Ram1.00 Ram1.01 Ram1.02 Ram1.03 Ram2.00 Ram2.01 Ram2.02 Ram2.03 Ram3 Initializing memory: done Initializing memory: done Initializing memory: done Initializing memory: done Clearing initial memory region: done Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.7.0-fallback Thu Nov 25 21:58:33 CET 2004 booting... Enumerating buses... PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] bus ops PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: 00:19.0 [1022/1100] bus ops PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled PCI: 00:1a.0 [1022/1100] bus ops PCI: 00:1a.0 [1022/1100] enabled PCI: 00:1a.1 [1022/1101] enabled PCI: 00:1a.2 [1022/1102] enabled PCI: 00:1a.3 [1022/1103] ops PCI: 00:1a.3 [1022/1103] enabled PCI: 00:1b.0 [1022/1100] bus ops PCI: 00:1b.0 [1022/1100] enabled PCI: 00:1b.1 [1022/1101] enabled PCI: 00:1b.2 [1022/1102] enabled PCI: 00:1b.3 [1022/1103] ops PCI: 00:1b.3 [1022/1103] enabled PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 HyperT reset not needed PCI: pci_scan_bus for bus 1 PCI: 01:01.0 [1022/7450] bus ops PCI: 01:01.0 [1022/7450] enabled PCI: 01:01.1 [1022/7451] ops PCI: 01:01.1 [1022/7451] enabled PCI: 01:02.0 [1022/7450] bus ops PCI: 01:02.0 [1022/7450] enabled PCI: 01:02.1 [1022/7451] ops PCI: 01:02.1 [1022/7451] enabled PCI: 01:03.0 [1022/7460] bus ops PCI: 01:03.0 [1022/7460] enabled PCI: 01:04.0 [1022/7468] bus ops PCI: 01:04.0 [1022/7468] enabled PCI: 01:04.1 [1022/7469] ops PCI: 01:04.1 [1022/7469] enabled PCI: 01:04.2 [1022/746a] bus ops PCI: 01:04.2 [1022/746a] enabled PCI: 01:04.3 [1022/746b] bus ops PCI: 01:04.3 [1022/746b] enabled PCI: 01:04.5 No device operations PCI: 01:04.6 [1022/746e] enabled PCI: pci_scan_bus for bus 2 PCI: pci_scan_bus returning with max=02 PCI: pci_scan_bus for bus 3 PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus for bus 4 PCI: 04:00.0 [1022/7464] enabled PCI: 04:00.1 [1022/7464] enabled PCI: 04:00.2 No device operations PCI: 04:01.0 No device operations PCI: 04:04.0 [1002/4752] enabled PCI: 04:05.0 [8086/1209] enabled PCI: pci_scan_bus returning with max=04 PNP: 002e.0 enabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled I2C: 70 enabled I2C: 50 enabled I2C: 51 enabled I2C: 52 enabled I2C: 53 enabled I2C: 54 enabled I2C: 55 enabled I2C: 56 enabled I2C: 57 enabled PCI: pci_scan_bus returning with max=04

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Alignment of LinuxBIOS table structures
by Stefan Reinauer Nov. 30, 2004

Nov. 30, 2004

Hi, I got an interesting report today from a customer having problems with building LinuxBIOS and the payload with different compilers The problem is that different compilers handle structure alignment differently, ie 2.95.x and 3.x have fundamental differences here: Adding __attribute__ ((packed)) to the structures helps: struct lb_memory_range { uint64_t start; uint64_t size; uint32_t type; #define LB_MEM_RAM 1 /* Memory anyone can use */ #define LB_MEM_RESERVED 2 /* Don't use this memory region */ #define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ } __attribute__ ((packed)); struct lb_memory { uint32_t tag; uint32_t size; struct lb_memory_range map[0]; } __attribute__ ((packed)); Since this is a table that is passed in memory, we do want it to be exactly as it is defined, with no extra padding of any kind to make it reliable information. So I consider adding __attribute__ ((packed)) a good solution for the problem. If I get no good reasons against adding this, I will check it in later Stefan

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Any one have a "How to" on vga?
by Adam Talbot Nov. 30, 2004

Nov. 30, 2004

OK, can any one give me a quick how to on setting up VGA? I have the system booting, kinda, and I would like to see if can get the VGA bios loaded.

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