May 2003 - coreboot - mail.coreboot.org

Laptops?
by Klemens Mantzos June 24, 2003

June 24, 2003

I read an articel about the Linux BIOS Project in the Linux-Magazin (German)----It's great!!!!!!!!!!!! What i want to know is: "Does anybody think about using in Workstations/Laptops?????". CU ------------------------------------- Klemens Mantzos Dynatools Communication Services GmbH Schopenhauerstrasse 36 1180 Wien Tel: +43-1-4031600 Fax: +43-1-4031600-34 mailto:klemens.mantzos@dynatools.com http://www.dynatools.com http://www.projectmaker.at http://www.dynaweb.at -------------------------------------

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config language
by ron minnich June 12, 2003

June 12, 2003

Eric has pointed out to me that we need a tree to properly describe the new complex systems such as K8. The current config language is not sufficient to do the job. I've been thinking about mods to the language that preserve the current simplicity for the vast majority of motherboards out there, while at the same time allowing a complex hierarchy to be described. I think I have an idea. Currently we say things like this: southbridge vendor/model ... superio vendor/model ... This syntax is actually sufficient for something like 95% of the motherboards we need to support. But what if we have southbridge vendor/model ... southbridge vendor/model ... superio vendor/model ... which southbridge is the superio on? Here is my proposed change southbridge vendor/model[=<tag>] [parent=<tag>] ... superio vendor/model[=<tag>] [parent=<tag>] ... (note this syntax applies to all the types of parts) Consider the simple case. The one southbridge is given a default tag of southbridge, with the default parent of northbridge. The superio is given the default tag of superio, with the default parent of southbridge. It all works. Consider the hard case. southbridge intel/xyz=sb1 ... southbridge intel/xyz=sb2 ... superio NSC/abs parent=sb1 ... If there is more than one northbridge, then we can set the parent tag for the southbridge. This syntax allows arbitrary trees to be described; it is as simple in the base case as the current one; and it should be fairly straightforward to implement. Computing the path to a given part is then easy. Some flexibility in the tags should be possible. The tag could allude to an actual tag, or a part type (southbridge), or a part vendor/manufacturer pair (intel/xyz). As long as the tag specifies something unique, it should be acceptable. Another way to do it is this: southbridge [tag=<tag>] [parent=<tag>] any preference for syntax? Comments? ron

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[9fans] 4-node plan9 cluster (fwd)
by ron minnich May 31, 2003

May 31, 2003

just FYI, linuxbios + plan9 cluster. ron ---------- Forwarded message ---------- Date: Fri, 30 May 2003 13:31:32 -0600 (MDT) From: andrey mirtchovski <mirtchov(a)cpsc.ucalgary.ca> Reply-To: 9fans(a)cse.psu.edu To: 9fans(a)cse.psu.edu Subject: [9fans] 4-node plan9 cluster this is the cluster Ron will show on usenix: http://pages.cpsc.ucalgary.ca/~mirtchov/p9/cluster/ andrey

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[PATCH] XIP for low address (0xf0000) support
by SONE Takeshi May 31, 2003

May 31, 2003

Ron, please apply this patch. It should not break anything, and significantly speeds up booting of certain boards like EPIA. This patch does two things: - Add write-through cache for 0xf0000-0xfffff before uncompressing linuxbios_c, if option XIP_LOW is defined. - Changes existing XIP (execute in place) code to use write-through cache instead of write-protect cache. (as Eric suggested) -- Takeshi Index: earlymtrr.inc =================================================================== RCS file: /cvsroot/freebios/freebios/src/cpu/p6/earlymtrr.inc,v retrieving revision 1.4 diff -u -r1.4 earlymtrr.inc --- earlymtrr.inc 8 Aug 2001 02:45:09 -0000 1.4 +++ earlymtrr.inc 31 May 2003 14:59:56 -0000 @@ -35,6 +35,22 @@ movl $0x06060606, %edx movl $0x06060606, %eax wrmsr + +#ifdef XIP_LOW + /* enable write through cache for 0xf0000-0xfffff*/ + movl $MTRRfix4K_F0000_MSR, %ecx + rdmsr + movl $0x04040404, %edx + movl $0x04040404, %eax + wrmsr + + movl $MTRRfix4K_F8000_MSR, %ecx + rdmsr + movl $0x04040404, %edx + movl $0x04040404, %eax + wrmsr +#endif /* XIP_LOW */ + #endif /* MEMORY_HOLE */ set_var_mtrr: @@ -56,12 +72,12 @@ wrmsr #if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE) - /* enable write protect caching so we can do execute in place + /* enable write through caching so we can do execute in place * on the flash rom. */ movl $0x202, %ecx xorl %edx, %edx - movl $(XIP_ROM_BASE | 0x005), %eax + movl $(XIP_ROM_BASE | 0x004), %eax wrmsr movl $0x203, %ecx

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SiS630 Watchdog driver
by Alexander Amelkin May 30, 2003

May 30, 2003

Hello guys! Coming back to the old topic of the SiS630 watchdog driver, I must say that I found a ready one. Available as a patch here: http://www.linuxlabs.com/LinuxBIOS/patches/sis630-wd-2.4.x.patch The driver is kind of 'risky' as it doesn't check for the presence of the SiS630 chipset but, in case if we're cautious, it may be working and useful. It would be nice if someone tested it as I don't have the board right now. With best regards, Alexander mailto:spirit@reactor.ru

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help: serial port and keyboard not work
by bonboncat8888 May 30, 2003

May 30, 2003

Hi, My mainboard is GX1+5530A+97317. After boot from linuxbios+linux-2.4.20, eth0 and USB work fine but keyboard not work and linux seems can't receive data from serial port(I can see output from SERIAL_CONSOLE). Please help me. Thanks! /////////////////////////////////////////////// LinuxBIOS-1.0.0 Fri May 30 17:07:05 CST 2003 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00001000 Component Banks: 4 Module Banks: 1 DIMM size: 04000000 Probing for DIMM1 Memory sizing done, MC_BANK_CFG = 0x00701420 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Fri May 30 17:07:05 CST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] PCI: 00:0f.0 [10ec/8139] PCI: 00:12.0 [1078/0100] PCI: 00:12.1 [1078/0101] PCI: 00:12.2 [1078/0102] PCI: 00:12.3 [1078/0103] PCI: 00:12.4 [1078/0104] PCI: 00:13.0 [0e11/a0f8] PCI: pci_scan_bus returning with max=00 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:0f.0 10 <- [0x00001000 - 0x000010ff] io PCI: 00:0f.0 14 <- [0xfebfd000 - 0xfebfd0ff] mem PCI: 00:12.1 10 <- [0xfebfe000 - 0xfebfe0ff] mem PCI: 00:12.2 20 <- [0x00001400 - 0x0000147f] io PCI: 00:12.3 10 <- [0xfebff000 - 0xfebff07f] mem PCI: 00:12.4 10 <- [0xfebfb000 - 0xfebfbfff] mem PCI: 00:13.0 10 <- [0xfebfc000 - 0xfebfcfff] mem ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 07 PCI: 00:0f.0 cmd <- 03 PCI: 00:12.0 cmd <- 0f PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 cmd <- 01 PCI: 00:12.3 cmd <- 02 PCI: 00:12.4 cmd <- 03 PCI: 00:13.0 cmd <- 02 done. Initializing PCI devices... PCI devices initialized DIMM0: 64MB (4kB page size, 4 component banks, 1 module banks) DIMM1: empty Reserving 4096kB for video memory BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 totalram: 60M Initializing CPU #0 Enabling cache...done. Max cpuid index : 2 Vendor ID : Geode by NSC Processor Type : 0x00 Processor Family : 0x05 Processor Model : 0x04 Processor Mask : 0x00 Processor Stepping : 0x00 Feature flags : 0x00808131 Cache/TLB descriptor values: 1 reads required Desc 0x70 : UNKNOWN Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x80 : UNKNOWN Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null done. CPU #0 Initialized Enable FLASH Set F0/0x52 to 0xee cs5530: Enabling Primary IDE Controller cs5530: Enabling Secondary IDE Controller Set F0/0x5b to |= 1 << 5(0x38) Final southbridge fixup F0/5c: 0x0000 cs5530: PCI INTA=15, INTB=9, INTC=9, INTD=9 F0/5c: 0x999f 4d0: 0x00 4d1: 0x00 4d0: 0x00 4d1: 0x82 F0/5b = 0x38 cs5530: Enabling Primary IDE Controller F0/5b = 0x38 cs5530: USB is on INTA, IRQ 15 Final mainboard fixup nano: Setting eth0 IRQ to 9 Wrote linuxbios table at: 00000500 - 00000698 checksum 8bc9 Jumping to linuxbiosmain()... Welcome to start32, the open sourced starter. This space will eventually hold more diagnostic information. January 2000, James Hendricks, Dale Webster, and Ron Minnich. Version 0.1 Trying polled ide Waiting for ide disks to spin up This is a hard coded delay and longer than necessary. .clocks_per_usec: 264 . offset=00000200 I am now initializing the ide system UQNAUT MIFERABLLcl1t 050 init_drive: sectors_per_track=[63], num_heads=[15], num_cylinders=[10585] IDE0 15/10585/63 cap: 0f00 init_drive: sectors_per_track=[0], num_heads=[0], num_cylinders=[0] Controller 1: detect FAILED (1) Gunzip setup gunzip_setup output data is 0x00100000 Gunzipping boot code ................ <1023> command line - [vga=785 root=/dev/hda2 console=tty0 console=ttyS0,9600n8] Jumping to boot code Linux version 2.4.20 () (gcc version 2.96 20000731 (Linux-Mandrake 8.0 2.96-0.48mdk)) #6 Tue May 27 18:14:43 CST 2003 BIOS-provided physical RAM map: BIOS-e801: 0000000000000000 - 000000000009f000 (usable) BIOS-e801: 0000000000100000 - 0000000003b00000 (usable) 59MB LOWMEM available. On node 0 totalpages: 15104 zone(0): 4096 pages. zone(1): 11008 pages. zone(2): 0 pages. Kernel command line: vga=785 root=/dev/hda2 console=tty0 console=ttyS0,9600n8 Initializing CPU#0 Working around Cyrix MediaGX virtual DMA bugs. Detected 200.455 MHz processor. Console: colour dummy device 80x25 Calibrating delay loop... 399.76 BogoMIPS Memory: 57172k/60416k available (1323k kernel code, 2856k reserved, 333k data, 256k init, 0k highmem) Checking if this processor honours the WP bit even in supervisor mode... Ok. Dentry cache hash table entries: 8192 (order: 4, 65536 bytes) Inode cache hash table entries: 4096 (order: 3, 32768 bytes) Mount-cache hash table entries: 1024 (order: 1, 8192 bytes) Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 16384 (order: 4, 65536 bytes) Working around Cyrix MediaGX virtual DMA bugs. CPU: NSC Geode(TM) Integrated Processor by National Semi stepping 02 Checking 'hlt' instruction... OK. POSIX conformance testing by UNIFIX PCI: Using configuration type 1 PCI: Probing PCI hardware PCI: Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x10) Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket apm: BIOS not found. Starting kswapd Journalled Block Device driver loaded pty: 256 Unix98 ptys configured keyboard: Timeout - AT keyboard not present?(ed) keyboard: Timeout - AT keyboard not present?(f4) Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled ttyS00 at 0x03f8 (irq = 4) is a 16550A ttyS01 at 0x02f8 (irq = 3) is a 16550A Uniform Multi-Platform E-IDE driver Revision: 6.31 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx CS5530: IDE controller on PCI bus 00 dev 92 CS5530: detected chipset, but driver not compiled in! CS5530: chipset revision 0 CS5530: not 100% native mode: will probe irqs later ide0: BM-DMA at 0x1400-0x1407, BIOS settings: hda:pio, hdb:pio ide1: BM-DMA at 0x1408-0x140f, BIOS settings: hdc:pio, hdd:pio hda: C/H/S=0/0/0 from BIOS ignored hda: QUANTUM FIREBALLlct10 05, ATA DISK drive ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 blk: queue c0308544, I/O limit 4095Mb (mask 0xffffffff) hda: 10002825 sectors (5121 MB) w/418KiB Cache, CHS=10585/15/63, (U)DMA Partition check: hda: [PTBL] [622/255/63] hda1 hda2 hda3 Floppy drive(s): fd0 is 1.44M FDC 0 is a post-1991 82077 RAMDISK driver initialized: 16 RAM disks of 49152K size 1024 blocksize loop: loaded (max 8 devices) 8139cp: 10/100 PCI Ethernet driver v0.3.0 (Sep 29, 2002) 8139cp: pci dev 00:0f.0 (id 10ec:8139 rev 10) is not an 8139C+ compatible chip 8139cp: Try the "8139too" driver instead. 8139too Fast Ethernet driver 0.9.26 eth0: RealTek RTL8139 Fast Ethernet at 0xc4800000, 00:e0:4c:26:c6:fa, IRQ 9 SCSI subsystem driver Revision: 1.00 scsi0 : SCSI host adapter emulation for IDE ATAPI devices usb.c: registered new driver usbdevfs usb.c: registered new driver hub usb-uhci.c: $Revision: 1.275 $ time 10:12:59 May 15 2003 usb-uhci.c: High bandwidth mode enabled usb-uhci.c: v1.275:USB Universal Host Controller Interface driver usb-ohci.c: USB OHCI at membase 0xc4802000, IRQ 15 usb-ohci.c: usb-00:13.0, Compaq Computer Corporation ZFMicro Chipset USB usb.c: new USB bus registered, assigned bus number 1 hub.c: USB hub found hub.c: 2 ports detected Initializing USB Mass Storage driver... usb.c: registered new driver usb-storage USB Mass Storage support registered. NET4: Linux TCP/IP 1.0 for NET4.0 IP Protocols: ICMP, UDP, TCP, IGMP IP: routing cache hash table of 512 buckets, 4Kbytes TCP: Hash tables configured (established 4096 bind 8192) NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. VFS: Mounted root (ext2 filesystem) readonly. Freeing unused kernel memory: 256k freed INIT: version 2.78 booting kernel loading successed. Checking flash file system... EXT2-fs warning: mounting unchecked fs, running e2fsck is recommended Flash file system OK! INIT: Entering runlevel: 2 Loading network interface...eth0: Setting half-duplex based on auto-negotiated partner ability 0000. eth0: Too much work at interrupt, IntrStatus=0x0001. V1.0.1 command line interface version 1.0.127 login: ______________________________________ ===================================================================

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[linuxBios] HDD init problem
by Edward J. Lee May 29, 2003

May 29, 2003

Hi. Does anyone have problems using ide_init()? While using it on IBM 123G HDDs, ide_init() sometimes seems to run forever, (stuck in the numerous busy-waitings, i guess) and my H/W watchdog eventually reboots the system. Of course, in most occasions everything goes just fine. Is there a better way of initializing HDDs? Ed.

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Re: HELP: VIA/EPIA Linux BIOS
by dinesh＠shahmicro.com May 29, 2003

May 29, 2003

Hi Andrew and others, 1st thx Andrew for your reply. However, I have few doubts and questions as bellow. What I got - VIA EPIA MoBo with 800 MHz CPU and 2 MB Flash. What I want - Replace existing BIOS with LinuxBIOS. Put Linux Kernel on Flash. Put initrd image on flash. Make self contained minimal system on flash. What I know - How to compile my own kernel (2.4.x and 2.5.x) How to make initrd (uClibc and BusyBox) What I did in past - Made a boot floppy (1.44 MB) with BusyBox, ModUtils, IPTables, thttpd, ssh, uClibc and udhcp (kernel+initrd) What I think - BIOS+PIX+VidBIOS =< 384 KB (Within upper mem? from 640K to 1M Limits?) Have 1024 - 384 = 1664KB mem in Flash? The doubts are - Can I use that 1664 KB Flash to put Kernel+InitRD to make system self content? Can I put LinuxBIOS on BIOS and ask it to load my kernel and InitRD from Flash? Do I have to retain VidBIOS? Some of my apps need X Server? I need to retain VidBIOS for VESA 2.0 and VESA FB? The idea is to make the system self contained and not to depend on network for booting. Whenever I want the system to boot of the network I can use in-built PIX. I can also upgrade my Flash to 4 MB if every thing can not be put on 2 MB. Also I need to backup my existing BIOS+PIX+VidBIOS and restore if something goes wrong. I don't have access to DOS oe Win. What are my options? I know these are lots of questions. Thx in advance for your time and answers and pointers. With warm regards, On Mon, May 26, 2003 at 02:39:15PM +0800, Andrew Ip wrote: > Hi Dinesh, > > > While looking @ LinuxBIOS project web site I come across your name in > > status page. > > I need whatever help/pointer u can give about VIA/EPIA Flash BIOS. I > > need some how-to for puting Linux on 2/4 MB Flash which comes with MoBo. > > Any help/pinters will be greatly appreciated. > There is a README file under freebios/src/mainboard/via/epia for > describing how-to enable and write flash. IIRC, the latest > version of flash_rom (in src/utils/flash_and_burn) supports EPIA. > You can just use flash_rom to flash rom under Linux. > > -Andrew -- --Dinesh Shah :-) Dinesh(a)ShahMicro.com +91-98213-11906 +91-22-56919423

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IRQ Problem !!!
by Shubhangi Jadhav May 28, 2003

May 28, 2003

Hi, I got my motherboard to successfully boot with LinuxBIOS. It gets on the network with both the internet interface up and seems to asign the IRQ correctly in LinuxBIOS. ping is OK.However when I start a video streaming application which uses a Multimedia card(encoder)card on a PCI slot, the network goes out. This encoder card uses a fast interrupt and I have read that in such a case interrupt handlers run with all other interrupts disabled. Was wondering whether this is what is happening in my case. Is it that the ethernet interrupts get disabled whenever a fast interrupt comes up and then it is never enabled again? Any suggestions on what could be the possible solution? Regards, Shubhangi

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Entrance point (ipl and linuxbios)
by Xavier Pegenaute May 27, 2003

May 27, 2003

Hi, i have some doubt about the real entrance point in the eeprom and ipl with LinuxBios. if the map of eeprom is right (following burn_mtd sript): 0-511 (0x0 - 0x1FF) docipl 512 Bytes 512-1023 (0x200 - 0x3FF) docipl (security copy) 512 Bytes 1024-65535 (0x400 - 0xFFFF) linuxbios.block 64512 Bytes 65536-851967 (0x10000 - 0xCFFFF) vmlinux.bin.gz.block 786432 Bytes In theory we have mapped the completly EPROM into the top of memory (4Gb for 32 bits) (Vol. 3 Cap. 9.10 of IA-32 ...), how we have the CS.BASE = 0xFFFF0000 and EIP = 0x0000FFF0 with the special memory config we start in 0xFFFFFFF0. We only can see a range of 0x0000 - 0xFFFF (the last 64Kbytes?) until we turn to protected mode. Then we start the init of EPROM with the last 16 bytes below the top of memory, that is the last 16 bytes below of vmlinux.bin.gz, of course impossible, any one can help me in this ? Also, in ipl.S, we can find this code: ----------------------------------------------------------------------- #ifdef STD_FLASH .org 0xfff0 reset_vector: .byte 0xea # jmp to f000:fc00, where IPL .word 0xfc00, 0xf000 # starts in Standard Flash #else /* !STD_FLASH i.e. DoC Mil */ ----------------------------------------------------------------------- Here if we have a standard flash eeprom we jump to the code of initialitzacion "sis630spd_start:" in ipl.S and we execute until "sis630ipl_end:" that there is a jump to SPL vector. What about ".org 0xfff0" ? ----------------------------------------------------------------------- #if (USE_DOC_MIL == 1) .org 0x1f0 ----------------------------------------------------------------------- If we have DOC_MIL ".org 0x1f0". ----------------------------------------------------------------------- #elif USE_DOC_2000_TSOP == 1) || (USE_DOC_MIL_PLUS == 1) .org 0x3f0 ----------------------------------------------------------------------- and here we put the ".org 0x3f0" ----------------------------------------------------------------------- #endif reset_vector: .byte 0xea # jmp to fe00:0000, where IPL .word 0x0000, DOC_WIN_SEG # starts in DoC #endif /* STD_FLASH */ ----------------------------------------------------------------------- If it is not a DOC_MIL and bla, bla, bla ... we make a jmp to 0xfe00:000, what is there in this direction ? ----------------------------------------------------------------------- spl_vector: .byte 0xea # jmp to 8000:0000, where SPL .word 0x0000, SPL_RAM_SEG # (LinuxBIOS) starts in RAM ----------------------------------------------------------------------- And finally if it was a standard flash or DOC_MIL we jump to LinuxBios in the segment 0x8000. In theory LinuxBios ?. My questions: - May be the mapped EEPROM in memory address space is mapped in reverse order (to find linuxbios in the firs 64Kb) ? 0x0 of EEPROM -> 0xFFFFFFFF. - Who is executed first ipl.S, or crt0.S ? My confusion are the ".org 0xfff0" in ipl.S but in the same time in src/cpu/i386/reset["16","32"].inc i found some reference to reset_vector but i don't know how it works , also by the other hand who turn the memory in protected memory is crt0.S, then this has to be the first. Thanks by patience. Sorry by the extension of the mail. Xavi.

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