Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84321?usp=email ) Change subject: arch/x86: Configure EBDA through Kconfig ...................................................................... arch/x86: Configure EBDA through Kconfig EBDA (Extended BIOS Data Area) is a memory area below 0xA0000 and one of the default areas where OS will scan ACPI RSDP pointer from. coreboot's default EBDA's starting address is 0xF6000, which is in PAM (Programmable Attribute Map) F-segment's scope. For some platforms without writeable PAM-F segment (e.g. some simics virtual platforms), corboot's default EBDA is not writable. Make DEFAULT_EBDA_LOWMEM, DEFAULT_EBDA_SEGMENT, DEFAULT_EBDA_SIZE as Kconfig items so that coreboot's EBDA could be relocated to a writable low memory place. Change-Id: Icd7ba0c902560f7d498934392685dc2af9c5ce09 Signed-off-by: Gang Chen <gang.c.chen@intel.com> Co-authored-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> --- M src/arch/x86/Kconfig M src/arch/x86/ebda.c 2 files changed, 21 insertions(+), 9 deletions(-) Approvals: Jérémy Compostella: Looks good to me, approved build bot (Jenkins): Verified Stefan Reinauer: Looks good to me, approved diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 16d8a70..4737e3c 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -422,4 +422,21 @@ The default value is 1024 bytes (1 KiB) for ChromeOS and 0 for other platforms. +config DEFAULT_EBDA_LOWMEM + hex + default 0x100000 + help + The default value of EBDA low memory is (1024 << 10). + +config DEFAULT_EBDA_SEGMENT + hex + default 0xF600 + help + The default value of EBDA segment is 0xF600. + +config DEFAULT_EBDA_SIZE + hex + default 0x400 + help + The default value of EBDA size is 0x400. endif diff --git a/src/arch/x86/ebda.c b/src/arch/x86/ebda.c index e835fce..f3e8fd2 100644 --- a/src/arch/x86/ebda.c +++ b/src/arch/x86/ebda.c @@ -10,14 +10,9 @@ #define X86_EBDA_SEGMENT ((void *)0x40e) #define X86_EBDA_LOWMEM ((void *)0x413) -#define DEFAULT_EBDA_LOWMEM (1024 << 10) -#define DEFAULT_EBDA_SEGMENT 0xF600 -#define DEFAULT_EBDA_SIZE 0x400 - - static void *get_ebda_start(void) { - return (void *)((uintptr_t)DEFAULT_EBDA_SEGMENT << 4); + return (void *)((uintptr_t)CONFIG_DEFAULT_EBDA_SEGMENT << 4); } /* @@ -55,9 +50,9 @@ if (acpi_is_wakeup_s3()) return; - setup_ebda(DEFAULT_EBDA_LOWMEM, - DEFAULT_EBDA_SEGMENT, - DEFAULT_EBDA_SIZE); + setup_ebda(CONFIG_DEFAULT_EBDA_LOWMEM, + CONFIG_DEFAULT_EBDA_SEGMENT, + CONFIG_DEFAULT_EBDA_SIZE); } /* Ensure EBDA is prepared before Option ROMs. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/84321?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icd7ba0c902560f7d498934392685dc2af9c5ce09 Gerrit-Change-Number: 84321 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu@intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella@intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer@coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Arthur Heymans <arthur@aheymans.xyz> Gerrit-CC: Chen, Gang C <gang.c.chen@intel.com>