Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44236 ) Change subject: cpu/intel/model_{65x,67x}: Unify CPU code ...................................................................... cpu/intel/model_{65x,67x}: Unify CPU code Both CPU models have the same initialization sequence, so merge them. This shaves off 64 bytes when building for the Asus P2B-DS. Change-Id: I88680dc36f48b711ac982ec8091a87996bc78dee Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- D src/cpu/intel/model_65x/Makefile.inc A src/cpu/intel/model_65x_67x/Makefile.inc R src/cpu/intel/model_65x_67x/model_65x_67x_init.c D src/cpu/intel/model_67x/Makefile.inc D src/cpu/intel/model_67x/model_67x_init.c M src/cpu/intel/slot_1/Makefile.inc 6 files changed, 17 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/44236/1 diff --git a/src/cpu/intel/model_65x/Makefile.inc b/src/cpu/intel/model_65x/Makefile.inc deleted file mode 100644 index 16ca902..0000000 --- a/src/cpu/intel/model_65x/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-or-later - -ramstage-y += model_65x_init.c - -cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-05-*) diff --git a/src/cpu/intel/model_65x_67x/Makefile.inc b/src/cpu/intel/model_65x_67x/Makefile.inc new file mode 100644 index 0000000..3b78c4e --- /dev/null +++ b/src/cpu/intel/model_65x_67x/Makefile.inc @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +ramstage-y += model_65x_67x_init.c + +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-05-*) +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-07-*) diff --git a/src/cpu/intel/model_65x/model_65x_init.c b/src/cpu/intel/model_65x_67x/model_65x_67x_init.c similarity index 80% rename from src/cpu/intel/model_65x/model_65x_init.c rename to src/cpu/intel/model_65x_67x/model_65x_67x_init.c index 8989eec..86950e4 100644 --- a/src/cpu/intel/model_65x/model_65x_init.c +++ b/src/cpu/intel/model_65x_67x/model_65x_67x_init.c @@ -8,24 +8,27 @@ #include <cpu/x86/cache.h> #include <cpu/intel/l2_cache.h> -static void model_65x_init(struct device *dev) +static void model_65x_67x_init(struct device *cpu) { /* Update the microcode */ intel_update_microcode_from_cbfs(); + /* Initialize L2 cache */ p6_configure_l2_cache(); /* Turn on caching if we haven't already */ x86_enable_cache(); + + /* Setup MTRRs */ x86_setup_mtrrs(); x86_mtrr_check(); /* Enable the local CPU APICs */ setup_lapic(); -}; +} static struct device_operations cpu_dev_ops = { - .init = model_65x_init, + .init = model_65x_67x_init, }; static const struct cpu_device_id cpu_table[] = { @@ -33,6 +36,10 @@ { X86_VENDOR_INTEL, 0x0651 }, /* PII/Celeron, dA1/A1 */ { X86_VENDOR_INTEL, 0x0652 }, /* PII/Celeron/Xeon, dB0/mdB0/B0 */ { X86_VENDOR_INTEL, 0x0653 }, /* PII/Xeon, dB1/B1 */ + + { X86_VENDOR_INTEL, 0x0671 }, + { X86_VENDOR_INTEL, 0x0672 }, /* PIII, kB0 */ + { X86_VENDOR_INTEL, 0x0673 }, /* PIII, kC0 */ { 0, 0 }, }; diff --git a/src/cpu/intel/model_67x/Makefile.inc b/src/cpu/intel/model_67x/Makefile.inc deleted file mode 100644 index d9b0737..0000000 --- a/src/cpu/intel/model_67x/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-or-later - -ramstage-y += model_67x_init.c - -cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-07-*) diff --git a/src/cpu/intel/model_67x/model_67x_init.c b/src/cpu/intel/model_67x/model_67x_init.c deleted file mode 100644 index 6cfa96c..0000000 --- a/src/cpu/intel/model_67x/model_67x_init.c +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/device.h> -#include <cpu/cpu.h> -#include <cpu/x86/mtrr.h> -#include <cpu/x86/lapic.h> -#include <cpu/intel/microcode.h> -#include <cpu/x86/cache.h> -#include <cpu/intel/l2_cache.h> - -static void model_67x_init(struct device *cpu) -{ - /* Update the microcode */ - intel_update_microcode_from_cbfs(); - - /* Initialize L2 cache */ - p6_configure_l2_cache(); - - /* Turn on caching if we haven't already */ - x86_enable_cache(); - - /* Setup MTRRs */ - x86_setup_mtrrs(); - x86_mtrr_check(); - - /* Enable the local CPU APICs */ - setup_lapic(); -} - -static struct device_operations cpu_dev_ops = { - .init = model_67x_init, -}; - -static const struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x0671 }, - { X86_VENDOR_INTEL, 0x0672 }, /* PIII, kB0 */ - { X86_VENDOR_INTEL, 0x0673 }, /* PIII, kC0 */ - - { 0, 0 }, -}; - -static const struct cpu_driver driver __cpu_driver = { - .ops = &cpu_dev_ops, - .id_table = cpu_table, -}; diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index 856ecf6..489a3c4 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -3,8 +3,7 @@ ramstage-y += slot_1.c ramstage-y += l2_cache.c subdirs-y += ../model_6xx -subdirs-y += ../model_65x -subdirs-y += ../model_67x +subdirs-y += ../model_65x_67x subdirs-y += ../model_68x subdirs-y += ../model_6bx subdirs-y += ../microcode -- To view, visit https://review.coreboot.org/c/coreboot/+/44236 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88680dc36f48b711ac982ec8091a87996bc78dee Gerrit-Change-Number: 44236 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Martin Roth <martinroth@google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-MessageType: newchange