Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44200 ) Change subject: soc/intel/apollolake: Rename UART irqs ...................................................................... soc/intel/apollolake: Rename UART irqs Use the same names as on other intel socs. Will be used in intel common uart driver. Change-Id: Ia418fefb3f925fe4d000683b5028682cf0b68a9b Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44200 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> --- M src/soc/intel/apollolake/acpi/pci_irqs.asl M src/soc/intel/apollolake/include/soc/irq.h 2 files changed, 8 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Maxim Polyakov: Looks good to me, approved diff --git a/src/soc/intel/apollolake/acpi/pci_irqs.asl b/src/soc/intel/apollolake/acpi/pci_irqs.asl index c0ec1d4..d9c180d 100644 --- a/src/soc/intel/apollolake/acpi/pci_irqs.asl +++ b/src/soc/intel/apollolake/acpi/pci_irqs.asl @@ -43,10 +43,10 @@ Package(){0x0017FFFF, 1, 0, I2C5_INT}, Package(){0x0017FFFF, 2, 0, I2C6_INT}, Package(){0x0017FFFF, 3, 0, I2C7_INT}, - Package(){0x0018FFFF, 0, 0, UART0_INT}, - Package(){0x0018FFFF, 1, 0, UART1_INT}, - Package(){0x0018FFFF, 2, 0, UART2_INT}, - Package(){0x0018FFFF, 3, 0, UART3_INT}, + Package(){0x0018FFFF, 0, 0, LPSS_UART0_IRQ}, + Package(){0x0018FFFF, 1, 0, LPSS_UART1_IRQ}, + Package(){0x0018FFFF, 2, 0, LPSS_UART2_IRQ}, + Package(){0x0018FFFF, 3, 0, LPSS_UART3_IRQ}, Package(){0x0019FFFF, 0, 0, SPI0_INT}, Package(){0x0019FFFF, 1, 0, SPI1_INT}, Package(){0x0019FFFF, 2, 0, SPI2_INT}, diff --git a/src/soc/intel/apollolake/include/soc/irq.h b/src/soc/intel/apollolake/include/soc/irq.h index f619865..ae7af1a 100644 --- a/src/soc/intel/apollolake/include/soc/irq.h +++ b/src/soc/intel/apollolake/include/soc/irq.h @@ -4,10 +4,10 @@ #define _SOC_IRQ_H_ #define SDCARD_INT 3 /* Need to be shared by PMC and SCC only*/ -#define UART0_INT 4 /* Need to be shared by PMC and SCC only*/ -#define UART1_INT 5 /* Need to be shared by PMC and SCC only*/ -#define UART2_INT 6 /* Need to be shared by PMC and SCC only*/ -#define UART3_INT 7 /* Need to be shared by PMC and SCC only*/ +#define LPSS_UART0_IRQ 4 /* Need to be shared by PMC and SCC only*/ +#define LPSS_UART1_IRQ 5 /* Need to be shared by PMC and SCC only*/ +#define LPSS_UART2_IRQ 6 /* Need to be shared by PMC and SCC only*/ +#define LPSS_UART3_IRQ 7 /* Need to be shared by PMC and SCC only*/ #define XDCI_INT 13 /* Need to be shared by PMC and SCC only*/ #define GPIO_BANK_INT 14 #define NPK_INT 16 -- To view, visit https://review.coreboot.org/c/coreboot/+/44200 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia418fefb3f925fe4d000683b5028682cf0b68a9b Gerrit-Change-Number: 44200 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov@gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: merged