Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87884?usp=email ) Change subject: mb/google/skywalker: Add SD card configurations ...................................................................... mb/google/skywalker: Add SD card configurations Pass SD card detect GPIO to payloads for SD card detection and configure SD card in ramstage. Currently, only Skywalker supports the SD card. BUG=b:379008996 BRANCH=none TEST=Build pass. Check storage in depthcharge. firmware-shell: storage init * 0: UFS LUN 0 1: removable mtk_mmc Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.corp-partner.google.com> Change-Id: I3b198d5e237006c299581ab4a5da8577dbcca7a6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/87884 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> --- M src/mainboard/google/skywalker/Kconfig M src/mainboard/google/skywalker/chromeos.c M src/mainboard/google/skywalker/mainboard.c 3 files changed, 17 insertions(+), 0 deletions(-) Approvals: Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/skywalker/Kconfig b/src/mainboard/google/skywalker/Kconfig index b5134a529..49b3d21 100644 --- a/src/mainboard/google/skywalker/Kconfig +++ b/src/mainboard/google/skywalker/Kconfig @@ -9,6 +9,9 @@ if BOARD_GOOGLE_SKYWALKER_COMMON +config SKYWALKER_SDCARD_INIT + def_bool BOARD_GOOGLE_SKYWALKER + config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES select VBOOT_VBNV_FLASH @@ -31,6 +34,8 @@ select FW_CONFIG select FW_CONFIG_SOURCE_CHROMEEC_CBI select RTC + select COMMONLIB_STORAGE + select COMMONLIB_STORAGE_MMC config MAINBOARD_DIR string diff --git a/src/mainboard/google/skywalker/chromeos.c b/src/mainboard/google/skywalker/chromeos.c index c5b9f8e..26f0644 100644 --- a/src/mainboard/google/skywalker/chromeos.c +++ b/src/mainboard/google/skywalker/chromeos.c @@ -41,6 +41,13 @@ {GPIO_GSC_AP_INT_ODL.id, ACTIVE_HIGH, -1, "TPM interrupt"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); + + if (CONFIG(SKYWALKER_SDCARD_INIT)) { + struct lb_gpio sd_card_gpios[] = { + { GPIO_SD_CD_ODL.id, ACTIVE_LOW, -1, "SD card detect" }, + }; + lb_add_gpios(gpios, sd_card_gpios, ARRAY_SIZE(sd_card_gpios)); + } } int cr50_plat_irq_status(void) diff --git a/src/mainboard/google/skywalker/mainboard.c b/src/mainboard/google/skywalker/mainboard.c index af27c82..74c3ea7 100644 --- a/src/mainboard/google/skywalker/mainboard.c +++ b/src/mainboard/google/skywalker/mainboard.c @@ -4,6 +4,8 @@ #include <gpio.h> #include <soc/bl31.h> #include <soc/dpm_v2.h> +#include <soc/msdc.h> +#include <soc/mt6359p.h> #include <soc/spm_common.h> #include <soc/usb.h> @@ -23,6 +25,9 @@ spm_init(); power_on_fpmcu(); + if (CONFIG(SKYWALKER_SDCARD_INIT)) + mtk_msdc_configure_sdcard(); + if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE)) register_reset_to_bl31(GPIO_AP_EC_WARM_RST_REQ.id, true); } -- To view, visit https://review.coreboot.org/c/coreboot/+/87884?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3b198d5e237006c299581ab4a5da8577dbcca7a6 Gerrit-Change-Number: 87884 Gerrit-PatchSet: 5 Gerrit-Owner: Vince Liu <vince-wl.liu@mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte@chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin@google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso@google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin@mediatek.com> Gerrit-CC: Mengqi Zhang <mengqi.zhang@mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter@mailbox.org>