Change in ...coreboot[master]: sb/intel/i82801gx: Include chip.h directly
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33171 Change subject: sb/intel/i82801gx: Include chip.h directly ...................................................................... sb/intel/i82801gx: Include chip.h directly Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> --- M src/southbridge/intel/i82801gx/i82801gx.h M src/southbridge/intel/i82801gx/ide.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801gx/pcie.c M src/southbridge/intel/i82801gx/sata.c 5 files changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/33171/1 diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index a91ffc5..e44fcf5 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -36,7 +36,6 @@ #if !defined(__ASSEMBLER__) #if !defined(__PRE_RAM__) -#include "chip.h" #if !defined(__SIMPLE_DEVICE__) void i82801gx_enable(struct device *dev); #endif diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c index a362372..672ee43 100644 --- a/src/southbridge/intel/i82801gx/ide.c +++ b/src/southbridge/intel/i82801gx/ide.c @@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include "chip.h" #include "i82801gx.h" typedef struct southbridge_intel_i82801gx_config config_t; diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 948b6aa..846a709 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -34,6 +34,7 @@ #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/pmbase.h> +#include "chip.h" #include "i82801gx.h" #include "nvs.h" diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index 3e5dbc3..0946a9a 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include "chip.h" #include "i82801gx.h" /* Low Power variant has 6 root ports. */ diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c index 8514b6d..b657513 100644 --- a/src/southbridge/intel/i82801gx/sata.c +++ b/src/southbridge/intel/i82801gx/sata.c @@ -20,6 +20,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include "chip.h" #include "i82801gx.h" #include "sata.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/33171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Gerrit-Change-Number: 33171 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-MessageType: newchange
Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/33171 ) Change subject: sb/intel/i82801gx: Include chip.h directly ...................................................................... sb/intel/i82801gx: Include chip.h directly Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> --- M src/mainboard/lenovo/t60/mainboard.c M src/mainboard/lenovo/x60/mainboard.c M src/mainboard/lenovo/z61t/mainboard.c M src/southbridge/intel/i82801gx/i82801gx.h M src/southbridge/intel/i82801gx/ide.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801gx/pcie.c M src/southbridge/intel/i82801gx/sata.c 8 files changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/33171/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Gerrit-Change-Number: 33171 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-MessageType: newpatchset
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33171 ) Change subject: sb/intel/i82801gx: Include chip.h directly ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Gerrit-Change-Number: 33171 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Mon, 03 Jun 2019 19:53:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33171 ) Change subject: sb/intel/i82801gx: Include chip.h directly ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Gerrit-Change-Number: 33171 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Tue, 04 Jun 2019 11:06:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33171 ) Change subject: sb/intel/i82801gx: Include chip.h directly ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Gerrit-Change-Number: 33171 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Tue, 04 Jun 2019 22:56:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33171 ) Change subject: sb/intel/i82801gx: Include chip.h directly ...................................................................... sb/intel/i82801gx: Include chip.h directly Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33171 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> --- M src/mainboard/lenovo/t60/mainboard.c M src/mainboard/lenovo/x60/mainboard.c M src/mainboard/lenovo/z61t/mainboard.c M src/southbridge/intel/i82801gx/i82801gx.h M src/southbridge/intel/i82801gx/ide.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801gx/pcie.c M src/southbridge/intel/i82801gx/sata.c 8 files changed, 7 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved HAOUAS Elyes: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c index 2d998fb..b78d862 100644 --- a/src/mainboard/lenovo/t60/mainboard.c +++ b/src/mainboard/lenovo/t60/mainboard.c @@ -22,6 +22,7 @@ #include <ec/lenovo/h8/h8.h> #include <ec/acpi/ec.h> #include <northbridge/intel/i945/i945.h> +#include <southbridge/intel/i82801gx/chip.h> #include <drivers/intel/gma/int15.h> #include <arch/acpigen.h> diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c index 274a151..964e9c0 100644 --- a/src/mainboard/lenovo/x60/mainboard.c +++ b/src/mainboard/lenovo/x60/mainboard.c @@ -22,6 +22,7 @@ #include <arch/io.h> #include <ec/acpi/ec.h> #include <northbridge/intel/i945/i945.h> +#include <southbridge/intel/i82801gx/chip.h> #include "dock.h" #include <drivers/intel/gma/int15.h> #include <drivers/lenovo/lenovo.h> diff --git a/src/mainboard/lenovo/z61t/mainboard.c b/src/mainboard/lenovo/z61t/mainboard.c index 886b4fb..5f59946 100644 --- a/src/mainboard/lenovo/z61t/mainboard.c +++ b/src/mainboard/lenovo/z61t/mainboard.c @@ -22,6 +22,7 @@ #include <ec/lenovo/h8/h8.h> #include <ec/acpi/ec.h> #include <northbridge/intel/i945/i945.h> +#include <southbridge/intel/i82801gx/chip.h> #include <drivers/intel/gma/int15.h> #include <arch/acpigen.h> diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index a91ffc5..e44fcf5 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -36,7 +36,6 @@ #if !defined(__ASSEMBLER__) #if !defined(__PRE_RAM__) -#include "chip.h" #if !defined(__SIMPLE_DEVICE__) void i82801gx_enable(struct device *dev); #endif diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c index a362372..672ee43 100644 --- a/src/southbridge/intel/i82801gx/ide.c +++ b/src/southbridge/intel/i82801gx/ide.c @@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include "chip.h" #include "i82801gx.h" typedef struct southbridge_intel_i82801gx_config config_t; diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 948b6aa..846a709 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -34,6 +34,7 @@ #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/pmbase.h> +#include "chip.h" #include "i82801gx.h" #include "nvs.h" diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index 3e5dbc3..0946a9a 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include "chip.h" #include "i82801gx.h" /* Low Power variant has 6 root ports. */ diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c index 8514b6d..b657513 100644 --- a/src/southbridge/intel/i82801gx/sata.c +++ b/src/southbridge/intel/i82801gx/sata.c @@ -20,6 +20,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> +#include "chip.h" #include "i82801gx.h" #include "sata.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/33171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d743e90444292be687999ab4f50aa89d514fbad Gerrit-Change-Number: 33171 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de> Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: merged
participants (4)
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review) -
Felix Held (Code Review) -
HAOUAS Elyes (Code Review)