Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87885?usp=email ) Change subject: mb/google/skywalker: Add RT9123 support for beep sound ...................................................................... mb/google/skywalker: Add RT9123 support for beep sound Derive the audio amplifier from FW_CONFIG, and set up I2S for RT9123. Also pass the corresponding GPIO to the payload. BUG=b:359705470 BRANCH=none TEST=Build pass and test with Depthcahrge change: https://chromium-review.googlesource.com/c/chromiumos/platform/depthcharge/+... https://chromium-review.googlesource.com/c/chromiumos/platform/depthcharge/+... Check audio cmd in depthcharge with: firmware-shell: AUDIO CMD=audio 500 100 1 Signed-off-by: Cyril Chao <cyril.chao@mediatek.corp-partner.google.com> Change-Id: I3b9b347ad8b754cbc02d942da9a7b0886c4c3cc4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/87885 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> --- M src/mainboard/google/skywalker/chromeos.c M src/mainboard/google/skywalker/devicetree.cb M src/mainboard/google/skywalker/gpio.h M src/mainboard/google/skywalker/mainboard.c 4 files changed, 49 insertions(+), 0 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/mainboard/google/skywalker/chromeos.c b/src/mainboard/google/skywalker/chromeos.c index 26f0644..9b5a9c0 100644 --- a/src/mainboard/google/skywalker/chromeos.c +++ b/src/mainboard/google/skywalker/chromeos.c @@ -3,6 +3,7 @@ #include <boot/coreboot_tables.h> #include <drivers/tpm/cr50.h> #include <ec/google/chromeec/ec.h> +#include <fw_config.h> #include <gpio.h> #include "gpio.h" @@ -31,6 +32,7 @@ gpio_output(GPIO_AP_FP_FW_UP_STRAP, 0); gpio_output(GPIO_EN_PWR_FP, 0); gpio_output(GPIO_FP_RST_1V8_S3_L, 0); + gpio_output(GPIO_EN_SPKR, 0); } void fill_lb_gpios(struct lb_gpios *gpios) @@ -48,6 +50,13 @@ }; lb_add_gpios(gpios, sd_card_gpios, ARRAY_SIZE(sd_card_gpios)); } + + if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_RT9123))) { + struct lb_gpio rt9123_gpios[] = { + {GPIO_EN_SPKR.id, ACTIVE_HIGH, -1, "rt9123_spk_en"}, + }; + lb_add_gpios(gpios, rt9123_gpios, ARRAY_SIZE(rt9123_gpios)); + } } int cr50_plat_irq_status(void) diff --git a/src/mainboard/google/skywalker/devicetree.cb b/src/mainboard/google/skywalker/devicetree.cb index c76b4e6..6ec4e25 100644 --- a/src/mainboard/google/skywalker/devicetree.cb +++ b/src/mainboard/google/skywalker/devicetree.cb @@ -3,3 +3,9 @@ chip soc/mediatek/mt8189 device cpu_cluster 0 on end end + +fw_config + field AUDIO_AMP 25 27 + option AMP_RT9123 0 + end +end diff --git a/src/mainboard/google/skywalker/gpio.h b/src/mainboard/google/skywalker/gpio.h index 8a1925a..208a3d9 100644 --- a/src/mainboard/google/skywalker/gpio.h +++ b/src/mainboard/google/skywalker/gpio.h @@ -27,6 +27,10 @@ #define GPIO_SD_CD_ODL GPIO(GBE_INTR) #define GPIO_HDMI_HPD_1V8_ODL GPIO(CONN_TOP_CLK) #define GPIO_AP_HDMI_RST_ODL GPIO(GBE_TXC) +#define GPIO_EN_SPKR GPIO(GPIO05) +#define GPIO_I2SOUT1_BCK GPIO(DMIC0_DAT0) +#define GPIO_I2SOUT1_LRCK GPIO(DMIC1_CLK) +#define GPIO_I2SOUT1_DOUT GPIO(DMIC1_DAT0) void setup_chromeos_gpios(void); diff --git a/src/mainboard/google/skywalker/mainboard.c b/src/mainboard/google/skywalker/mainboard.c index 74c3ea7..f6dc5ca 100644 --- a/src/mainboard/google/skywalker/mainboard.c +++ b/src/mainboard/google/skywalker/mainboard.c @@ -1,16 +1,45 @@ /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ #include <device/device.h> +#include <device/mmio.h> +#include <fw_config.h> #include <gpio.h> #include <soc/bl31.h> #include <soc/dpm_v2.h> #include <soc/msdc.h> #include <soc/mt6359p.h> +#include <soc/mtcmos.h> #include <soc/spm_common.h> #include <soc/usb.h> #include "gpio.h" +#define AFE_SE_SECURE_CON1 (AUDIO_BASE + 0x5634) + +static void configure_rt9123(void) +{ + /* SoC I2S */ + gpio_set_mode(GPIO_I2SOUT1_BCK, GPIO_FUNC(DMIC0_DAT0, I2SOUT1_BCK)); + gpio_set_mode(GPIO_I2SOUT1_LRCK, GPIO_FUNC(DMIC1_CLK, I2SOUT1_LRCK)); + gpio_set_mode(GPIO_I2SOUT1_DOUT, GPIO_FUNC(DMIC1_DAT0, I2SOUT1_DO)); + + printk(BIOS_INFO, "%s: AMP configuration done\n", __func__); +} + +static void configure_audio(void) +{ + mtcmos_audio_power_on(); + mtcmos_protect_audio_bus(); + + /* Switch to normal mode */ + write32p(AFE_SE_SECURE_CON1, 0x0); + + if (fw_config_probe(FW_CONFIG(AUDIO_AMP, AMP_RT9123))) + configure_rt9123(); + else + printk(BIOS_WARNING, "Unknown amp\n"); +} + static void power_on_fpmcu(void) { /* Power on the fingerprint MCU */ @@ -24,6 +53,7 @@ setup_usb_host(); spm_init(); power_on_fpmcu(); + configure_audio(); if (CONFIG(SKYWALKER_SDCARD_INIT)) mtk_msdc_configure_sdcard(); -- To view, visit https://review.coreboot.org/c/coreboot/+/87885?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3b9b347ad8b754cbc02d942da9a7b0886c4c3cc4 Gerrit-Change-Number: 87885 Gerrit-PatchSet: 5 Gerrit-Owner: Vince Liu <vince-wl.liu@mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte@chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter@mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin@google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso@google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin@mediatek.com>