Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30821 ) Change subject: mb/*/devicetree.cb: Remove unavailable PCIe ports ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/30821/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/30821/1//COMMIT_MSG@9 PS1, Line 9: Some variants only support 4 PCIe ports so there is no need to have Maybe rephrase as "variants of southbridge". Note that some "device off" lines will show up as leftover static devices in the logs only for warm boots. For cold boots, it is necessary to have them in order to set function disable bit. -- To view, visit https://review.coreboot.org/c/coreboot/+/30821 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I154cae358fb7f862fc0c8eaa620474b37b5e6484 Gerrit-Change-Number: 30821 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis@fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Comment-Date: Sun, 13 Jan 2019 18:09:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment