Patrick Rudolph has uploaded this change for review.
src/arch/x86/exit_car: Add proper x86_64 code
Don't truncate upper bits in assemlby code and thus allow loading
of postcar stage above 4GiB. Tested on qemu.
Change-Id: I42d1086f1220e44076ccf613244fc3c6d804805b
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/arch/x86/exit_car.S
1 file changed, 24 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/59873/1
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S
index 9b89ffb..5d1ffdc 100644
--- a/src/arch/x86/exit_car.S
+++ b/src/arch/x86/exit_car.S
@@ -111,13 +111,20 @@
#if CONFIG(SOC_SETS_MSRS)
+#if ENV_X86_64
+ mov %rsp, %rbp
+
+ /* Need to align stack to 16 bytes at the call instruction. Therefore
+ account for the 1 push. */
+ movq $0xfffffffffffffff0, %rax
+ and %rax, %rsp
+ mov %rbp, %rdi
+#else
mov %esp, %ebp
/* Need to align stack to 16 bytes at the call instruction. Therefore
account for the 1 push. */
andl $0xfffffff0, %esp
-#if ENV_X86_64
- mov %rbp, %rdi
-#else
+
sub $12, %esp
push %ebp
#endif
@@ -125,10 +132,18 @@
call soc_set_mtrrs
/* Ignore fixing up %esp since we're setting it a new value. */
+#if ENV_X86_64
+ /* rax: new top_of_stack with setup_stack_and_mtrrs data removed */
+ mov %rax, %rsp
+ /* Align stack to 16 bytes at call instruction. */
+ movq $0xfffffffffffffff0, %rax
+ and %rax, %rsp
+#else
/* eax: new top_of_stack with setup_stack_and_mtrrs data removed */
movl %eax, %esp
/* Align stack to 16 bytes at call instruction. */
andl $0xfffffff0, %esp
+#endif
call soc_enable_mtrrs
#else /* CONFIG_SOC_SETS_MSRS */
/* Clear variable MTRRs. */
@@ -174,8 +189,14 @@
wrmsr
#endif /* CONFIG_SOC_SETS_MSRS */
+#if ENV_X86_64
+ /* Align stack to 16 bytes at call instruction. */
+ movq $0xfffffffffffffff0, %rax
+ and %rax, %rsp
+#else
/* Align stack to 16 bytes at call instruction. */
andl $0xfffffff0, %esp
+#endif
/* Call into main for postcar. */
call main
/* Should never return. */
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