Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33065 Change subject: soc/intel/apollolake/Kconfig: Add CONSOLE_UART_BASE_ADDRESS ...................................................................... soc/intel/apollolake/Kconfig: Add CONSOLE_UART_BASE_ADDRESS Set CONSOLE_UART_BASE_ADDRESS for SoC's internal UART. Allows to build SeaBios without manually specifying the MMIO address. Tested on Up squared: The serial works in SeaBios. Change-Id: I32c18aa6f767cfaf14e3b86796d7d7a32ff1d3d5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> --- M src/soc/intel/apollolake/Kconfig 1 file changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/33065/1 diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 217d1ea..bce276c 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -361,6 +361,14 @@ int default 100 +config CONSOLE_UART_BASE_ADDRESS + hex + default 0xddffc000 if UART_FOR_CONSOLE = 0 + default 0xddffe000 if UART_FOR_CONSOLE = 1 + default 0xde000000 if UART_FOR_CONSOLE = 2 + depends on DRIVERS_UART_8250MEM_32 + depends on CONSOLE_SERIAL + config APL_SKIP_SET_POWER_LIMITS bool default n -- To view, visit https://review.coreboot.org/c/coreboot/+/33065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32c18aa6f767cfaf14e3b86796d7d7a32ff1d3d5 Gerrit-Change-Number: 33065 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com> Gerrit-MessageType: newchange