Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35029 ) Change subject: soc/intel/{cnl, dnv, icl, skl}: Make top_of_ram align ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/c/coreboot/+/35029/1/src/soc/intel/cannonlake/ro... File src/soc/intel/cannonlake/romstage/romstage.c: https://review.coreboot.org/c/coreboot/+/35029/1/src/soc/intel/cannonlake/ro... PS1, Line 162: top_of_ram = ALIGN_DOWN((uintptr_t)cbmem_top(), top_of_ram_size); So.. if cbmem_top() was at 31 MiB, your WB cache region now covers 0 MiB to 16MiB ? So you need to align cbmem_top(). One more reason to put everything about postcar_frame into memmap.c files instead. CB:34894 I was hoping we could evolve from CB:34897 and have the platform code just tell the absolute upper boundary for WB (often end of TSEG with alignment no smaller than 8 MiB) and a floating lower boundary that is guaranteed to cover all of CBMEM. But I believe Aaron commented UC holes would be required. I just don't see why anyone would access those (claimed UC-only) regions before MP init where reprogramming of all the MTRRs happens. -- To view, visit https://review.coreboot.org/c/coreboot/+/35029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62d89cb35d8b5082d49c80aea55ac34dbb3b10ff Gerrit-Change-Number: 35029 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org> Gerrit-Reviewer: David Guckian <david.guckian@intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan@google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya@intel.com> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio@intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Thu, 22 Aug 2019 13:37:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment