January 2022 - coreboot-gerrit

Change in coreboot[master]: soc/intel/common: Remove unnecessary new lines throughout the crashlog.c
by Subrata Banik (Code Review) Jan. 1, 2022

Jan. 1, 2022

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60622 ) Change subject: soc/intel/common: Remove unnecessary new lines throughout the crashlog.c ...................................................................... soc/intel/common: Remove unnecessary new lines throughout the crashlog.c Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I0920f563d6fdf9414eab86796cedcac83173dba3 --- M src/soc/intel/common/block/crashlog/crashlog.c 1 file changed, 0 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/60622/1 diff --git a/src/soc/intel/common/block/crashlog/crashlog.c b/src/soc/intel/common/block/crashlog/crashlog.c index 8c31d03..4081182 100644 --- a/src/soc/intel/common/block/crashlog/crashlog.c +++ b/src/soc/intel/common/block/crashlog/crashlog.c @@ -6,82 +6,67 @@ #include <intelblocks/crashlog.h> #include <string.h> - int __weak cl_get_cpu_record_size(void) { return 0; } - int __weak cl_get_pmc_record_size(void) { return 0; } - u32 __weak cl_get_cpu_bar_addr(void) { return 0; } - u32 __weak cl_get_cpu_tmp_bar(void) { return 0; } - u32 __weak cl_get_cpu_mb_int_addr(void) { return 0; } - int __weak cl_get_total_data_size(void) { return cl_get_cpu_record_size() + cl_get_pmc_record_size(); } - bool __weak cl_pmc_sram_has_mmio_access(void) { return false; } - bool __weak cpu_crashlog_support(void) { return false; } - bool __weak pmc_crashlog_support(void) { return false; } - bool __weak cl_cpu_data_present(void) { return false; } - bool __weak cl_pmc_data_present(void) { return false; } - __weak void reset_discovery_buffers(void) {} - __weak void update_new_pmc_crashlog_size(u32 *pmc_crash_size) {} - __weak void update_new_cpu_crashlog_size(u32 *cpu_crash_size) {} - pmc_ipc_discovery_buf_t __weak cl_get_pmc_discovery_buf(void) { pmc_ipc_discovery_buf_t discov_buf; @@ -89,7 +74,6 @@ return discov_buf; } - pmc_crashlog_desc_table_t __weak cl_get_pmc_descriptor_table(void) { pmc_crashlog_desc_table_t desc_tab; @@ -97,7 +81,6 @@ return desc_tab; } - cpu_crashlog_discovery_table_t __weak cl_get_cpu_discovery_table(void) { cpu_crashlog_discovery_table_t cpu_disc_tab; @@ -105,7 +88,6 @@ return cpu_disc_tab; } - int cpu_cl_poll_mailbox_ready(u32 cl_mailbox_addr) { cpu_crashlog_mailbox_t cl_mailbox_interface; @@ -127,7 +109,6 @@ return 1; } - int cpu_cl_mailbox_cmd(u8 cmd, u8 param) { cpu_crashlog_mailbox_t cl_mailbox_intf; @@ -149,13 +130,11 @@ return 1; } - int cpu_cl_clear_data(void) { return cpu_cl_mailbox_cmd(CPU_CRASHLOG_CMD_CLEAR, 0); } - int pmc_cl_gen_descriptor_table(u32 desc_table_addr, pmc_crashlog_desc_table_t *descriptor_table) { @@ -178,19 +157,16 @@ return total_data_size; } - bool __weak pmc_cl_discovery(void) { return false; } - bool __weak cpu_cl_discovery(void) { return false; } - int cl_pmc_re_arm_after_reset(void) { @@ -213,7 +189,6 @@ return r; } - /* Sends PMC IPC to clear CrashLog from PMC SSRAM area */ int cl_pmc_clear(void) { @@ -236,12 +211,10 @@ return r; } - /* * Sends PMC IPC to populate CrashLog on all reboot. * The SSRAM area will be cleared on G3 by PMC automatically */ - int cl_pmc_en_gen_on_all_reboot(void) { const struct pmc_ipc_buffer req = { 0 }; @@ -263,7 +236,6 @@ return r; } - bool discover_crashlog(void) { bool cpu_cl_discovered = false, pmc_cl_discovered = false; @@ -279,7 +251,6 @@ return (cpu_cl_discovered || pmc_cl_discovered); } - bool cl_copy_data_from_sram(u32 src_bar, u32 offset, u32 size, @@ -320,7 +291,6 @@ return true; } - void cl_get_pmc_sram_data(void) { u32 *dest = NULL; @@ -413,7 +383,6 @@ } - void cl_get_cpu_sram_data(void) { u32 tmp_bar_addr = 0; @@ -471,10 +440,8 @@ /* clear telemetry SRAM region */ cpu_cl_clear_data(); - } - void collect_pmc_and_cpu_crashlog_from_srams(void) { if (pmc_crashlog_support() && cl_pmc_data_present() @@ -499,7 +466,6 @@ } } - bool cl_fill_cpu_records(void *cl_record) { void *cl_src_addr = NULL; @@ -518,7 +484,6 @@ return true; } - bool cl_fill_pmc_records(void *cl_record) { void *cl_src_addr = NULL; -- To view, visit https://review.coreboot.org/c/coreboot/+/60622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0920f563d6fdf9414eab86796cedcac83173dba3 Gerrit-Change-Number: 60622 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: src/soc/mediatek: Remove unused <delay.h>
by Yu-Ping Wu (Code Review) Jan. 1, 2022

Jan. 1, 2022

Attention is currently required from: HAOUAS Elyes. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60603 ) Change subject: src/soc/mediatek: Remove unused <delay.h> ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I414ad3824819f441f316567795999ed9539cba7b Gerrit-Change-Number: 60603 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Jan 2022 10:08:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek: Remove unused <string.h>
by Yu-Ping Wu (Code Review) Jan. 1, 2022

Jan. 1, 2022

Attention is currently required from: Xi Chen, Paul Menzel, HAOUAS Elyes. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60559 ) Change subject: soc/mediatek: Remove unused <string.h> ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60559 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8f88541dce457e978a2cbea036d4f6eae387963f Gerrit-Change-Number: 60559 Gerrit-PatchSet: 5 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Jan 2022 10:08:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: src/soc/mediatek: Remove unused <timer.h>
by Yu-Ping Wu (Code Review) Jan. 1, 2022

Jan. 1, 2022

Attention is currently required from: HAOUAS Elyes. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60612 ) Change subject: src/soc/mediatek: Remove unused <timer.h> ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60612 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic87e41a9b317cc7d0b36ece5ffd1d32068e6a33a Gerrit-Change-Number: 60612 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Jan 2022 10:07:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/mt8186: Increase size of CBFS_MCACHE
by Paul Menzel (Code Review) Jan. 1, 2022

Jan. 1, 2022

Attention is currently required from: Rex-BC Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase size of CBFS_MCACHE ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60529/comment/c61dfcc1_af1ca94e PS5, Line 7: soc/mediatek/mt8186: Increase size of CBFS_MCACHE Please mention the new size. > Increase CBFS_MCACHE size to 8 KiB -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 10:05:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: util: Allow overriding install options
by Paul Menzel (Code Review) Jan. 1, 2022

Jan. 1, 2022

Attention is currently required from: Tim Crawford. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60540 ) Change subject: util: Allow overriding install options ...................................................................... Patch Set 1: (1 comment) File util/ectool/Makefile: https://review.coreboot.org/c/coreboot/+/60540/comment/0d0219af_c393b501 PS1, Line 8: PREFIX ?= /usr/local Actually that is a GNU extension, and not really needed [1], as it can be overridden by: make PREFIX=/usr or PREFIX=/usr make -e [1]: https://lists.suckless.org/dev/2112/index.html#msg34568 -- To view, visit https://review.coreboot.org/c/coreboot/+/60540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a31ea0fde9922731e1621dcc8f94b2c1326c93c Gerrit-Change-Number: 60540 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 09:58:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: src/soc/mediatek: Remove unused <timer.h>
by Hung-Te Lin (Code Review) Dec. 31, 2021

Dec. 31, 2021

Attention is currently required from: Yu-Ping Wu, HAOUAS Elyes. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60612 ) Change subject: src/soc/mediatek: Remove unused <timer.h> ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: re-assign to yupingso@ -- To view, visit https://review.coreboot.org/c/coreboot/+/60612 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic87e41a9b317cc7d0b36ece5ffd1d32068e6a33a Gerrit-Change-Number: 60612 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Jan 2022 03:37:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/mt8186: Increase size of CBFS_MCACHE
by Hung-Te Lin (Code Review) Dec. 31, 2021

Dec. 31, 2021

Attention is currently required from: Rex-BC Chen. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase size of CBFS_MCACHE ...................................................................... Patch Set 5: (1 comment) File src/soc/mediatek/mt8186/include/soc/memlayout.ld: https://review.coreboot.org/c/coreboot/+/60529/comment/5a051899_07182518 PS5, Line 28: STACK(0x0010B000, 7K) : TPM_TCPA_LOG(0x0010CC00, 2K) : FMAP_CACHE(0x0010D400, 2K) : WATCHDOG_TOMBSTONE(0x0010DC00, 4) : CBFS_MCACHE(0x0010DC04, 8K - 4) : TIMESTAMP(0x0010FC00, 1K) I think we want to prevent unaligned regions. Can we re-order to VB2_WORK (12k) TTB (28k) - 40 DMA_COHERENT (4k) - 44k TPM_TCPA_LOG (2k) - 46k FMAP_CACHE (4k) - 48k WATCHDOG_TOMBSTONE (4) CBFS_MCACHE (8k-4) 56k STACK (7k) - 63k TIMESTAMP (1k) - 64k -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Sat, 01 Jan 2022 03:34:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/corsola: Initialize krabby display
by Hung-Te Lin (Code Review) Dec. 31, 2021

Dec. 31, 2021

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60447 ) Change subject: mb/google/corsola: Initialize krabby display ...................................................................... mb/google/corsola: Initialize krabby display PS8640 is used on Krabby board as the eDP bridge IC. Enable PS8640 and configure display in mainboard_init() to support display in firmware screen. BUG=b:210806060 TEST=saw firmware display on eDP panel of krabby and kingler. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60447 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/display.c M src/mainboard/google/corsola/display.h 3 files changed, 89 insertions(+), 25 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index f6be164..88b390d 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -38,6 +38,7 @@ select MAINBOARD_HAS_NATIVE_VGA_INIT select HAVE_LINEAR_FRAMEBUFFER select DRIVER_ANALOGIX_ANX7625 + select DRIVER_PARADE_PS8640 config MAINBOARD_DIR string diff --git a/src/mainboard/google/corsola/display.c b/src/mainboard/google/corsola/display.c index 6e4cbe5..fd269ec 100644 --- a/src/mainboard/google/corsola/display.c +++ b/src/mainboard/google/corsola/display.c @@ -1,28 +1,60 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <assert.h> #include <console/console.h> #include <delay.h> #include <drivers/analogix/anx7625/anx7625.h> -#include <edid.h> +#include <drivers/parade/ps8640/ps8640.h> #include <gpio.h> #include <soc/ddp.h> #include <soc/dsi.h> #include <soc/gpio_common.h> +#include <soc/regulator.h> #include <soc/i2c.h> #include <soc/mtcmos.h> #include "display.h" #include "gpio.h" -/* Set up backlight control pins as output pin and power-off by default */ -static void configure_backlight_and_bridge(void) +/* Bridge functions */ +static void bridge_ps8640_power_on(void) { - /* Disable backlight before turning on bridge */ - gpio_output(GPIO_AP_EDP_BKLTEN, 0); - gpio_output(GPIO_BL_PWM_1V8, 0); - gpio_output(GPIO_EN_PP3300_DISP_X, 1); + /* Set VRF12 to 1.2V and VCN33 to 3.3V */ + mainboard_set_regulator_vol(MTK_REGULATOR_VRF12, 1200000); + mainboard_set_regulator_vol(MTK_REGULATOR_VCN33, 3300000); + udelay(200); /* Turn on bridge */ + gpio_output(GPIO_EDPBRDG_PWREN, 1); + gpio_output(GPIO_EDPBRDG_RST_L, 0); + mdelay(2); + gpio_output(GPIO_EDPBRDG_RST_L, 1); +} + +static int bridge_ps8640_get_edid(u8 i2c_bus, struct edid *edid) +{ + const u8 chip = 0x8; + + if (ps8640_init(i2c_bus, chip) < 0) { + printk(BIOS_ERR, "%s: Can't init PS8640 bridge\n", __func__); + return -1; + } + if (ps8640_get_edid(i2c_bus, chip, edid) < 0) { + printk(BIOS_ERR, "%s: Can't get panel's edid\n", __func__); + return -1; + } + return 0; +} + +static int bridge_ps8640_post_power_on(u8 i2c_bus, struct edid *edid) +{ + /* Do nothing */ + return 0; +} + +static void bridge_anx7625_power_on(void) +{ + /* Turn on bridge */ gpio_output(GPIO_EDPBRDG_RST_L, 0); gpio_output(GPIO_EN_PP1000_EDPBRDG, 1); gpio_output(GPIO_EN_PP1800_EDPBRDG, 1); @@ -33,7 +65,7 @@ gpio_output(GPIO_EDPBRDG_RST_L, 1); } -static int anx7625_setup(u8 i2c_bus, struct edid *edid) +static int bridge_anx7625_get_edid(u8 i2c_bus, struct edid *edid) { if (anx7625_init(i2c_bus) < 0) { printk(BIOS_ERR, "%s: Can't init ANX7625 bridge\n", __func__); @@ -46,36 +78,59 @@ return 0; } -static int bridge_setup(u8 i2c_bus, struct edid *edid) +static int bridge_anx7625_post_power_on(u8 i2c_bus, struct edid *edid) { - if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) - return anx7625_setup(i2c_bus, edid); - else - printk(BIOS_ERR, "%s: There is no bridge IC supported\n", __func__); - - return -1; + return anx7625_dp_start(i2c_bus, edid); } -static int bridge_post_poweron(u8 i2c_bus, struct edid *edid) +/* Display function */ +static void backlight_control(void) { - if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) - return anx7625_dp_start(i2c_bus, edid); - - return 0; + /* Disable backlight before turning on bridge */ + gpio_output(GPIO_AP_EDP_BKLTEN, 0); + gpio_output(GPIO_BL_PWM_1V8, 0); + gpio_output(GPIO_EN_PP3300_DISP_X, 1); } +static const struct edp_bridge anx7625_bridge = { + .power_on = bridge_anx7625_power_on, + .get_edid = bridge_anx7625_get_edid, + .post_power_on = bridge_anx7625_post_power_on, +}; + +static const struct edp_bridge ps8640_bridge = { + .power_on = bridge_ps8640_power_on, + .get_edid = bridge_ps8640_get_edid, + .post_power_on = bridge_ps8640_post_power_on, +}; + +_Static_assert(CONFIG(BOARD_GOOGLE_KINGLER_COMMON) + CONFIG(BOARD_GOOGLE_KRABBY_COMMON) == 1, + "Exactly one of KINGLER and KRABBY must be set"); + int configure_display(void) { struct edid edid; const u8 i2c_bus = I2C0; + const struct edp_bridge *bridge; + + if (CONFIG(BOARD_GOOGLE_KINGLER_COMMON)) + bridge = &anx7625_bridge; + else /* BOARD_GOOGLE_KRABBY_COMMON */ + bridge = &ps8640_bridge; printk(BIOS_INFO, "%s: Starting display init\n", __func__); - configure_backlight_and_bridge(); mtk_i2c_bus_init(i2c_bus, I2C_SPEED_FAST); - if (bridge_setup(i2c_bus, &edid) < 0) { - printk(BIOS_ERR, "%s: Failed to set bridge\n", __func__); + /* Set up backlight control pins as output pin and power-off by default */ + backlight_control(); + + assert(bridge->power_on); + bridge->power_on(); + + assert(bridge->get_edid); + if (bridge->get_edid(i2c_bus, &edid) < 0) { + printk(BIOS_ERR, "%s: Failed to get edid\n", __func__); return -1; } @@ -101,8 +156,8 @@ return -1; } - if (bridge_post_poweron(i2c_bus, &edid) < 0) { - printk(BIOS_ERR, "%s: Failed to post poweron bridge\n", __func__); + if (bridge->post_power_on(i2c_bus, &edid) < 0) { + printk(BIOS_ERR, "%s: Failed to post power on bridge\n", __func__); return -1; } diff --git a/src/mainboard/google/corsola/display.h b/src/mainboard/google/corsola/display.h index 525422b..4e883f2 100644 --- a/src/mainboard/google/corsola/display.h +++ b/src/mainboard/google/corsola/display.h @@ -3,6 +3,14 @@ #ifndef __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__ #define __MAINBOARD_GOOGLE_CORSOLA_DISPLAY_H__ +#include <edid.h> + +struct edp_bridge { + void (*power_on)(void); + int (*get_edid)(u8 i2c_bus, struct edid *edid); + int (*post_power_on)(u8 i2c_bus, struct edid *edid); +}; + int configure_display(void); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/60447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I314d5407c40429bb7bc50f36fece58e396b27548 Gerrit-Change-Number: 60447 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/google/corsola: Remove 'corsola' from Kconfig board names
by Hung-Te Lin (Code Review) Dec. 31, 2021

Dec. 31, 2021

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60515 ) Change subject: mb/google/corsola: Remove 'corsola' from Kconfig board names ...................................................................... mb/google/corsola: Remove 'corsola' from Kconfig board names The 'Corsola' (MT8186 Chromebooks) family has two reference designs (Krabby and Kingler) and all real implementations should follow either one of the two. To prevent confusion, we should remove the 'corsola' configuration from Kconfig board names. BUG=b:210806060 TEST=emerge-corsola coreboot Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ib354054e358c0783f6221c2e2a1730b5c6ddba33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60515 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/Kconfig.name 2 files changed, 0 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index 702c3fc..f6be164 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -45,7 +45,6 @@ config MAINBOARD_PART_NUMBER string - default "Corsola" if BOARD_GOOGLE_CORSOLA default "Kingler" if BOARD_GOOGLE_KINGLER default "Krabby" if BOARD_GOOGLE_KRABBY diff --git a/src/mainboard/google/corsola/Kconfig.name b/src/mainboard/google/corsola/Kconfig.name index 0953220..85cb41e 100644 --- a/src/mainboard/google/corsola/Kconfig.name +++ b/src/mainboard/google/corsola/Kconfig.name @@ -1,9 +1,3 @@ -comment "Corsola" - -config BOARD_GOOGLE_CORSOLA - bool "-> Corsola" - select BOARD_GOOGLE_CORSOLA_COMMON - comment "Kingler" config BOARD_GOOGLE_KINGLER -- To view, visit https://review.coreboot.org/c/coreboot/+/60515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib354054e358c0783f6221c2e2a1730b5c6ddba33 Gerrit-Change-Number: 60515 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0