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September 2021

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Change in coreboot[master]: soc/amd/common: Change default spi speeds to 33MHz
by Felix Held (Code Review) Sept. 1, 2021

Sept. 1, 2021

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57148 ) Change subject: soc/amd/common: Change default spi speeds to 33MHz ...................................................................... soc/amd/common: Change default spi speeds to 33MHz In CB:56884 we discussed changing the default fast_read speed from 66MHz, which some platforms may not be capable of running, to 33MHz, which should be generally suitable for all platforms. This same change has been applied to the default for all SPI speeds. Signed-off-by: Martin Roth <martinroth(a)chromium.org> Change-Id: Ibf926df6829ffdcbae947aaa245356f219615ce8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57148 Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/common/block/spi/Kconfig 1 file changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/soc/amd/common/block/spi/Kconfig b/src/soc/amd/common/block/spi/Kconfig index 8853f6f..eb67597 100644 --- a/src/soc/amd/common/block/spi/Kconfig +++ b/src/soc/amd/common/block/spi/Kconfig @@ -37,7 +37,7 @@ int range 0 5 default 3 if EM100 - default 0 + default 1 help SPI Fast Speed to be programmed by the PSP. 0: 66.66Mhz @@ -77,7 +77,7 @@ int range 0 5 default 3 if EM100 - default 0 + default 1 help SPI ALT Speed to be programmed by coreboot. 0: 66.66Mhz @@ -91,7 +91,7 @@ int range 0 5 default 3 if EM100 - default 0 + default 1 help SPI TPM Speed to be programmed by coreboot. 0: 66.66Mhz -- To view, visit https://review.coreboot.org/c/coreboot/+/57148 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf926df6829ffdcbae947aaa245356f219615ce8 Gerrit-Change-Number: 57148 Gerrit-PatchSet: 4 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/system76/*: cmos.layout: Reserve century byte
by Tim Crawford (Code Review) Sept. 1, 2021

Sept. 1, 2021

Attention is currently required from: Jeremy Soller. Hello build bot (Jenkins), Jeremy Soller, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57055 to look at the new patch set (#2). Change subject: mb/system76/*: cmos.layout: Reserve century byte ...................................................................... mb/system76/*: cmos.layout: Reserve century byte Windows will write to the century byte (0x32), causing the option table checksum to be invalid and reset all options to their default values. Move options and checksum to start after the century byte. Change-Id: Ia395acacda1e251251c880587bbf61d7ee81ba3d Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/gaze15/cmos.layout M src/mainboard/system76/lemp9/cmos.layout M src/mainboard/system76/oryp5/cmos.layout M src/mainboard/system76/oryp6/cmos.layout M src/mainboard/system76/whl-u/cmos.layout 5 files changed, 25 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/57055/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia395acacda1e251251c880587bbf61d7ee81ba3d Gerrit-Change-Number: 57055 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-MessageType: newpatchset

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