November 2014 - coreboot-gerrit

Patch set updated for coreboot: 0739cbf cpu/amd/agesa/family15rl/model_15_init.c: Enable TopologyExtensions
by Edward O'Callaghan Nov. 30, 2014

Nov. 30, 2014

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7616 -gerrit commit 0739cbf69b44b77238df34e41ea5d5a0fc27079e Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Mon Dec 1 03:37:04 2014 +1100 cpu/amd/agesa/family15rl/model_15_init.c: Enable TopologyExtensions Change-Id: Ifaad4c3e9be01fa27956ea0c9efb9beddda4a6d2 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/cpu/amd/agesa/family15rl/model_15_init.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/cpu/amd/agesa/family15rl/model_15_init.c b/src/cpu/amd/agesa/family15rl/model_15_init.c index 5cf78d1..dc6d748 100644 --- a/src/cpu/amd/agesa/family15rl/model_15_init.c +++ b/src/cpu/amd/agesa/family15rl/model_15_init.c @@ -103,6 +103,18 @@ static void model_15_init(device_t dev) printk(BIOS_DEBUG, "siblings = %02d, ", siblings); #endif + /* Enable TopologyExtensions */ + msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR); + uint64_t msr_bit54 = BIT_64(54); + msr.lo |= msr_bit54 >> 32; + msr.hi |= msr_bit54 & 32; + wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr); + msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR); + if (msr.lo & (msr_bit54 >> 32)) { + cpu_idx = cpu_info()->index; + printk(BIOS_INFO, "Initializing Topology Extensions Support for CPU %u\n", cpu_idx); + } + /* DisableCf8ExtCfg */ msr = rdmsr(NB_CFG_MSR); msr.hi &= ~(1 << (46 - 32));

1 0

New patch to review for coreboot: 6846335 arch/x86/include/stdint.h: Introduce BitOp manipulation formalism
by Edward O'Callaghan Nov. 30, 2014

Nov. 30, 2014

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7617 -gerrit commit 6846335b576d3c623b418e4b9d22c61e6632be33 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Mon Dec 1 04:04:49 2014 +1100 arch/x86/include/stdint.h: Introduce BitOp manipulation formalism Change-Id: Id5dbfd04cb579cf3b496a9fb3b68a47b3d442deb Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/arch/x86/include/stdint.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/arch/x86/include/stdint.h b/src/arch/x86/include/stdint.h index c491f4b..f4604ac 100644 --- a/src/arch/x86/include/stdint.h +++ b/src/arch/x86/include/stdint.h @@ -89,6 +89,19 @@ typedef int32_t s32; #define PRIu64 "llu" #endif +#define S8_C(x) x +#define U8_C(x) x ## U +#define S16_C(x) x +#define U16_C(x) x ## U +#define S32_C(x) x +#define U32_C(x) x ## U +#define S64_C(x) x ## LL +#define U64_C(x) x ## ULL + +#define BIT_8(n) (U8_C(1) << (n)) +#define BIT_16(n) (U16_C(1) << (n)) +#define BIT_32(n) (U32_C(1) << (n)) +#define BIT_64(n) (U64_C(1) << (n)) #undef __HAVE_LONG_LONG__

1 0

New patch to review for coreboot: 68767d0 cpu/amd/agesa/family15rl/model_15_init.c: Enable TopologyExtensions
by Edward O'Callaghan Nov. 30, 2014

Nov. 30, 2014

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7616 -gerrit commit 68767d01ef41a3fdfb078862b22541789e0319e9 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Mon Dec 1 03:37:04 2014 +1100 cpu/amd/agesa/family15rl/model_15_init.c: Enable TopologyExtensions Change-Id: Ifaad4c3e9be01fa27956ea0c9efb9beddda4a6d2 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/cpu/amd/agesa/family15rl/model_15_init.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/cpu/amd/agesa/family15rl/model_15_init.c b/src/cpu/amd/agesa/family15rl/model_15_init.c index 5cf78d1..4cba6ea 100644 --- a/src/cpu/amd/agesa/family15rl/model_15_init.c +++ b/src/cpu/amd/agesa/family15rl/model_15_init.c @@ -103,6 +103,17 @@ static void model_15_init(device_t dev) printk(BIOS_DEBUG, "siblings = %02d, ", siblings); #endif + /* Enable TopologyExtensions */ + msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR); + msr.lo |= 1UL << 22; /* msr |= 1ULL << 54; */ + msr.hi |= 0UL; + wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr); + msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR); + if (msr.lo & (1UL << 22)) { + cpu_idx = cpu_info()->index; + printk(BIOS_INFO, "Initializing Topology Extensions Support for CPU %u\n", cpu_idx); + } + /* DisableCf8ExtCfg */ msr = rdmsr(NB_CFG_MSR); msr.hi &= ~(1 << (46 - 32));

1 0

Patch merged into coreboot/master: 126a2a8 gigabyte/ga-b75m-d3h: Add new Intel mainboard
by gerrit＠coreboot.org Nov. 30, 2014

Nov. 30, 2014

the following patch was just integrated into master: commit 126a2a8a78731b0f913ac0f876b4238359a483b8 Author: Damien Zammit <damien(a)zamaudio.com> Date: Fri Nov 28 15:59:10 2014 +1100 gigabyte/ga-b75m-d3h: Add new Intel mainboard This is based on LENOVO X230 port. Board boots to linux via SATA or USB. All USB ports are working. Remaining Issues: 1. Native raminit sometimes fails with "timC write discovery failed" even without changing the ram configuration. I suggest altering the native raminit code so that it reboots if that message appears to give a chance for the boot process to recover. 2. VGA does not work. Native graphics initialization only supports LVDS and the VGA Option ROM still hangs when run in SeaBIOS. Change-Id: I91a7aab96d6c5f213b097cd55fcc47d4c94b3172 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: http://review.coreboot.org/7341 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/7341 for details. -gerrit

1 0

Patch merged into coreboot/master: 6d0cba7 gcc.c: Test for gcc, not for non-clang
by gerrit＠coreboot.org Nov. 30, 2014

Nov. 30, 2014

the following patch was just integrated into master: commit 6d0cba7978913b8f28257a0bb2e38eeb9965efc3 Author: Patrick Georgi <pgeorgi(a)google.com> Date: Sat Nov 29 11:32:12 2014 +0100 gcc.c: Test for gcc, not for non-clang This is gcc specific, not necessary-everywhere-but-on-clang. Change-Id: Ie02587bd41c856cbf730ea2f72f594a20b5fefbe Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: http://review.coreboot.org/7609 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/7609 for details. -gerrit

1 0

Patch merged into coreboot/master: 32a5a5f buildgcc: support DESTDIR for libelf
by gerrit＠coreboot.org Nov. 30, 2014

Nov. 30, 2014

the following patch was just integrated into master: commit 32a5a5f467e6a69647912cecc4fee9e8fc7cfea3 Author: Patrick Georgi <pgeorgi(a)google.com> Date: Sat Nov 29 14:43:35 2014 +0100 buildgcc: support DESTDIR for libelf The libelf build system doesn't support the DESTDIR variable. Work around by mangling prefix when installing. Change-Id: I3a56eb2bf919bcb9b586b945dce26a02dbaff931 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: http://review.coreboot.org/7613 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/7613 for details. -gerrit

1 0

Patch merged into coreboot/master: 4f75af9 Unify remaining binutils invocations
by gerrit＠coreboot.org Nov. 30, 2014

Nov. 30, 2014

the following patch was just integrated into master: commit 4f75af9fe26bf8c741d7877c79a24ae1a521aae7 Author: Patrick Georgi <pgeorgi(a)google.com> Date: Sat Nov 29 11:41:35 2014 +0100 Unify remaining binutils invocations No need to pass calls through gcc in one case and directly to binutils in another. Just always call binutils. Change-Id: Icf9660ce40d3c23f96dfab6a73c169ff07d3e42b Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: http://review.coreboot.org/7610 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/7610 for details. -gerrit

1 0

Patch merged into coreboot/master: 02ac6c3 build system: only do the compiler test for gcc
by gerrit＠coreboot.org Nov. 30, 2014

Nov. 30, 2014

the following patch was just integrated into master: commit 02ac6c3572e2aedae256597133a1414c0e2e7f0c Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Nov 28 23:08:51 2014 +0100 build system: only do the compiler test for gcc There isn't a history of broken clang compilers yet so let's give it a chance. Change-Id: Iddb63700e3850116313c1ddee69111f936191055 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: http://review.coreboot.org/7607 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7607 for details. -gerrit

1 0

Patch merged into coreboot/master: bd79c5e Replace hlt() loops with halt()
by gerrit＠coreboot.org Nov. 30, 2014

Nov. 30, 2014

the following patch was just integrated into master: commit bd79c5eaf1f13f33c43c99657f24fa4c0330619a Author: Patrick Georgi <pgeorgi(a)google.com> Date: Fri Nov 28 22:35:36 2014 +0100 Replace hlt() loops with halt() Change-Id: I8486e70615f4c404a342cb86963b5357a934c41d Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: http://review.coreboot.org/7606 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7606 for details. -gerrit

1 0

Patch merged into coreboot/master: 1b2f2a0 Introduce halt()
by gerrit＠coreboot.org Nov. 30, 2014

Nov. 30, 2014

the following patch was just integrated into master: commit 1b2f2a071488bd15ce80194e85d318cd44659e54 Author: Patrick Georgi <pgeorgi(a)google.com> Date: Fri Nov 28 22:00:22 2014 +0100 Introduce halt() It's a portable and generic way to halt the system. Useful when waiting for the platform to reset. Change-Id: Ie07f3333d294a4d3e982cbc2ab9014c94b39fce0 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: http://review.coreboot.org/7605 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/7605 for details. -gerrit

1 0