March 2013 - coreboot-gerrit - mail.coreboot.org

Patch set updated for coreboot: 3016115 util/cbmem: Don't output trailing garbage for cbmemc
by Vladimir Serbinenko March 30, 2013

March 30, 2013

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2991 -gerrit commit 3016115362a30db0f1334f3ac26d50eea80c5199 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat Mar 30 12:15:12 2013 +0100 util/cbmem: Don't output trailing garbage for cbmemc Current code outputs the whole cbmemc buffer even if only part of it is really used. Fix it to output only really used part and notify the user if the buffer was too small for the required data. Change-Id: I68c1970cf84d49b2d7d6007dae0679d7a7a0cb99 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- util/cbmem/cbmem.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index bc6bd6b..6051323 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -308,12 +308,21 @@ static void dump_timestamps(void) unmap_memory(); } +static const char *future_ngettext (const char *sing, const char *plural, + unsigned long int n) +{ + if (n == 1) + return sing; + return plural; +} + /* dump the cbmem console */ static void dump_console(void) { void *console_p; char *console_c; uint32_t size; + uint32_t cursor; if (console.tag != LB_TAG_CBMEM_CONSOLE) { fprintf(stderr, "No console found in coreboot table.\n"); @@ -328,6 +337,12 @@ static void dump_console(void) * Hence we have to add 8 to get to the actual console string. */ size = *(uint32_t *)console_p; + cursor = *(uint32_t *) (console_p + 4); + /* Cursor continues to go on even after no more data fits in + * the buffer but the data is dropped in this case. + */ + if (size > cursor) + size = cursor; console_c = malloc(size + 1); if (!console_c) { fprintf(stderr, "Not enough memory for console.\n"); @@ -337,7 +352,11 @@ static void dump_console(void) memcpy(console_c, console_p + 8, size); console_c[size] = 0; - printf("%s", console_c); + printf("%s\n", console_c); + if (size < cursor) + printf(future_ngettext("one byte lost\n", + "%d bytes lost\n", cursor - size), + cursor - size); free(console_c);

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Patch set updated for coreboot: 95ae323 util/cbmem: Don't output trailing garbage for cbmemc
by Vladimir Serbinenko March 30, 2013

March 30, 2013

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2991 -gerrit commit 95ae32391716cf538a2889444b32a82adcac3839 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat Mar 30 12:15:12 2013 +0100 util/cbmem: Don't output trailing garbage for cbmemc Current code outputs the whole cbmemc buffer even if only part of it is really used. Fix it to output only really used part and notify the user if the buffer was too small for the required data. Change-Id: I68c1970cf84d49b2d7d6007dae0679d7a7a0cb99 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- util/cbmem/cbmem.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index bc6bd6b..e12446a 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -308,12 +308,21 @@ static void dump_timestamps(void) unmap_memory(); } +static const char *future_ngettext (const char *sing, const char *plural, + unsigned long int n) +{ + if (n == 1) + return sing; + return plural; +} + /* dump the cbmem console */ static void dump_console(void) { void *console_p; char *console_c; uint32_t size; + uint32_t cursor; if (console.tag != LB_TAG_CBMEM_CONSOLE) { fprintf(stderr, "No console found in coreboot table.\n"); @@ -328,6 +337,12 @@ static void dump_console(void) * Hence we have to add 8 to get to the actual console string. */ size = *(uint32_t *)console_p; + cursor = *(uint32_t *) (console_p + 4); + /* Cursor continues to go on even after no more data fits in + * the buffer but the data is dropped in this case. + */ + if (size > cursor) + size = cursor; console_c = malloc(size + 1); if (!console_c) { fprintf(stderr, "Not enough memory for console.\n"); @@ -337,7 +352,11 @@ static void dump_console(void) memcpy(console_c, console_p + 8, size); console_c[size] = 0; - printf("%s", console_c); + printf("%s\n", console_c); + if (size < cursor) + printf(future_ngettext("one byte lost\n" : + "%d bytes lost\n", cursor - size), + cursor - size); free(console_c);

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Patch merged into coreboot/master: f6763db wtm1/wtm2/baskingridge: Enable TPM ACPI device
by gerrit＠coreboot.org March 30, 2013

March 30, 2013

the following patch was just integrated into master: commit f6763db83e7cf45f1ece8c1c8ecefe2b6a9f886d Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 22 11:01:37 2013 -0700 wtm1/wtm2/baskingridge: Enable TPM ACPI device This enables the TPM device in ACPI tables so the OS is able to probe for the TPM without needing it be force loaded. Change-Id: I21e660ac1c12e3e1341cf266cf8f0bf03763df5a Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2968 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Fri Mar 29 22:52:17 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Sat Mar 30 22:07:04 2013, giving +2 See http://review.coreboot.org/2968 for details. -gerrit

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Patch set updated for coreboot: 33191fd Intel: Return and warn when NULL is passed to `intel_update_microcode`
by Paul Menzel March 30, 2013

March 30, 2013

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2990 -gerrit commit 33191fd5e9fee00f23eea172402a57070430d5c5 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Tue Mar 12 15:53:44 2013 +0100 Intel: Return and warn when NULL is passed to `intel_update_microcode` Not selecting `CPU_MICROCODE_IN_CBFS` in Kconfig and calling the function `intel_update_microcode` with NULL results in a crash due to the null pointer being dereferenced later on. for(c = microcode_updates; m->hdrver; m = (const struct microcode *)c) { Fix this by just returning if `microcode_updates` is `NULL` and by printing a warning. This patch is successfully tested on the Lenovo X201. Change-Id: I6e18fd37256910bf047061e4633a66cf29ad7b69 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/cpu/intel/microcode/microcode.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index d908c25..440afa9 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -131,7 +131,10 @@ const void *intel_microcode_find(void) #endif if (!microcode_updates) - return microcode_updates; + /* No need for an explicit error message since the user + * already gets "file not found" from CBFS. + */ + return microcode_updates; /* NULL */ /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */ msr.lo = 0; @@ -202,6 +205,12 @@ void intel_update_microcode(const void *microcode_updates) const char *c; msr_t msr; + if (!microcode_updates) { + printk(BIOS_WARNING, "%s: No microcode update was passed! (microcode_updates = NULL)\n", + __func__); + return; + } + /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */ msr.lo = 0; msr.hi = 0;

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Patch set updated for coreboot: 6f3d77f Intel: Return and warn when NULL is passed to `intel_update_microcode`
by Paul Menzel March 30, 2013

March 30, 2013

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2990 -gerrit commit 6f3d77f45a09d587391330f92ddd930c5e027d02 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Tue Mar 12 15:53:44 2013 +0100 Intel: Return and warn when NULL is passed to `intel_update_microcode` Not selecting `CPU_MICROCODE_IN_CBFS` in Kconfig and calling the function `intel_update_microcode` with NULL results in a crash due to the null pointer being dereferenced later on. for(c = microcode_updates; m->hdrver; m = (const struct microcode *)c) { Fix this by just returning if `microcode_updates` is `NULL` and by printing a warning. This patch is successfully tested on the Lenovo X201. Change-Id: I6e18fd37256910bf047061e4633a66cf29ad7b69 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/cpu/intel/microcode/microcode.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index d908c25..25fb3b2 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -131,7 +131,10 @@ const void *intel_microcode_find(void) #endif if (!microcode_updates) - return microcode_updates; + /* No need for an explicit error message since the user + * already gets "file not found" from CBFS. + */ + return microcode_updates; /* NULL */ /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */ msr.lo = 0; @@ -202,6 +205,12 @@ void intel_update_microcode(const void *microcode_updates) const char *c; msr_t msr; + if (!microcode_updates) { + printk(BIOS_WARNING, "%s: No microcode update was passed! (microcode_updates = NULL)", + "Do not select `CPU_MICROCODE_IN_CBFS` for your board.", __func__); + return; + } + /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */ msr.lo = 0; msr.hi = 0;

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Patch set updated for coreboot: aeb2854 Intel: Return on missing microcode file to fix null pointer dereference
by Vladimir Serbinenko March 30, 2013

March 30, 2013

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2990 -gerrit commit aeb285408b849f9542f84e94e92946c195749fed Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat Mar 30 12:04:23 2013 +0100 Intel: Return on missing microcode file to fix null pointer dereference Selecting `CPU_MICROCODE_IN_CBFS` in Kconfig but not having the microcode blob `cpu_microcode_blob.bin` in CBFS results in a null pointer dereference later on resulting in a crash. for(c = microcode_updates; m->hdrver; m = (const struct microcode *)c) { Fix this by returning if `microcode_updates` is `NULL`, that means no file is found. This patch is successfully tested on the Lenovo X201. Change-Id: I6e18fd37256910bf047061e4633a66cf29ad7b69 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/cpu/intel/microcode/microcode.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index d908c25..82ab7a2 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -130,6 +130,9 @@ const void *intel_microcode_find(void) CBFS_TYPE_MICROCODE); #endif + /* No need for explicit error message since the user already gets + "file not found" from cbfs. + */ if (!microcode_updates) return microcode_updates; @@ -202,6 +205,9 @@ void intel_update_microcode(const void *microcode_updates) const char *c; msr_t msr; + if (!microcode_updates) + return; + /* CPUID sets MSR 0x8B iff a microcode update has been loaded. */ msr.lo = 0; msr.hi = 0;

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New patch to review for coreboot: ac9f481 intel/microcode.h: Fix typo in comment: micr*o*code
by Paul Menzel March 30, 2013

March 30, 2013

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2992 -gerrit commit ac9f4818cb7e95ea8da1688248b8aecf86c6a6c8 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sat Mar 30 21:01:13 2013 +0100 intel/microcode.h: Fix typo in comment: micr*o*code Introduced in commit »intel microcode: split up microcode loading stages« (98ffb426) [1]. [1] http://review.coreboot.org/2778 Change-Id: I626508b10f3998b43aaabd49853090b36f5d3eb0 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/include/cpu/intel/microcode.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/include/cpu/intel/microcode.h b/src/include/cpu/intel/microcode.h index 7a291e2..9e4773e 100644 --- a/src/include/cpu/intel/microcode.h +++ b/src/include/cpu/intel/microcode.h @@ -27,7 +27,7 @@ void intel_update_microcode_from_cbfs(void); * NULL if none found. */ const void *intel_microcode_find(void); /* It is up to the caller to determine if parallel loading is possible as - * well as ensuring the micrcode matches the family and revision (i.e. with + * well as ensuring the microcode matches the family and revision (i.e. with * intel_microcode_find()). */ void intel_microcode_load_unlocked(const void *microcode_patch); #else

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Patch merged into coreboot/master: 08e3656 armv7: import updated cache/MMU stuff from coreboot
by gerrit＠coreboot.org March 30, 2013

March 30, 2013

the following patch was just integrated into master: commit 08e3656b517cf029dec5f9830c2e09b947e46e8b Author: David Hendricks <dhendrix(a)chromium.org> Date: Mon Mar 25 15:02:29 2013 -0700 armv7: import updated cache/MMU stuff from coreboot This imports the newest cache and MMU code from coreboot. This time it's so new that it hasn't even been checked in to coreboot. However, this version at least allows DMA to work properly for the MSHC driver. So even if we rebase a few more times, this version is at least a step in the right direction. Note: This omits the stuff that sets up dcache policy since libpayload should not need to worry about that and it depends on cbmem stuff. Change-Id: Idd42b083e8019634aaaa44d5bf5b51db6c3912f5 Signed-off-by: David Hendricks <dhendrix(a)google.com> Reviewed-on: http://review.coreboot.org/2975 Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Sat Mar 30 00:33:51 2013, giving +1 See http://review.coreboot.org/2975 for details. -gerrit

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Patch merged into coreboot/master: 2fba5e2 armv7: import new cache maintenance API from coreboot
by gerrit＠coreboot.org March 30, 2013

March 30, 2013

the following patch was just integrated into master: commit 2fba5e27d4aa2cb8f0c96b5e8fb8479f249e8ff8 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Mar 14 19:06:11 2013 -0700 armv7: import new cache maintenance API from coreboot This imports the new cache maintenance API from coreboot at commit bba8090. This is a BSD-licensed implementation which exposes cache maintenance opertaions necessary for payloads for things such as DMA transfers. Change-Id: I554676db89517bebc6edae4f7ab7e5882e6f986d Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-on: http://review.coreboot.org/2974 Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Sat Mar 30 00:19:10 2013, giving +1 See http://review.coreboot.org/2974 for details. -gerrit

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Patch merged into coreboot/master: bc073f4 x86: Drop BOARD_HAS_FADT
by gerrit＠coreboot.org March 30, 2013

March 30, 2013

the following patch was just integrated into master: commit bc073f4a545e883f4af3971904ac23b2ad2bd1a3 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Mar 28 16:30:56 2013 +0200 x86: Drop BOARD_HAS_FADT There is a wildcard rule to include mainboard/fadt.c. Change-Id: I7f59d6b241c683b62c2c41c5795e45184882635e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/2940 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Build-Tested: build bot (Jenkins) at Sat Mar 30 03:01:34 2013, giving +1 Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Sat Mar 30 19:33:49 2013, giving +2 See http://review.coreboot.org/2940 for details. -gerrit

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