[SerialICE] Patch set updated for serialice: f39ca5e Add MSI MS-7133

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Fri Feb 22 19:27:15 CET 2013


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2477

-gerrit

commit f39ca5e027c8e3d968ea3359c9187817de149853
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sat Nov 10 18:59:43 2012 +0200

    Add MSI MS-7133
    
    Change-Id: I05f50ef3867d2ef0b9ad77d5afd9f49ca5856a77
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 SerialICE/Kconfig                |  4 +++
 SerialICE/mainboard/msi_ms7133.c | 75 ++++++++++++++++++++++++++++++++++++++++
 SerialICE/simba/msi_ms7133.lua   | 70 +++++++++++++++++++++++++++++++++++++
 3 files changed, 149 insertions(+)

diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig
index 32e2895..57c8af3 100644
--- a/SerialICE/Kconfig
+++ b/SerialICE/Kconfig
@@ -70,6 +70,9 @@ config BOARD_ASROCK_939A785GMH
 config BOARD_MSI_MS6178
 	bool "MSI MS6178"
 
+config BOARD_MSI_MS7133
+	bool "MSI MS-7133"
+
 config BOARD_RCA_RM4100
 	bool "RCA RM4100"
 
@@ -132,6 +135,7 @@ config BOARD_INIT
 	default "asus_m2v-mx_se.c" if BOARD_ASUS_M2V_MX_SE
 	default "asus_k8v-x.c" if BOARD_ASUS_K8V_X
 	default "msi_ms6178.c" if BOARD_MSI_MS6178
+	default "msi_ms7133.c" if BOARD_MSI_MS7133
 	default "rca_rm4100.c" if BOARD_RCA_RM4100
 	default "thomson_ip1000.c" if BOARD_THOMSON_IP1000
 	default "asus_p2b.c" if BOARD_ASUS_P2B
diff --git a/SerialICE/mainboard/msi_ms7133.c b/SerialICE/mainboard/msi_ms7133.c
new file mode 100644
index 0000000..fc7e753
--- /dev/null
+++ b/SerialICE/mainboard/msi_ms7133.c
@@ -0,0 +1,75 @@
+/*
+ * SerialICE
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe at hermann-uwe.de>
+ * Copyright (C) 2013 Kyösti Mälkki <kyosti.malkki at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+const char boardname[33]="MSI MS7133                      ";
+
+#define PMBASE			0x40
+#define COM_DEC			0x80
+#define LPC_EN			0x82
+
+#define PMBASE_ADDR		0x500
+#define TCOBASE			(PMBASE + 0x60)
+#define TCO1_STS		(TCOBASE + 0x04)
+#define TCO2_STS		(TCOBASE + 0x06)
+#define TCO1_CNT		(TCOBASE + 0x08)
+
+#define SUPERIO_CONFIG_PORT	0x4e
+
+static void southbridge_init(void)
+{
+	u16 reg16;
+
+	/* Disable watchdog. */
+	pci_write_config32(PCI_ADDR(0, 0x1f, 0, PMBASE), PMBASE_ADDR | 1);
+	reg16 = inw(TCO1_CNT);
+	reg16 |= (1 << 11);		/* Halt TCO timer. */
+	outw(reg16, TCO1_CNT);
+	outw(0x0008, TCO1_STS);		/* Clear timeout status. */
+	outw(0x0002, TCO2_STS);		/* Clear second timeout status. */
+
+	/* Set COM1/COM2 decode range. */
+	pci_write_config8(PCI_ADDR(0, 0x1f, 0, COM_DEC), 0x10);
+
+	/* Enable COM1, COM2, and Super I/O config registers 0x2e/0x4e. */
+	pci_write_config16(PCI_ADDR(0, 0x1f, 0, LPC_EN), 0x3003);
+}
+
+static void superio_init(void)
+{
+	pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT);
+
+	/* Set CLKSEL=1 to select 48 MHz (otherwise serial won't work). */
+	pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc6);
+
+	pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2); /* COM1 */
+	pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
+	pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
+	pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
+	pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
+
+	pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT);
+}
+
+static void chipset_init(void)
+{
+	southbridge_init();
+	superio_init();
+}
diff --git a/SerialICE/simba/msi_ms7133.lua b/SerialICE/simba/msi_ms7133.lua
new file mode 100644
index 0000000..41bd7bf
--- /dev/null
+++ b/SerialICE/simba/msi_ms7133.lua
@@ -0,0 +1,70 @@
+
+function mainboard_io_read(f, action)
+	-- IO slowdown
+	if action.addr == 0xed then
+		ignore_action(f, action)
+		return drop_action(f, action, 0)
+	end
+
+	if action.addr == 0xcfb then
+		ignore_action(f, action)
+		return drop_action(f, action, 0)
+	end
+
+	return skip_filter(f, action)
+end
+
+
+function mainboard_io_write(f, action)
+	if action.addr == 0xcfb then
+		ignore_action(f, action)
+		return drop_action(f, action, 0)
+	end
+
+	if action.addr == 0xe1 then
+		ignore_action(f, action)
+		return drop_action(f, action, action.data)
+	end
+
+	return skip_filter(f, action)
+end
+
+function mainboard_io_pre(f, action)
+	if action.write then
+		return mainboard_io_write(f, action)
+	else
+		return mainboard_io_read(f, action)
+	end
+end
+
+function mainboard_io_post(f, action)
+	if action.addr == 0xe1 or action.addr == 0xed or action.addr == 0xcfb then
+		return true
+	end
+	if action.addr == 0x80 and not action.write then
+		return true
+	end
+end
+
+filter_mainboard = {
+	id = -1,
+	name = "test",
+	pre = mainboard_io_pre,
+	post = mainboard_io_post,
+	hide = hide_mainboard_io,
+	base = 0x0,
+	size = 0x10000
+}
+
+dofile("i82801.lua")
+dofile("intel_bars.lua")
+
+function do_mainboard_setup()
+	do_default_setup()
+
+	enable_hook_i82801fx()
+	northbridge_i915()
+
+	-- Apply mainboard hooks last, so they are the first ones to check
+	enable_hook(io_hooks, filter_mainboard)
+end



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