[SerialICE] Patch merged into serialice/master: e0776f4 Add PCI config register filters

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit e0776f44771c1b60ce4aed23f23723319737eed2
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sun Oct 28 11:02:01 2012 +0200

    Add PCI config register filters
    
    Config register decoding is enabled by default for IO 0xcf8-0xcff
    access only. To enable decode of MMIO style access, it is necessary
    to add chipset-specific hook to set base of PCI MMIO config space.
    
    At the moment modifying transactions is limited to conditionally
    dropping a write before it reaches target.
    
    Change-Id: Ib4241701dcbd5d617749f1223141171eb8093000
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: http://review.coreboot.org/1645
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>

Build-Tested: build bot (Jenkins) at Sun Oct 28 22:08:15 2012, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer at coreboot.org> at Tue Nov  6 22:04:18 2012, giving +2
See http://review.coreboot.org/1645 for details.

-gerrit