[SerialICE] The strangest post codes

[Andrew Goodbody]

Stefan Reinauer wrote:
> * Joseph Smith <joe at settoplinux.org> [110402 00:33]:
>> On the i854 it is a set-top-box design and the memory is on-board
>> from the manufacturer. On the i855 the memory is fine and both
>> boards boot just fine with their normal bios's. Is there a public
>> doc on Intel Memory Reference Code (MRC) that I can learn more about
>> it?
> 
> Unfortunately, the real home of the easter bunny and Intel's MRC are
> among the biggest secrets in the 'verse.
> 
> Stefan
> 

Indeed. This is the big issue that prevents support of modern Intel 
chipsets in coreboot.

What you need to do is to adapt the filters in serialice.lua so that 
they work for your board(s) by routing the access to the actual hardware 
at first and then switch to QEMU memory for speed later. The default 
ones are mostly specific to whatever board and BIOS they were developed on.

Best of luck,
Andrew