[SerialICE] The strangest post codes

[Stefan Reinauer]

* Joseph Smith <joe at settoplinux.org> [110331 23:38]:
> Well now I am completely stumped. Both my i854 and i855 boards both
> crap out with the same strange post codes. Two completely different
> boards and two completely different bios vendors....
> 
> i854
> ------
> IO: outl 0cf8 <= 8000f844
> IO:  inb 0cfc => 00
> PCI 0:1f.0 R.44
> IO: outb 0cfc <= 10
> PCI 0:1f.0 R.44

ACPI_CNTL: enable PMBASE

> IO:  inw 1004 => 0000
Probably a read to  PM1_CNT

> IO: outw 0080 <= fea0
> IO: outl 0cf8 <= 800000fc
> IO: outw 0cfc <= 0109
> PCI 0:00.0 R.fc

undocumented in publish data sheet.

> IO: outb 0080 <= 01
> IO: outb 0080 <= 02
> IO: outw 0080 <= eee3

So it executes some piece of code that counts on port 80,
and the second or third step fails

> --craps out after this----
> 
> 
> i855
> -------
> IO: outl 0cf8 <= 8000f8a4
> IO:  inb 0cfc => 01
> PCI 0:1f.0 R.a4
> IO: outl 0cf8 <= 8000f8a4
> IO: outb 0cfc <= 00
> PCI 0:1f.0 R.a4

Looks undocumented in the public data sheets (ICH4?)

> IO:  inb 04b9 => 02
> IO: outb 04b9 <= 03

If PMBASE is at 0x480, this would be a write to Alternate GPI SMI Enable

> IO: outw 0080 <= fea0

> IO: outl 0cf8 <= 800000fc
> IO: outw 0cfc <= 0109
> PCI 0:00.0 R.fc

Undocumented in Memory Controller

> IO: outw 0080 <= eee3

Probably the same error as above.

> --craps out after this----
> 
> Anyone ever seen these 16bit post codes before? Help?

They're quite common these days. Presumably eexx describes some error
code. At some point the BIOS thought something is wrong with the system.

You will have to figure out where the BIOS is taking a jump to the wrong
code path and make sure you satisfy its requirements.

Does this BIOS use Cache As RAM? Did you initialize the CAR region
correctly?

Try enabling some of the debug flags in the lua script.

Stefan