[SeaBIOS] [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses.

[Kevin O'Connor]

On Sun, Jun 14, 2015 at 02:10:22PM +0200, Michael S. Tsirkin wrote:
> On Thu, Jun 11, 2015 at 12:48:22PM -0400, Kevin O'Connor wrote:
> > The SeaBIOS code is used on both virtual machines and real machines.
> > The bus number is something that is generated by software and it is
> > not assured to be stable between boots.  (For example, if someone adds
> > a PCI device to their machine between boots then every bus number in
> > the system might be different on the next boot.)  The open firmware
> > paths go to great length to avoid arbitrary bus numbers today - for
> > example:
> > 
> > /pci at i0cf8/pci-bridge at 1/usb at 1,2/hub at 3/storage at 1/channel at 0/disk at 0,0
> > 
> > Given the complexity to avoid arbitrary bus numbers I'm confused why
> > one would want to add them.
> 
> Could you give an example real-hardware path when there are multiple
> roots though?
> I'd like to make sure what qemu generates matches that.

I don't have the hardware, but I've asked a user that does to send in
a log.

Here's a real world example of a search path that is generated today
for bus 0:

01.249: Searching bootorder for: /pci at i0cf8/*@11/drive at 0/disk at 0

Here's what SeaBIOS is coded to produce for a similar device on the
first extra pci root bus instead:

01.249: Searching bootorder for: /pci-root at 1/pci at i0cf8/*@11/drive at 0/disk at 0

Placing "pci at i0cf8" after "pci-root at 1" is admittedly hokey, and I
don't have any issue with changing it.

-Kevin