[SeaBIOS] [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses.

[Gerd Hoffmann]

  Hi,

> On each boot, coreboot might decide to assign a different bus id to
> the extra roots (for example, if a device with a PCI bridge is
> inserted and it's bus allocation causes bus ids to shift).
> Technically, coreboot could even change the order extra buses are
> assigned bus ids, but doesn't today.
> 
> This was seen on several AMD systems - I'm told at least some Intel
> systems have multiple root buses, but the bus numbers are just hard
> wired.

This is how the qemu pxb works: root bus numbers are a config option for
the root bridge device, i.e. from the guest point of view they are
hard-wired.

cheers,
  Gerd