[SeaBIOS] [PATCH V2 2/2] fw/pci: map memory and IO regions for multiple pci root buses

[Kevin O'Connor]

On Mon, Feb 16, 2015 at 11:31:03AM +0200, Marcel Apfelbaum wrote:
> For resource sizing and mapping purposes treat devices on extra root
> buses as if they are on the default root bus (bus 0).

Remind me - did you need the resources for each extra root bus to be
continuous (ie, not interspersed with resources allocated to devices
on the root bus)?  If I read your patch correctly, it wont segregate
resources on the extra buses.

-Kevin


> Signed-off-by: Marcel Apfelbaum <marcel at redhat.com>
> ---
>  src/fw/pciinit.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
> index a5f6505..c399698 100644
> --- a/src/fw/pciinit.c
> +++ b/src/fw/pciinit.c
> @@ -58,6 +58,7 @@ struct pci_region {
>  struct pci_bus {
>      struct pci_region r[PCI_REGION_TYPE_COUNT];
>      struct pci_device *bus_dev;
> +    int res_on_default_bus;
>  };
>  
>  static u32 pci_bar(struct pci_device *pci, int region_num)
> @@ -686,6 +687,14 @@ static int pci_bios_check_devices(struct pci_bus *busses)
>              busses[pci->secondary_bus].bus_dev = pci;
>  
>          struct pci_bus *bus = &busses[pci_bdf_to_bus(pci->bdf)];
> +        if (!bus->bus_dev && pci_bdf_to_bus(pci->bdf)) {
> +            bus->res_on_default_bus = 1;
> +            /*
> +             * Treat devices on extra root buses as if they
> +             * were on the default root bus (bus 0)
> +             */
> +            bus = &busses[0];
> +        }
>          int i;
>          for (i = 0; i < PCI_NUM_REGIONS; i++) {
>              if ((pci->class == PCI_CLASS_BRIDGE_PCI) &&
> @@ -716,6 +725,8 @@ static int pci_bios_check_devices(struct pci_bus *busses)
>          if (!s->bus_dev)
>              continue;
>          struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)];
> +        if (parent->res_on_default_bus)
> +            parent = &busses[0];
>          int type;
>          int hotplug_support = pci_bus_hotplug_support(s);
>          for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) {
> -- 
> 2.1.0
>