[SeaBIOS] [PATCH 11/11] [RfC] acpi: rework enable bits
Gerd Hoffmann
kraxel at redhat.com
Wed Nov 21 11:46:39 CET 2012
Attempt to make the \_SB.PCI.ISA.${device}._STA methods chipset
independant, by make them simply call (chipset-specific) methods
to figure whenever the device is enabled or not.
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
---
src/acpi-dsdt.dsl | 95 +++++++++++++++++++++++++++++-----------------------
1 files changed, 53 insertions(+), 42 deletions(-)
diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl
index 6912fac..e267b01 100644
--- a/src/acpi-dsdt.dsl
+++ b/src/acpi-dsdt.dsl
@@ -232,7 +232,7 @@ DefinitionBlock (
Name (_HID, EisaId ("PNP0700"))
Method (_STA, 0, NotSerialized)
{
- Return (0x0F)
+ Return (\_SB.PCI0.ENAB.FDC0())
}
Method (_CRS, 0, NotSerialized)
{
@@ -253,16 +253,7 @@ DefinitionBlock (
Name (_HID, EisaId ("PNP0400"))
Method (_STA, 0, NotSerialized)
{
- Store (\_SB.PCI0.PX13.DRSA, Local0)
- And (Local0, 0x80000000, Local0)
- If (LEqual (Local0, 0))
- {
- Return (0x00)
- }
- Else
- {
- Return (0x0F)
- }
+ Return (\_SB.PCI0.ENAB.LPT())
}
Method (_CRS, 0, NotSerialized)
{
@@ -282,16 +273,7 @@ DefinitionBlock (
Name (_UID, 0x01)
Method (_STA, 0, NotSerialized)
{
- Store (\_SB.PCI0.PX13.DRSC, Local0)
- And (Local0, 0x08000000, Local0)
- If (LEqual (Local0, 0))
- {
- Return (0x00)
- }
- Else
- {
- Return (0x0F)
- }
+ Return (\_SB.PCI0.ENAB.COM1())
}
Method (_CRS, 0, NotSerialized)
{
@@ -310,16 +292,7 @@ DefinitionBlock (
Name (_UID, 0x02)
Method (_STA, 0, NotSerialized)
{
- Store (\_SB.PCI0.PX13.DRSC, Local0)
- And (Local0, 0x80000000, Local0)
- If (LEqual (Local0, 0))
- {
- Return (0x00)
- }
- Else
- {
- Return (0x0F)
- }
+ Return (\_SB.PCI0.ENAB.COM2())
}
Method (_CRS, 0, NotSerialized)
{
@@ -342,20 +315,58 @@ DefinitionBlock (
Device (PX13) {
Name (_ADR, 0x00010003)
- OperationRegion (P13C, PCI_Config, 0x5c, 0x24)
- Field (P13C, DWordAcc, NoLock, Preserve)
+ OperationRegion (P13C, PCI_Config, 0x00, 0xff)
+ Field (P13C, AnyAcc, NoLock, Preserve)
{
- DRSA, 32,
- DRSB, 32,
- DRSC, 32,
- DRSE, 32,
- DRSF, 32,
- DRSG, 32,
- DRSH, 32,
- DRSI, 32,
- DRSJ, 32
+ Offset(0x5f),
+ , 7,
+ LPEN, 1, // LPT
+ Offset(0x67),
+ , 3,
+ CAEN, 1, // COM1
+ , 3,
+ CBEN, 1, // COM2
}
}
+ Device (ENAB) {
+ Method (FDC0, 0, NotSerialized)
+ {
+ Return (0x0F)
+ }
+ Method (LPT, 0, NotSerialized)
+ {
+ If (LEqual (\_SB.PCI0.PX13.LPEN, 0))
+ {
+ Return (0x00)
+ }
+ Else
+ {
+ Return (0x0F)
+ }
+ }
+ Method (COM1, 0, NotSerialized)
+ {
+ If (LEqual (\_SB.PCI0.PX13.CAEN, 0))
+ {
+ Return (0x00)
+ }
+ Else
+ {
+ Return (0x0F)
+ }
+ }
+ Method (COM2, 0, NotSerialized)
+ {
+ If (LEqual (\_SB.PCI0.PX13.CBEN, 0))
+ {
+ Return (0x00)
+ }
+ Else
+ {
+ Return (0x0F)
+ }
+ }
+ }
}
--
1.7.1
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