[SeaBIOS] [PATCH v2 0/6] Build PCI hotplug SSDT from a single template
Jason Baron
jbaron at redhat.com
Fri Aug 3 16:53:15 CEST 2012
On Fri, Aug 03, 2012 at 01:33:52AM +0300, Michael S. Tsirkin wrote:
> On Thu, Aug 02, 2012 at 03:07:20PM +0200, Paolo Bonzini wrote:
> > More than 1kb of data is taken by the 32 copies of the PCI hotplug SSDT
> > methods. We can build them from a single template like we do for CPUs.
> >
> > This series does exactly this. Patches 1 prepares for the change, by
> > moving other pieces of ssdt-pcihd.dsl out of the way. Patch 2 is also
> > a simple rename and patch 3 fixes a bug in acpi_extract. Patches 4 to
> > 6 finally do the movement.
> >
> > v1->v2: document computation of length (patch 1, Igor)
> > build PCNT dynamically (Kevin)
> >
> > Paolo Bonzini (6):
> > acpi: move s3/s4/s5 to build_ssdt
> > acpi: rename Processor SSDT constants
> > acpi_extract: fix off-by-one
> > acpi_extract: detect DeviceOp
> > acpi: build PCNT dynamically
> > acpi: build PCI hotplug devices from a single template
> >
> > Makefile | 2 +-
> > src/acpi.c | 218 +++++++++++++++++++++++++++----------------------
> > src/ssdt-pcihp.dsl | 124 +++-------------------------
> > src/ssdt-susp.dsl | 41 ++++++++++
> > tools/acpi_extract.py | 30 ++++++-
> > 5 files changed, 203 insertions(+), 212 deletions(-)
> > create mode 100644 src/ssdt-susp.dsl
>
> Jason, any input?
> I'm a bit concerned this will make bridge support that
> you have been working on harder ... or maybe not and it will
> make it easier?
>
I think this patch should be ok. Its harder for me in the sense that I
need to re-do my patch :)
Here's my current ssdt-pcihp.dsl patch, maybe Paolo can spot if there
would be any conflicts. I suspect, the auto generation that Paolo is
doing is actually going to simplify things in general for these typtes
of nested tables.
Thanks,
-Jason
--- a/src/ssdt-pcihp.dsl
+++ b/src/ssdt-pcihp.dsl
@@ -17,82 +17,162 @@ DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1)
// at runtime, if the slot is detected to not support hotplug.
// Extract the offset of the address dword and the
// _EJ0 name to allow this patching.
-#define hotplug_slot(slot) \
- Device (S##slot) { \
- ACPI_EXTRACT_NAME_DWORD_CONST aml_adr_dword \
- Name (_ADR, 0x##slot##0000) \
- ACPI_EXTRACT_METHOD_STRING aml_ej0_name \
- Method (_EJ0, 1) { Return(PCEJ(0x##slot)) } \
- Name (_SUN, 0x##slot) \
- }
+#define hotplug_level2_slot(slot1, slot2) \
+ Device (S##slot2) { \
+ Name (_ADR, 0x##slot2##0000) \
+ Method (_EJ0, 1) { Return(PCEJ(0x##slot1, 0x##slot2)) } \
+ Name (_SUN, 0x##slot2) \
+ } \
+
+#define hotplug_top_level_slot(slot) \
+ Device (S##slot) { \
+ ACPI_EXTRACT_NAME_DWORD_CONST aml_adr_dword \
+ Name (_ADR,0x##slot##0000) \
+ ACPI_EXTRACT_METHOD_STRING aml_ej0_name \
+ Method (_EJ0, 1) { Return(PCEJ(0x##slot, 0x00)) } \
+ Name (_SUN, 0x##slot) \
+ hotplug_level2_slot(slot, 01) \
+ hotplug_level2_slot(slot, 02) \
+ hotplug_level2_slot(slot, 03) \
+ hotplug_level2_slot(slot, 04) \
+ hotplug_level2_slot(slot, 05) \
+ hotplug_level2_slot(slot, 06) \
+ hotplug_level2_slot(slot, 07) \
+ hotplug_level2_slot(slot, 08) \
+ hotplug_level2_slot(slot, 09) \
+ hotplug_level2_slot(slot, 0a) \
+ hotplug_level2_slot(slot, 0b) \
+ hotplug_level2_slot(slot, 0c) \
+ hotplug_level2_slot(slot, 0d) \
+ hotplug_level2_slot(slot, 0e) \
+ hotplug_level2_slot(slot, 0f) \
+ hotplug_level2_slot(slot, 10) \
+ hotplug_level2_slot(slot, 11) \
+ hotplug_level2_slot(slot, 12) \
+ hotplug_level2_slot(slot, 13) \
+ hotplug_level2_slot(slot, 14) \
+ hotplug_level2_slot(slot, 15) \
+ hotplug_level2_slot(slot, 16) \
+ hotplug_level2_slot(slot, 17) \
+ hotplug_level2_slot(slot, 18) \
+ hotplug_level2_slot(slot, 19) \
+ hotplug_level2_slot(slot, 1a) \
+ hotplug_level2_slot(slot, 1b) \
+ hotplug_level2_slot(slot, 1c) \
+ hotplug_level2_slot(slot, 1d) \
+ hotplug_level2_slot(slot, 1e) \
+ hotplug_level2_slot(slot, 1f) \
+ } \
+
+ hotplug_top_level_slot(01)
+ hotplug_top_level_slot(02)
+ hotplug_top_level_slot(03)
+ hotplug_top_level_slot(04)
+ hotplug_top_level_slot(05)
+ hotplug_top_level_slot(06)
+ hotplug_top_level_slot(07)
+ hotplug_top_level_slot(08)
+ hotplug_top_level_slot(09)
+ hotplug_top_level_slot(0a)
+ hotplug_top_level_slot(0b)
+ hotplug_top_level_slot(0c)
+ hotplug_top_level_slot(0d)
+ hotplug_top_level_slot(0e)
+ hotplug_top_level_slot(0f)
+ hotplug_top_level_slot(10)
+ hotplug_top_level_slot(11)
+ hotplug_top_level_slot(12)
+ hotplug_top_level_slot(13)
+ hotplug_top_level_slot(14)
+ hotplug_top_level_slot(15)
+ hotplug_top_level_slot(16)
+ hotplug_top_level_slot(17)
+ hotplug_top_level_slot(18)
+ hotplug_top_level_slot(19)
+ hotplug_top_level_slot(1a)
+ hotplug_top_level_slot(1b)
+ hotplug_top_level_slot(1c)
+ hotplug_top_level_slot(1d)
+ hotplug_top_level_slot(1e)
+ hotplug_top_level_slot(1f)
- hotplug_slot(01)
- hotplug_slot(02)
- hotplug_slot(03)
- hotplug_slot(04)
- hotplug_slot(05)
- hotplug_slot(06)
- hotplug_slot(07)
- hotplug_slot(08)
- hotplug_slot(09)
- hotplug_slot(0a)
- hotplug_slot(0b)
- hotplug_slot(0c)
- hotplug_slot(0d)
- hotplug_slot(0e)
- hotplug_slot(0f)
- hotplug_slot(10)
- hotplug_slot(11)
- hotplug_slot(12)
- hotplug_slot(13)
- hotplug_slot(14)
- hotplug_slot(15)
- hotplug_slot(16)
- hotplug_slot(17)
- hotplug_slot(18)
- hotplug_slot(19)
- hotplug_slot(1a)
- hotplug_slot(1b)
- hotplug_slot(1c)
- hotplug_slot(1d)
- hotplug_slot(1e)
- hotplug_slot(1f)
+#define gen_pci_level2_hotplug(slot1, slot2) \
+ If (LEqual(Arg0, 0x##slot1)) { \
+ If (LEqual(Arg1, 0x##slot2)) { \
+ Notify(\_SB.PCI0.S##slot1.S##slot2, Arg2) \
+ } \
+ } \
-#define gen_pci_hotplug(slot) \
- If (LEqual(Arg0, 0x##slot)) { Notify(S##slot, Arg1) }
+#define gen_pci_top_level_hotplug(slot) \
+ If (LEqual(Arg1, Zero)) { \
+ If (LEqual(Arg0, 0x##slot)) { \
+ Notify(S##slot, Arg2) \
+ } \
+ } \
+ gen_pci_level2_hotplug(slot, 01) \
+ gen_pci_level2_hotplug(slot, 02) \
+ gen_pci_level2_hotplug(slot, 03) \
+ gen_pci_level2_hotplug(slot, 04) \
+ gen_pci_level2_hotplug(slot, 05) \
+ gen_pci_level2_hotplug(slot, 06) \
+ gen_pci_level2_hotplug(slot, 07) \
+ gen_pci_level2_hotplug(slot, 08) \
+ gen_pci_level2_hotplug(slot, 09) \
+ gen_pci_level2_hotplug(slot, 0a) \
+ gen_pci_level2_hotplug(slot, 0b) \
+ gen_pci_level2_hotplug(slot, 0c) \
+ gen_pci_level2_hotplug(slot, 0d) \
+ gen_pci_level2_hotplug(slot, 0e) \
+ gen_pci_level2_hotplug(slot, 0f) \
+ gen_pci_level2_hotplug(slot, 10) \
+ gen_pci_level2_hotplug(slot, 11) \
+ gen_pci_level2_hotplug(slot, 12) \
+ gen_pci_level2_hotplug(slot, 13) \
+ gen_pci_level2_hotplug(slot, 14) \
+ gen_pci_level2_hotplug(slot, 15) \
+ gen_pci_level2_hotplug(slot, 16) \
+ gen_pci_level2_hotplug(slot, 17) \
+ gen_pci_level2_hotplug(slot, 18) \
+ gen_pci_level2_hotplug(slot, 19) \
+ gen_pci_level2_hotplug(slot, 1a) \
+ gen_pci_level2_hotplug(slot, 1b) \
+ gen_pci_level2_hotplug(slot, 1c) \
+ gen_pci_level2_hotplug(slot, 1d) \
+ gen_pci_level2_hotplug(slot, 1e) \
+ gen_pci_level2_hotplug(slot, 1f) \
- Method(PCNT, 2) {
- gen_pci_hotplug(01)
- gen_pci_hotplug(02)
- gen_pci_hotplug(03)
- gen_pci_hotplug(04)
- gen_pci_hotplug(05)
- gen_pci_hotplug(06)
- gen_pci_hotplug(07)
- gen_pci_hotplug(08)
- gen_pci_hotplug(09)
- gen_pci_hotplug(0a)
- gen_pci_hotplug(0b)
- gen_pci_hotplug(0c)
- gen_pci_hotplug(0d)
- gen_pci_hotplug(0e)
- gen_pci_hotplug(0f)
- gen_pci_hotplug(10)
- gen_pci_hotplug(11)
- gen_pci_hotplug(12)
- gen_pci_hotplug(13)
- gen_pci_hotplug(14)
- gen_pci_hotplug(15)
- gen_pci_hotplug(16)
- gen_pci_hotplug(17)
- gen_pci_hotplug(18)
- gen_pci_hotplug(19)
- gen_pci_hotplug(1a)
- gen_pci_hotplug(1b)
- gen_pci_hotplug(1c)
- gen_pci_hotplug(1d)
- gen_pci_hotplug(1e)
- gen_pci_hotplug(1f)
+ Method(PCNT, 3) {
+ gen_pci_top_level_hotplug(01)
+ gen_pci_top_level_hotplug(02)
+ gen_pci_top_level_hotplug(03)
+ gen_pci_top_level_hotplug(04)
+ gen_pci_top_level_hotplug(05)
+ gen_pci_top_level_hotplug(06)
+ gen_pci_top_level_hotplug(07)
+ gen_pci_top_level_hotplug(08)
+ gen_pci_top_level_hotplug(09)
+ gen_pci_top_level_hotplug(0a)
+ gen_pci_top_level_hotplug(0b)
+ gen_pci_top_level_hotplug(0c)
+ gen_pci_top_level_hotplug(0d)
+ gen_pci_top_level_hotplug(0e)
+ gen_pci_top_level_hotplug(0f)
+ gen_pci_top_level_hotplug(10)
+ gen_pci_top_level_hotplug(11)
+ gen_pci_top_level_hotplug(12)
+ gen_pci_top_level_hotplug(13)
+ gen_pci_top_level_hotplug(14)
+ gen_pci_top_level_hotplug(15)
+ gen_pci_top_level_hotplug(16)
+ gen_pci_top_level_hotplug(17)
+ gen_pci_top_level_hotplug(18)
+ gen_pci_top_level_hotplug(19)
+ gen_pci_top_level_hotplug(1a)
+ gen_pci_top_level_hotplug(1b)
+ gen_pci_top_level_hotplug(1c)
+ gen_pci_top_level_hotplug(1d)
+ gen_pci_top_level_hotplug(1e)
+ gen_pci_top_level_hotplug(1f)
}
}
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